* [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3
@ 2014-05-09 13:44 Nicolas Ferre
2014-05-09 13:44 ` [PATCH 2/2] ARM: at91: add 2 PWM outputs to SAMA5D3 Xplained Nicolas Ferre
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Nicolas Ferre @ 2014-05-09 13:44 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/boot/dts/sama5d3.dtsi | 82 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 9caa06b3641e..ed7943745f23 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -583,6 +583,88 @@
};
};
+ pwm0 {
+ pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
+ atmel,pins =
+ <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA20 periph B, conflicts with ISI_D4 and LCDDAT20 */
+ };
+ pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
+ atmel,pins =
+ <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B, conflicts with GTX0 */
+ };
+
+ pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
+ atmel,pins =
+ <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA22 periph B, conflicts with ISI_D6 and LCDDAT22 */
+ };
+ pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
+ atmel,pins =
+ <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB4 periph B, conflicts with GRX0 */
+ };
+ pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
+ atmel,pins =
+ <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PB27 periph C, conflicts with G125CKO and RTS1 */
+ };
+
+ pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
+ atmel,pins =
+ <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB8 periph B, conflicts with GTXCK */
+ };
+ pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
+ atmel,pins =
+ <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD5 periph C, conflicts with MCI0_DA4 and TIOA0 */
+ };
+
+ pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
+ atmel,pins =
+ <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB12 periph B, conflicts with GRXDV */
+ };
+ pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
+ atmel,pins =
+ <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD7 periph C, conflicts with MCI0_DA6 and TCLK0 */
+ };
+
+ pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
+ atmel,pins =
+ <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA21 periph B, conflicts with ISI_D5 and LCDDAT21 */
+ };
+ pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
+ atmel,pins =
+ <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B, conflicts with GTX1 */
+ };
+
+ pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
+ atmel,pins =
+ <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B, conflicts with ISI_D7 and LCDDAT23 */
+ };
+ pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
+ atmel,pins =
+ <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B, conflicts with GRX1 */
+ };
+ pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
+ atmel,pins =
+ <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE31 periph B, conflicts with IRQ */
+ };
+
+ pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
+ atmel,pins =
+ <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB9 periph B, conflicts with GTXEN */
+ };
+ pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
+ atmel,pins =
+ <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD6 periph C, conflicts with MCI0_DA5 and TIOB0 */
+ };
+
+ pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
+ atmel,pins =
+ <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB13 periph B, conflicts with GRXER */
+ };
+ pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
+ atmel,pins =
+ <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD8 periph C, conflicts with MCI0_DA7 */
+ };
+ };
+
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
--
1.8.2.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/2] ARM: at91: add 2 PWM outputs to SAMA5D3 Xplained
2014-05-09 13:44 [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3 Nicolas Ferre
@ 2014-05-09 13:44 ` Nicolas Ferre
2014-05-10 9:10 ` [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3 Alexandre Belloni
2014-05-12 9:44 ` [PATCH v2 " Nicolas Ferre
2 siblings, 0 replies; 7+ messages in thread
From: Nicolas Ferre @ 2014-05-09 13:44 UTC (permalink / raw)
To: linux-arm-kernel
Add PWM high output of channels 0 and 1 to PA20 PA22 pins.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
arch/arm/boot/dts/at91-sama5d3_xplained.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
index ff8a159bb600..0eacd92cd4b9 100644
--- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts
+++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
@@ -56,6 +56,12 @@
status = "okay";
};
+ pwm0: pwm at f002c000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_pwmh0_0 &pinctrl_pwm0_pwmh1_0>;
+ status = "okay";
+ };
+
usart0: serial at f001c000 {
status = "okay";
};
--
1.8.2.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3
2014-05-09 13:44 [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3 Nicolas Ferre
2014-05-09 13:44 ` [PATCH 2/2] ARM: at91: add 2 PWM outputs to SAMA5D3 Xplained Nicolas Ferre
@ 2014-05-10 9:10 ` Alexandre Belloni
2014-05-12 9:06 ` Nicolas Ferre
2014-05-12 9:44 ` [PATCH v2 " Nicolas Ferre
2 siblings, 1 reply; 7+ messages in thread
From: Alexandre Belloni @ 2014-05-10 9:10 UTC (permalink / raw)
To: linux-arm-kernel
Hi Nicolas,
On 09/05/2014 at 15:44:27 +0200, Nicolas Ferre wrote :
> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> ---
> arch/arm/boot/dts/sama5d3.dtsi | 82 ++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 82 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
> index 9caa06b3641e..ed7943745f23 100644
> --- a/arch/arm/boot/dts/sama5d3.dtsi
> +++ b/arch/arm/boot/dts/sama5d3.dtsi
> @@ -583,6 +583,88 @@
> };
> };
>
> + pwm0 {
> + pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
> + atmel,pins =
> + <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA20 periph B, conflicts with ISI_D4 and LCDDAT20 */
Didn't we decide at some point to stop adding comments for the pinctrl ?
At least, I would say that "PA20 periph B" doesn't add any useful
information.
> + };
> + pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
> + atmel,pins =
> + <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B, conflicts with GTX0 */
> + };
> +
> + pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
> + atmel,pins =
> + <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA22 periph B, conflicts with ISI_D6 and LCDDAT22 */
> + };
> + pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
> + atmel,pins =
> + <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB4 periph B, conflicts with GRX0 */
> + };
> + pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
> + atmel,pins =
> + <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PB27 periph C, conflicts with G125CKO and RTS1 */
> + };
> +
> + pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
> + atmel,pins =
> + <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB8 periph B, conflicts with GTXCK */
> + };
> + pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
> + atmel,pins =
> + <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD5 periph C, conflicts with MCI0_DA4 and TIOA0 */
> + };
> +
> + pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
> + atmel,pins =
> + <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB12 periph B, conflicts with GRXDV */
> + };
> + pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
> + atmel,pins =
> + <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD7 periph C, conflicts with MCI0_DA6 and TCLK0 */
> + };
> +
> + pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
> + atmel,pins =
> + <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA21 periph B, conflicts with ISI_D5 and LCDDAT21 */
> + };
> + pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
> + atmel,pins =
> + <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B, conflicts with GTX1 */
> + };
I would group pwm0_pwmhx and pwm0_pwmlx together.
> +
> + pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
> + atmel,pins =
> + <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B, conflicts with ISI_D7 and LCDDAT23 */
> + };
> + pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
> + atmel,pins =
> + <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B, conflicts with GRX1 */
> + };
> + pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
> + atmel,pins =
> + <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE31 periph B, conflicts with IRQ */
> + };
> +
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3
2014-05-10 9:10 ` [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3 Alexandre Belloni
@ 2014-05-12 9:06 ` Nicolas Ferre
2014-05-12 9:08 ` Alexandre Belloni
0 siblings, 1 reply; 7+ messages in thread
From: Nicolas Ferre @ 2014-05-12 9:06 UTC (permalink / raw)
To: linux-arm-kernel
On 10/05/2014 11:10, Alexandre Belloni :
> Hi Nicolas,
>
> On 09/05/2014 at 15:44:27 +0200, Nicolas Ferre wrote :
>> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
>> ---
>> arch/arm/boot/dts/sama5d3.dtsi | 82 ++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 82 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
>> index 9caa06b3641e..ed7943745f23 100644
>> --- a/arch/arm/boot/dts/sama5d3.dtsi
>> +++ b/arch/arm/boot/dts/sama5d3.dtsi
>> @@ -583,6 +583,88 @@
>> };
>> };
>>
>> + pwm0 {
>> + pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
>> + atmel,pins =
>> + <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA20 periph B, conflicts with ISI_D4 and LCDDAT20 */
>
> Didn't we decide at some point to stop adding comments for the pinctrl ?
> At least, I would say that "PA20 periph B" doesn't add any useful
> information.
Yes, we said that for the description and you are right saying that
saying again the pin configuration doesn't make sense. On the other
hand, I tend to like the "conflicts with ..." part of it (and it is
automatically generated).
So, should we keep this part?
>> + };
>> + pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
>> + atmel,pins =
>> + <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B, conflicts with GTX0 */
>> + };
>> +
>> + pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
>> + atmel,pins =
>> + <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA22 periph B, conflicts with ISI_D6 and LCDDAT22 */
>> + };
>> + pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
>> + atmel,pins =
>> + <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB4 periph B, conflicts with GRX0 */
>> + };
>> + pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
>> + atmel,pins =
>> + <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PB27 periph C, conflicts with G125CKO and RTS1 */
>> + };
>> +
>> + pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
>> + atmel,pins =
>> + <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB8 periph B, conflicts with GTXCK */
>> + };
>> + pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
>> + atmel,pins =
>> + <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD5 periph C, conflicts with MCI0_DA4 and TIOA0 */
>> + };
>> +
>> + pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
>> + atmel,pins =
>> + <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB12 periph B, conflicts with GRXDV */
>> + };
>> + pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
>> + atmel,pins =
>> + <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD7 periph C, conflicts with MCI0_DA6 and TCLK0 */
>> + };
>> +
>> + pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
>> + atmel,pins =
>> + <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA21 periph B, conflicts with ISI_D5 and LCDDAT21 */
>> + };
>> + pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
>> + atmel,pins =
>> + <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B, conflicts with GTX1 */
>> + };
>
> I would group pwm0_pwmhx and pwm0_pwmlx together.
Ah, ok, I can do this, sure.
>
>> +
>> + pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
>> + atmel,pins =
>> + <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B, conflicts with ISI_D7 and LCDDAT23 */
>> + };
>> + pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
>> + atmel,pins =
>> + <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B, conflicts with GRX1 */
>> + };
>> + pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
>> + atmel,pins =
>> + <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE31 periph B, conflicts with IRQ */
>> + };
>> +
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3
2014-05-12 9:06 ` Nicolas Ferre
@ 2014-05-12 9:08 ` Alexandre Belloni
0 siblings, 0 replies; 7+ messages in thread
From: Alexandre Belloni @ 2014-05-12 9:08 UTC (permalink / raw)
To: linux-arm-kernel
On 12/05/2014 at 11:06:07 +0200, Nicolas Ferre wrote :
> On 10/05/2014 11:10, Alexandre Belloni :
> > Hi Nicolas,
> >
> > On 09/05/2014 at 15:44:27 +0200, Nicolas Ferre wrote :
> >> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> >> ---
> >> arch/arm/boot/dts/sama5d3.dtsi | 82 ++++++++++++++++++++++++++++++++++++++++++
> >> 1 file changed, 82 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
> >> index 9caa06b3641e..ed7943745f23 100644
> >> --- a/arch/arm/boot/dts/sama5d3.dtsi
> >> +++ b/arch/arm/boot/dts/sama5d3.dtsi
> >> @@ -583,6 +583,88 @@
> >> };
> >> };
> >>
> >> + pwm0 {
> >> + pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
> >> + atmel,pins =
> >> + <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA20 periph B, conflicts with ISI_D4 and LCDDAT20 */
> >
> > Didn't we decide at some point to stop adding comments for the pinctrl ?
> > At least, I would say that "PA20 periph B" doesn't add any useful
> > information.
>
> Yes, we said that for the description and you are right saying that
> saying again the pin configuration doesn't make sense. On the other
> hand, I tend to like the "conflicts with ..." part of it (and it is
> automatically generated).
>
> So, should we keep this part?
>
Yes, it adds real information.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 1/2] ARM: at91: add PWM pinctrl to SAMA5D3
2014-05-09 13:44 [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3 Nicolas Ferre
2014-05-09 13:44 ` [PATCH 2/2] ARM: at91: add 2 PWM outputs to SAMA5D3 Xplained Nicolas Ferre
2014-05-10 9:10 ` [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3 Alexandre Belloni
@ 2014-05-12 9:44 ` Nicolas Ferre
2014-05-12 9:48 ` Alexandre Belloni
2 siblings, 1 reply; 7+ messages in thread
From: Nicolas Ferre @ 2014-05-12 9:44 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
---
v1 -> v2: - removed useless comment part, kept the "conflicts with..." part
- grouped "high" and "low" signal definitions together for each
channel
arch/arm/boot/dts/sama5d3.dtsi | 78 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 78 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 9caa06b3641e..e08da17e1890 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -583,6 +583,84 @@
};
};
+ pwm0 {
+ pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
+ atmel,pins =
+ <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
+ };
+ pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
+ atmel,pins =
+ <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
+ };
+ pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
+ atmel,pins =
+ <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
+ };
+ pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
+ atmel,pins =
+ <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
+ };
+
+ pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
+ atmel,pins =
+ <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
+ };
+ pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
+ atmel,pins =
+ <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
+ };
+ pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
+ atmel,pins =
+ <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
+ };
+ pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
+ atmel,pins =
+ <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
+ };
+ pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
+ atmel,pins =
+ <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
+ };
+ pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
+ atmel,pins =
+ <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
+ };
+
+ pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
+ atmel,pins =
+ <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
+ };
+ pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
+ atmel,pins =
+ <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
+ };
+ pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
+ atmel,pins =
+ <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
+ };
+ pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
+ atmel,pins =
+ <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
+ };
+
+ pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
+ atmel,pins =
+ <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
+ };
+ pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
+ atmel,pins =
+ <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
+ };
+ pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
+ atmel,pins =
+ <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
+ };
+ pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
+ atmel,pins =
+ <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
+ };
+ };
+
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
--
1.8.2.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 1/2] ARM: at91: add PWM pinctrl to SAMA5D3
2014-05-12 9:44 ` [PATCH v2 " Nicolas Ferre
@ 2014-05-12 9:48 ` Alexandre Belloni
0 siblings, 0 replies; 7+ messages in thread
From: Alexandre Belloni @ 2014-05-12 9:48 UTC (permalink / raw)
To: linux-arm-kernel
On 12/05/2014 at 11:44:14 +0200, Nicolas Ferre wrote :
> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
> v1 -> v2: - removed useless comment part, kept the "conflicts with..." part
> - grouped "high" and "low" signal definitions together for each
> channel
>
> arch/arm/boot/dts/sama5d3.dtsi | 78 ++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 78 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
> index 9caa06b3641e..e08da17e1890 100644
> --- a/arch/arm/boot/dts/sama5d3.dtsi
> +++ b/arch/arm/boot/dts/sama5d3.dtsi
> @@ -583,6 +583,84 @@
> };
> };
>
> + pwm0 {
> + pinctrl_pwm0_pwmh0_0: pwm0_pwmh0-0 {
> + atmel,pins =
> + <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D4 and LCDDAT20 */
> + };
> + pinctrl_pwm0_pwmh0_1: pwm0_pwmh0-1 {
> + atmel,pins =
> + <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX0 */
> + };
> + pinctrl_pwm0_pwml0_0: pwm0_pwml0-0 {
> + atmel,pins =
> + <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D5 and LCDDAT21 */
> + };
> + pinctrl_pwm0_pwml0_1: pwm0_pwml0-1 {
> + atmel,pins =
> + <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTX1 */
> + };
> +
> + pinctrl_pwm0_pwmh1_0: pwm0_pwmh1-0 {
> + atmel,pins =
> + <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D6 and LCDDAT22 */
> + };
> + pinctrl_pwm0_pwmh1_1: pwm0_pwmh1-1 {
> + atmel,pins =
> + <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX0 */
> + };
> + pinctrl_pwm0_pwmh1_2: pwm0_pwmh1-2 {
> + atmel,pins =
> + <AT91_PIOB 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with G125CKO and RTS1 */
> + };
> + pinctrl_pwm0_pwml1_0: pwm0_pwml1-0 {
> + atmel,pins =
> + <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with ISI_D7 and LCDDAT23 */
> + };
> + pinctrl_pwm0_pwml1_1: pwm0_pwml1-1 {
> + atmel,pins =
> + <AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRX1 */
> + };
> + pinctrl_pwm0_pwml1_2: pwm0_pwml1-2 {
> + atmel,pins =
> + <AT91_PIOE 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with IRQ */
> + };
> +
> + pinctrl_pwm0_pwmh2_0: pwm0_pwmh2-0 {
> + atmel,pins =
> + <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXCK */
> + };
> + pinctrl_pwm0_pwmh2_1: pwm0_pwmh2-1 {
> + atmel,pins =
> + <AT91_PIOD 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA4 and TIOA0 */
> + };
> + pinctrl_pwm0_pwml2_0: pwm0_pwml2-0 {
> + atmel,pins =
> + <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GTXEN */
> + };
> + pinctrl_pwm0_pwml2_1: pwm0_pwml2-1 {
> + atmel,pins =
> + <AT91_PIOD 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA5 and TIOB0 */
> + };
> +
> + pinctrl_pwm0_pwmh3_0: pwm0_pwmh3-0 {
> + atmel,pins =
> + <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXDV */
> + };
> + pinctrl_pwm0_pwmh3_1: pwm0_pwmh3-1 {
> + atmel,pins =
> + <AT91_PIOD 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA6 and TCLK0 */
> + };
> + pinctrl_pwm0_pwml3_0: pwm0_pwml3-0 {
> + atmel,pins =
> + <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with GRXER */
> + };
> + pinctrl_pwm0_pwml3_1: pwm0_pwml3-1 {
> + atmel,pins =
> + <AT91_PIOD 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with MCI0_DA7 */
> + };
> + };
> +
> spi0 {
> pinctrl_spi0: spi0-0 {
> atmel,pins =
> --
> 1.8.2.2
>
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2014-05-12 9:48 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-05-09 13:44 [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3 Nicolas Ferre
2014-05-09 13:44 ` [PATCH 2/2] ARM: at91: add 2 PWM outputs to SAMA5D3 Xplained Nicolas Ferre
2014-05-10 9:10 ` [PATCH 1/2] ARM: at91: add PWM pinctrl to SAMA5D3 Alexandre Belloni
2014-05-12 9:06 ` Nicolas Ferre
2014-05-12 9:08 ` Alexandre Belloni
2014-05-12 9:44 ` [PATCH v2 " Nicolas Ferre
2014-05-12 9:48 ` Alexandre Belloni
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