From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 16/22] pinctrl: sunxi: Add A23 R_PIO controller support
Date: Sun, 25 May 2014 21:11:28 +0200 [thread overview]
Message-ID: <20140525191128.GW10768@lukather> (raw)
In-Reply-To: <1400831485-28576-17-git-send-email-wens@csie.org>
On Fri, May 23, 2014 at 03:51:19PM +0800, Chen-Yu Tsai wrote:
> The A23 has a R_PIO pin controller, similar to the one found on the A31 SoC.
> Add support for the pins controlled by the R_PIO controller.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
> drivers/pinctrl/sunxi/Kconfig | 4 +
> drivers/pinctrl/sunxi/Makefile | 1 +
> drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 129 ++++++++++++++++++++++++++++
> 3 files changed, 134 insertions(+)
> create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
>
> diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
> index 17a4281..3058d32 100644
> --- a/drivers/pinctrl/sunxi/Kconfig
> +++ b/drivers/pinctrl/sunxi/Kconfig
> @@ -36,4 +36,8 @@ config PINCTRL_SUN8I_A23
> def_bool PINCTRL_SUNXI || MACH_SUN8I
> select PINCTRL_SUNXI_COMMON
>
> +config PINCTRL_SUN8I_A23_R
> + def_bool PINCTRL_SUNXI || MACH_SUN8I
Like said in the previous patch, you can just depend on MACH_SUN8I
here.
> + select PINCTRL_SUNXI_COMMON
> +
> endif
> diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile
> index 850cd50..e797efb 100644
> --- a/drivers/pinctrl/sunxi/Makefile
> +++ b/drivers/pinctrl/sunxi/Makefile
> @@ -9,3 +9,4 @@ obj-$(CONFIG_PINCTRL_SUN6I_A31) += pinctrl-sun6i-a31.o
> obj-$(CONFIG_PINCTRL_SUN6I_A31_R) += pinctrl-sun6i-a31-r.o
> obj-$(CONFIG_PINCTRL_SUN7I_A20) += pinctrl-sun7i-a20.o
> obj-$(CONFIG_PINCTRL_SUN8I_A23) += pinctrl-sun8i-a23.o
> +obj-$(CONFIG_PINCTRL_SUN8I_A23_R) += pinctrl-sun8i-a23-r.o
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
> new file mode 100644
> index 0000000..ae17888
> --- /dev/null
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
> @@ -0,0 +1,129 @@
> +/*
> + * Allwinner A23 SoCs special pins pinctrl driver.
> + *
> + * Copyright (C) 2014 Chen-Yu Tsai
> + * Chen-Yu Tsai <wens@csie.org>
> + *
> + * Copyright (C) 2014 Boris Brezillon
> + * Boris Brezillon <boris.brezillon@free-electrons.com>
> + *
> + * Copyright (C) 2014 Maxime Ripard
> + * Maxime Ripard <maxime.ripard@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/pinctrl/pinctrl.h>
> +#include <linux/reset.h>
> +
> +#include "pinctrl-sunxi.h"
> +
> +static const struct sunxi_desc_pin sun8i_a23_r_pins[] = {
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "s_rsb"), /* SCK */
> + SUNXI_FUNCTION(0x3, "s_twi")), /* SCK */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "s_rsb"), /* SDA */
> + SUNXI_FUNCTION(0x3, "s_twi")), /* SDA */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "s_uart")), /* TX */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "s_uart")), /* RX */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x3, "s_jtag")), /* MS */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x3, "s_jtag")), /* CK */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x3, "s_jtag")), /* DO */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x3, "s_jtag")), /* DI */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "s_twi")), /* SCK */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "s_twi")), /* SDA */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "s_pwm")),
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out")),
> +};
> +
> +static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_data = {
> + .pins = sun8i_a23_r_pins,
> + .npins = ARRAY_SIZE(sun8i_a23_r_pins),
> + .pin_base = PL_BASE,
> +};
> +
> +static int sun8i_a23_r_pinctrl_probe(struct platform_device *pdev)
> +{
> + struct reset_control *rstc;
> + int ret;
> +
> + rstc = devm_reset_control_get(&pdev->dev, NULL);
Oh, and since you're using the reset framework, you should depends on
RESET_CONTROLLER.
> + if (IS_ERR(rstc)) {
> + dev_err(&pdev->dev, "Reset controller missing\n");
> + return PTR_ERR(rstc);
> + }
> +
> + ret = reset_control_deassert(rstc);
> + if (ret)
> + return ret;
> +
> + ret = sunxi_pinctrl_init(pdev,
> + &sun8i_a23_r_pinctrl_data);
> +
> + if (ret)
> + reset_control_assert(rstc);
> +
> + return ret;
> +}
> +
> +static struct of_device_id sun8i_a23_r_pinctrl_match[] = {
> + { .compatible = "allwinner,sun8i-a23-r-pinctrl", },
> + {}
> +};
> +MODULE_DEVICE_TABLE(of, sun8i_a23_r_pinctrl_match);
> +
> +static struct platform_driver sun8i_a23_r_pinctrl_driver = {
> + .probe = sun8i_a23_r_pinctrl_probe,
> + .driver = {
> + .name = "sun8i-a23-r-pinctrl",
> + .owner = THIS_MODULE,
> + .of_match_table = sun8i_a23_r_pinctrl_match,
> + },
> +};
> +module_platform_driver(sun8i_a23_r_pinctrl_driver);
> +
> +MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
> +MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com");
> +MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
> +MODULE_DESCRIPTION("Allwinner A23 R_PIO pinctrl driver");
> +MODULE_LICENSE("GPL");
Looks good otherwise, once these minor things are fixed, you have my
acked-by.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2014-05-25 19:11 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-23 7:51 [PATCH 00/21] ARM: sunxi: Introduce Allwinner A23 (sun8i) support Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 01/22] serial: 8250_dw: Add optional reset control support Chen-Yu Tsai
2014-05-23 8:19 ` Arnd Bergmann
2014-05-23 7:51 ` [PATCH 02/22] clk: sunxi: register clock gates with clkdev Chen-Yu Tsai
2014-05-25 18:47 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 03/22] clk: sunxi: add "pll6" to sun6i protected clock list Chen-Yu Tsai
2014-05-25 18:48 ` Maxime Ripard
2014-05-26 4:47 ` Chen-Yu Tsai
2014-05-27 8:32 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 04/22] clk: sunxi: move "ahb_sdram" to " Chen-Yu Tsai
2014-05-25 18:51 ` Maxime Ripard
2014-05-26 9:43 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 05/22] clk: sunxi: Fix gate indexing for sun6i-a31-apb0-gates Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 06/22] clk: sunxi: Support factor clocks with N multiplier factor starting from 1 Chen-Yu Tsai
2014-05-25 18:43 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 07/22] clk: sunxi: Fix PLL6 calculation on sun6i Chen-Yu Tsai
2014-05-23 13:09 ` Emilio López
2014-05-23 14:43 ` Chen-Yu Tsai
2014-05-25 18:43 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 08/22] clk: sunxi: Specify number of child clocks for divs clocks Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 09/22] clk: sunxi: Implement A31 PLL6 as a divs clock for 2x output Chen-Yu Tsai
2014-05-25 18:56 ` Maxime Ripard
2014-05-26 3:47 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 10/22] clk: sunxi: Add support for PLL6 pre-divider on AHB1 clock Chen-Yu Tsai
2014-05-25 19:02 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 11/22] ARM: sun6i: DT: Add PLL6 multiple outputs Chen-Yu Tsai
2014-05-25 18:59 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 12/22] ARM: sun6i: DT: Add PLL6 pre-divider clock for AHB1 mux input Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 13/22] clk: sunxi: Add A23 clocks support Chen-Yu Tsai
2014-05-25 19:05 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 14/22] clk: sunxi: Add A23 APB0 support to sun6i-a31-apb0-clk Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 15/22] pinctrl: sunxi: Add A23 PIO controller support Chen-Yu Tsai
2014-05-25 19:08 ` Maxime Ripard
2014-06-17 10:25 ` Chen-Yu Tsai
2014-06-17 14:18 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 16/22] pinctrl: sunxi: Add A23 R_PIO " Chen-Yu Tsai
2014-05-25 19:11 ` Maxime Ripard [this message]
2014-05-23 7:51 ` [PATCH 17/22] mfd: sun6i-prcm: Add support for Allwinner A23 PRCM Chen-Yu Tsai
2014-05-25 19:14 ` Maxime Ripard
2014-05-26 4:36 ` Chen-Yu Tsai
2014-05-27 8:30 ` Maxime Ripard
2014-05-29 4:23 ` Chen-Yu Tsai
2014-05-29 19:31 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 18/22] ARM: sunxi: Introduce Allwinner A23 support Chen-Yu Tsai
2014-05-25 19:22 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 19/22] ARM: sunxi: Add earlyprintk support using R_UART (sun6i/sun8i) Chen-Yu Tsai
2014-05-25 18:46 ` Maxime Ripard
2014-05-26 9:25 ` Chen-Yu Tsai
2014-05-27 8:34 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 20/22] ARM: sun8i: Add SMP support for the Allwinner A23 Chen-Yu Tsai
2014-05-25 19:26 ` Maxime Ripard
2014-05-26 3:57 ` Chen-Yu Tsai
2014-05-27 8:09 ` Marc Zyngier
2014-05-23 7:51 ` [PATCH 21/22] ARM: sunxi: Add Allwinner A23 dtsi Chen-Yu Tsai
2014-05-25 19:38 ` Maxime Ripard
2014-05-26 4:02 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 22/22] ARM: sun8i: dt: Add Ippo-q8h v5 support Chen-Yu Tsai
2014-05-25 19:39 ` Maxime Ripard
2014-05-26 4:23 ` Chen-Yu Tsai
2014-05-27 8:22 ` Maxime Ripard
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