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* [PATCH v1 3/3] arm64: Fix the APM X-Gene SoC SATA PHY clock DTS node csr-mask of the SATA Host Controller 1.
       [not found] ` <1403518538-30697-4-git-send-email-stripathi@apm.com>
@ 2014-06-23 10:56   ` Sergei Shtylyov
  0 siblings, 0 replies; 2+ messages in thread
From: Sergei Shtylyov @ 2014-06-23 10:56 UTC (permalink / raw)
  To: linux-arm-kernel

Hello.

On 06/23/2014 02:15 PM, Suman Tripathi wrote:

> This patch fixes the SATA PHY clock DTS node csr-mask of the SATA
> Host controller 1. This patch also fixes the status of the PHY
> clock node of SATA Host controller 1.

> Signed-off-by: Loc Ho <lho@apm.com>
> Signed-off-by: Suman Tripathi <stripathi@apm.com>
> ---
>   arch/arm64/boot/dts/apm-storm.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)

> diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi
> index f8c40a6..d14bcc4 100644
> --- a/arch/arm64/boot/dts/apm-storm.dtsi
> +++ b/arch/arm64/boot/dts/apm-storm.dtsi
> @@ -184,9 +184,9 @@
>   				reg = <0x0 0x1f21c000 0x0 0x1000>;
>   				reg-names = "csr-reg";
>   				clock-output-names = "sataphy1clk";
> -				status = "disabled";
> +				status = "ok";

    You don't need the specifically set "status to "ok" unless you're 
overriding the "status" prop; "ok" is assumed AFAIK.

WBR, Sergei

^ permalink raw reply	[flat|nested] 2+ messages in thread

* [PATCH v1 2/3] ata: Fix the link down in first attempt for the APM X-Gene SoC AHCI SATA host controller driver.
       [not found] ` <1403518538-30697-3-git-send-email-stripathi@apm.com>
@ 2014-06-23 18:29   ` Tejun Heo
  0 siblings, 0 replies; 2+ messages in thread
From: Tejun Heo @ 2014-06-23 18:29 UTC (permalink / raw)
  To: linux-arm-kernel

Hello,

On Mon, Jun 23, 2014 at 03:45:37PM +0530, Suman Tripathi wrote:
> @@ -234,15 +237,20 @@ static int xgene_ahci_do_hardreset(struct ata_link *link,
>  	u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
>  	void __iomem *port_mmio = ahci_port_base(ap);
>  	struct ata_taskfile tf;
> +	int link_down_retry = 0;
>  	int rc;
>  	u32 val;
> 
> -	/* clear D2H reception area to properly wait for D2H FIS */
> -	ata_tf_init(link->device, &tf);
> -	tf.command = ATA_BUSY;
> -	ata_tf_to_fis(&tf, 0, 0, d2h_fis);
> -	rc = sata_link_hardreset(link, timing, deadline, online,
> +	do {
> +		/* clear D2H reception area to properly wait for D2H FIS */
> +		ata_tf_init(link->device, &tf);
> +		tf.command = ATA_BUSY;
> +		ata_tf_to_fis(&tf, 0, 0, d2h_fis);
> +		rc = sata_link_hardreset(link, timing, deadline, online,
>  				 ahci_check_ready);
> +		if (*online)
> +			break;
> +	} while (link_down_retry++ < MAX_LINK_DOWN_RETRY);

Hmm... so it's retrying w/o extending deadline if the link is reported
to be offline.  This definitely needs comment explaining what's going
on.  Wouldn't it make more sense to change @timing instead rather than
retrying resets?  sata_sil24 already does something similar.  Does,
f.e., using sata_deb_timing_long for @timing make the problem go away?

Thanks.

-- 
tejun

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2014-06-23 18:29 UTC | newest]

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     [not found] <1403518538-30697-1-git-send-email-stripathi@apm.com>
     [not found] ` <1403518538-30697-4-git-send-email-stripathi@apm.com>
2014-06-23 10:56   ` [PATCH v1 3/3] arm64: Fix the APM X-Gene SoC SATA PHY clock DTS node csr-mask of the SATA Host Controller 1 Sergei Shtylyov
     [not found] ` <1403518538-30697-3-git-send-email-stripathi@apm.com>
2014-06-23 18:29   ` [PATCH v1 2/3] ata: Fix the link down in first attempt for the APM X-Gene SoC AHCI SATA host controller driver Tejun Heo

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