From mboxrd@z Thu Jan 1 00:00:00 1970 From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov) Date: Tue, 24 Jun 2014 22:02:21 +0400 Subject: [PATCH v5 2/2] ARM: shmobile: lager: enable internal PCI In-Reply-To: <201406242157.05973.sergei.shtylyov@cogentembedded.com> References: <201406242157.05973.sergei.shtylyov@cogentembedded.com> Message-ID: <201406242202.22807.sergei.shtylyov@cogentembedded.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Ben Dooks Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to them. Signed-off-by: Ben Dooks Reviewed-by: Ian Molton [Sergei: enabled PCI0] Signed-off-by: Sergei Shtylyov --- Changes in version 4: - refreshed the patch. Changes in version 3: - refreshed the patch. Changes in version 2: - enabled PCI0 device; - reworded summary and changelog; - refreshed the patch. arch/arm/boot/dts/r8a7790-lager.dts | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7790-lager.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7790-lager.dts +++ renesas/arch/arm/boot/dts/r8a7790-lager.dts @@ -219,6 +219,21 @@ renesas,groups = "i2c3"; renesas,function = "i2c3"; }; + + usb0_pins: usb0 { + renesas,groups = "usb0"; + renesas,function = "usb0"; + }; + + usb1_pins: usb1 { + renesas,groups = "usb1"; + renesas,function = "usb1"; + }; + + usb2_pins: usb2 { + renesas,groups = "usb2"; + renesas,function = "usb2"; + }; }; ðer { @@ -368,3 +383,21 @@ regulator-always-on; }; }; + +&pci0 { + status = "okay"; + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; +}; + +&pci1 { + status = "okay"; + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; +}; + +&pci2 { + status = "okay"; + pinctrl-0 = <&usb2_pins>; + pinctrl-names = "default"; +};