* [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
[not found] <E1X20Rs-00082S-KI@rmk-PC.arm.linux.org.uk>
@ 2014-07-01 17:51 ` Andrew Lunn
2014-07-02 5:10 ` Shawn Guo
` (8 subsequent siblings)
9 siblings, 0 replies; 10+ messages in thread
From: Andrew Lunn @ 2014-07-01 17:51 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jul 01, 2014 at 04:58:24PM +0100, Russell King wrote:
> ARMv6 and greater introduced a new instruction ("bx") which can be used
> to return from function calls. Recent CPUs perform better when the
> "bx lr" instruction is used rather than the "mov pc, lr" instruction,
> and this sequence is strongly recommended to be used by the ARM
> architecture manual (section A.4.1.1).
>
> We provide a new macro "ret" with all its variants for the condition
> code which will resolve to the appropriate instruction.
>
> Rather than doing this piecemeal, and miss some instances, change all
> the "mov pc" instances to use the new macro, with the exception of
> the "movs" instruction and the kprobes code. This allows us to detect
> the "mov pc, lr" case and fix it up - and also gives us the possibility
> of deploying this for other registers depending on the CPU selection.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Hi Russell
Boot tested on kirkwood.
Tested-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
[not found] <E1X20Rs-00082S-KI@rmk-PC.arm.linux.org.uk>
2014-07-01 17:51 ` [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ Andrew Lunn
@ 2014-07-02 5:10 ` Shawn Guo
2014-07-02 9:02 ` Tony Lindgren
` (7 subsequent siblings)
9 siblings, 0 replies; 10+ messages in thread
From: Shawn Guo @ 2014-07-02 5:10 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jul 01, 2014 at 04:58:24PM +0100, Russell King wrote:
> ARMv6 and greater introduced a new instruction ("bx") which can be used
> to return from function calls. Recent CPUs perform better when the
> "bx lr" instruction is used rather than the "mov pc, lr" instruction,
> and this sequence is strongly recommended to be used by the ARM
> architecture manual (section A.4.1.1).
>
> We provide a new macro "ret" with all its variants for the condition
> code which will resolve to the appropriate instruction.
>
> Rather than doing this piecemeal, and miss some instances, change all
> the "mov pc" instances to use the new macro, with the exception of
> the "movs" instruction and the kprobes code. This allows us to detect
> the "mov pc, lr" case and fix it up - and also gives us the possibility
> of deploying this for other registers depending on the CPU selection.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
...
> arch/arm/mach-imx/suspend-imx6.S | 5 ++--
Tested-by: Shawn Guo <shawn.guo@freescale.com>
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
[not found] <E1X20Rs-00082S-KI@rmk-PC.arm.linux.org.uk>
2014-07-01 17:51 ` [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ Andrew Lunn
2014-07-02 5:10 ` Shawn Guo
@ 2014-07-02 9:02 ` Tony Lindgren
2014-07-02 9:24 ` Gregory CLEMENT
` (6 subsequent siblings)
9 siblings, 0 replies; 10+ messages in thread
From: Tony Lindgren @ 2014-07-02 9:02 UTC (permalink / raw)
To: linux-arm-kernel
* Russell King <rmk+kernel@arm.linux.org.uk> [140701 09:01]:
> ARMv6 and greater introduced a new instruction ("bx") which can be used
> to return from function calls. Recent CPUs perform better when the
> "bx lr" instruction is used rather than the "mov pc, lr" instruction,
> and this sequence is strongly recommended to be used by the ARM
> architecture manual (section A.4.1.1).
>
> We provide a new macro "ret" with all its variants for the condition
> code which will resolve to the appropriate instruction.
>
> Rather than doing this piecemeal, and miss some instances, change all
> the "mov pc" instances to use the new macro, with the exception of
> the "movs" instruction and the kprobes code. This allows us to detect
> the "mov pc, lr" case and fix it up - and also gives us the possibility
> of deploying this for other registers depending on the CPU selection.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Seems to boot fine for omaps:
Tested-by: Tony Lindgren <tony@atomide.com>
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
[not found] <E1X20Rs-00082S-KI@rmk-PC.arm.linux.org.uk>
` (2 preceding siblings ...)
2014-07-02 9:02 ` Tony Lindgren
@ 2014-07-02 9:24 ` Gregory CLEMENT
2014-07-02 11:31 ` Sekhar Nori
` (5 subsequent siblings)
9 siblings, 0 replies; 10+ messages in thread
From: Gregory CLEMENT @ 2014-07-02 9:24 UTC (permalink / raw)
To: linux-arm-kernel
Hi Russell,
On 01/07/2014 17:58, Russell King wrote:
> ARMv6 and greater introduced a new instruction ("bx") which can be used
> to return from function calls. Recent CPUs perform better when the
> "bx lr" instruction is used rather than the "mov pc, lr" instruction,
> and this sequence is strongly recommended to be used by the ARM
> architecture manual (section A.4.1.1).
>
> We provide a new macro "ret" with all its variants for the condition
> code which will resolve to the appropriate instruction.
>
> Rather than doing this piecemeal, and miss some instances, change all
> the "mov pc" instances to use the new macro, with the exception of
> the "movs" instruction and the kprobes code. This allows us to detect
> the "mov pc, lr" case and fix it up - and also gives us the possibility
> of deploying this for other registers depending on the CPU selection.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It booted on Armada XP, Armada 370, Armada 385 and Armada 375
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Thanks,
Gregory
> ---
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
[not found] <E1X20Rs-00082S-KI@rmk-PC.arm.linux.org.uk>
` (3 preceding siblings ...)
2014-07-02 9:24 ` Gregory CLEMENT
@ 2014-07-02 11:31 ` Sekhar Nori
2014-07-04 10:11 ` Christoffer Dall
` (4 subsequent siblings)
9 siblings, 0 replies; 10+ messages in thread
From: Sekhar Nori @ 2014-07-02 11:31 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 01 July 2014 09:28 PM, Russell King wrote:
> ARMv6 and greater introduced a new instruction ("bx") which can be used
> to return from function calls. Recent CPUs perform better when the
> "bx lr" instruction is used rather than the "mov pc, lr" instruction,
> and this sequence is strongly recommended to be used by the ARM
> architecture manual (section A.4.1.1).
>
> We provide a new macro "ret" with all its variants for the condition
> code which will resolve to the appropriate instruction.
>
> Rather than doing this piecemeal, and miss some instances, change all
> the "mov pc" instances to use the new macro, with the exception of
> the "movs" instruction and the kprobes code. This allows us to detect
> the "mov pc, lr" case and fix it up - and also gives us the possibility
> of deploying this for other registers depending on the CPU selection.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> arch/arm/mach-davinci/sleep.S | 2 +-
I build, boot and suspend-to-RAM tested on DA850 which should exercise
the path you modified. DaVinci devices are ARMv5 (ARM926) so the new bx
instruction does not really get used.
Acked-by: Sekhar Nori <nsekhar@ti.com>
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
[not found] <E1X20Rs-00082S-KI@rmk-PC.arm.linux.org.uk>
` (4 preceding siblings ...)
2014-07-02 11:31 ` Sekhar Nori
@ 2014-07-04 10:11 ` Christoffer Dall
2014-07-04 11:09 ` Haojian Zhuang
` (3 subsequent siblings)
9 siblings, 0 replies; 10+ messages in thread
From: Christoffer Dall @ 2014-07-04 10:11 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jul 01, 2014 at 04:58:24PM +0100, Russell King wrote:
> ARMv6 and greater introduced a new instruction ("bx") which can be used
> to return from function calls. Recent CPUs perform better when the
> "bx lr" instruction is used rather than the "mov pc, lr" instruction,
> and this sequence is strongly recommended to be used by the ARM
> architecture manual (section A.4.1.1).
>
> We provide a new macro "ret" with all its variants for the condition
> code which will resolve to the appropriate instruction.
>
> Rather than doing this piecemeal, and miss some instances, change all
> the "mov pc" instances to use the new macro, with the exception of
> the "movs" instruction and the kprobes code. This allows us to detect
> the "mov pc, lr" case and fix it up - and also gives us the possibility
> of deploying this for other registers depending on the CPU selection.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
For the kvm/hyp related changes:
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
[not found] <E1X20Rs-00082S-KI@rmk-PC.arm.linux.org.uk>
` (5 preceding siblings ...)
2014-07-04 10:11 ` Christoffer Dall
@ 2014-07-04 11:09 ` Haojian Zhuang
2014-07-04 11:27 ` Stefano Stabellini
` (2 subsequent siblings)
9 siblings, 0 replies; 10+ messages in thread
From: Haojian Zhuang @ 2014-07-04 11:09 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jul 1, 2014 at 11:58 PM, Russell King
<rmk+kernel@arm.linux.org.uk> wrote:
> ARMv6 and greater introduced a new instruction ("bx") which can be used
> to return from function calls. Recent CPUs perform better when the
> "bx lr" instruction is used rather than the "mov pc, lr" instruction,
> and this sequence is strongly recommended to be used by the ARM
> architecture manual (section A.4.1.1).
>
> We provide a new macro "ret" with all its variants for the condition
> code which will resolve to the appropriate instruction.
>
> Rather than doing this piecemeal, and miss some instances, change all
> the "mov pc" instances to use the new macro, with the exception of
> the "movs" instruction and the kprobes code. This allows us to detect
> the "mov pc, lr" case and fix it up - and also gives us the possibility
> of deploying this for other registers depending on the CPU selection.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> ---
> arch/arm/crypto/aes-armv4.S | 3 ++-
> arch/arm/include/asm/assembler.h | 21 +++++++++++++++
> arch/arm/include/asm/entry-macro-multi.S | 2 +-
> arch/arm/kernel/debug.S | 10 ++++----
> arch/arm/kernel/entry-armv.S | 42 +++++++++++++++---------------
> arch/arm/kernel/entry-common.S | 13 +++++-----
> arch/arm/kernel/entry-header.S | 14 ----------
> arch/arm/kernel/fiqasm.S | 4 +--
> arch/arm/kernel/head-common.S | 7 ++---
> arch/arm/kernel/head-nommu.S | 8 +++---
> arch/arm/kernel/head.S | 18 ++++++-------
> arch/arm/kernel/hyp-stub.S | 6 ++---
> arch/arm/kernel/iwmmxt.S | 10 ++++----
> arch/arm/kernel/relocate_kernel.S | 3 ++-
> arch/arm/kernel/sleep.S | 2 +-
> arch/arm/kvm/init.S | 3 ++-
> arch/arm/lib/ashldi3.S | 3 ++-
> arch/arm/lib/ashrdi3.S | 3 ++-
> arch/arm/lib/backtrace.S | 2 +-
> arch/arm/lib/bitops.h | 5 ++--
> arch/arm/lib/bswapsdi2.S | 5 ++--
> arch/arm/lib/call_with_stack.S | 4 +--
> arch/arm/lib/csumpartial.S | 2 +-
> arch/arm/lib/csumpartialcopygeneric.S | 5 ++--
> arch/arm/lib/delay-loop.S | 18 ++++++-------
> arch/arm/lib/div64.S | 13 +++++-----
> arch/arm/lib/findbit.S | 10 ++++----
> arch/arm/lib/getuser.S | 8 +++---
> arch/arm/lib/io-readsb.S | 2 +-
> arch/arm/lib/io-readsl.S | 6 ++---
> arch/arm/lib/io-readsw-armv3.S | 4 +--
> arch/arm/lib/io-readsw-armv4.S | 2 +-
> arch/arm/lib/io-writesb.S | 2 +-
> arch/arm/lib/io-writesl.S | 10 ++++----
> arch/arm/lib/io-writesw-armv3.S | 4 +--
> arch/arm/lib/io-writesw-armv4.S | 4 +--
> arch/arm/lib/lib1funcs.S | 26 +++++++++----------
> arch/arm/lib/lshrdi3.S | 3 ++-
> arch/arm/lib/memchr.S | 2 +-
> arch/arm/lib/memset.S | 2 +-
> arch/arm/lib/memzero.S | 2 +-
> arch/arm/lib/muldi3.S | 3 ++-
> arch/arm/lib/putuser.S | 10 ++++----
> arch/arm/lib/strchr.S | 2 +-
> arch/arm/lib/strrchr.S | 2 +-
> arch/arm/lib/ucmpdi2.S | 5 ++--
> arch/arm/mach-davinci/sleep.S | 2 +-
> arch/arm/mach-ep93xx/crunch-bits.S | 6 ++---
> arch/arm/mach-imx/suspend-imx6.S | 5 ++--
> arch/arm/mach-mvebu/coherency_ll.S | 10 ++++----
> arch/arm/mach-mvebu/headsmp-a9.S | 3 ++-
> arch/arm/mach-omap2/sleep44xx.S | 3 ++-
> arch/arm/mach-omap2/sram242x.S | 6 ++---
> arch/arm/mach-omap2/sram243x.S | 6 ++---
> arch/arm/mach-pxa/mioa701_bootresume.S | 2 +-
> arch/arm/mach-pxa/standby.S | 4 +--
> arch/arm/mach-s3c24xx/sleep-s3c2410.S | 2 +-
> arch/arm/mach-s3c24xx/sleep-s3c2412.S | 2 +-
> arch/arm/mach-shmobile/headsmp.S | 3 ++-
> arch/arm/mach-tegra/sleep-tegra20.S | 24 ++++++++---------
> arch/arm/mach-tegra/sleep-tegra30.S | 14 +++++-----
> arch/arm/mach-tegra/sleep.S | 8 +++---
> arch/arm/mm/cache-fa.S | 19 +++++++-------
> arch/arm/mm/cache-nop.S | 5 ++--
> arch/arm/mm/cache-v4.S | 13 +++++-----
> arch/arm/mm/cache-v4wb.S | 15 ++++++-----
> arch/arm/mm/cache-v4wt.S | 13 +++++-----
> arch/arm/mm/cache-v6.S | 20 +++++++--------
> arch/arm/mm/cache-v7.S | 30 +++++++++++-----------
> arch/arm/mm/l2c-l2x0-resume.S | 7 ++---
> arch/arm/mm/proc-arm1020.S | 34 ++++++++++++------------
> arch/arm/mm/proc-arm1020e.S | 34 ++++++++++++------------
> arch/arm/mm/proc-arm1022.S | 34 ++++++++++++------------
> arch/arm/mm/proc-arm1026.S | 34 ++++++++++++------------
> arch/arm/mm/proc-arm720.S | 16 ++++++------
> arch/arm/mm/proc-arm740.S | 8 +++---
> arch/arm/mm/proc-arm7tdmi.S | 8 +++---
> arch/arm/mm/proc-arm920.S | 34 ++++++++++++------------
> arch/arm/mm/proc-arm922.S | 34 ++++++++++++------------
> arch/arm/mm/proc-arm925.S | 34 ++++++++++++------------
> arch/arm/mm/proc-arm926.S | 34 ++++++++++++------------
> arch/arm/mm/proc-arm940.S | 24 ++++++++---------
> arch/arm/mm/proc-arm946.S | 30 +++++++++++-----------
> arch/arm/mm/proc-arm9tdmi.S | 8 +++---
> arch/arm/mm/proc-fa526.S | 16 ++++++------
> arch/arm/mm/proc-feroceon.S | 44 ++++++++++++++++----------------
> arch/arm/mm/proc-mohawk.S | 34 ++++++++++++------------
> arch/arm/mm/proc-sa110.S | 16 ++++++------
> arch/arm/mm/proc-sa1100.S | 16 ++++++------
> arch/arm/mm/proc-v6.S | 16 ++++++------
> arch/arm/mm/proc-v7-2level.S | 4 +--
> arch/arm/mm/proc-v7-3level.S | 5 ++--
> arch/arm/mm/proc-v7.S | 14 +++++-----
> arch/arm/mm/proc-v7m.S | 18 ++++++-------
> arch/arm/mm/proc-xsc3.S | 32 +++++++++++------------
> arch/arm/mm/proc-xscale.S | 34 ++++++++++++------------
> arch/arm/mm/tlb-fa.S | 7 ++---
> arch/arm/mm/tlb-v4.S | 5 ++--
> arch/arm/mm/tlb-v4wb.S | 7 ++---
> arch/arm/mm/tlb-v4wbi.S | 7 ++---
> arch/arm/mm/tlb-v6.S | 5 ++--
> arch/arm/mm/tlb-v7.S | 4 +--
> arch/arm/nwfpe/entry.S | 8 +++---
> arch/arm/vfp/entry.S | 4 +--
> arch/arm/vfp/vfphw.S | 26 +++++++++----------
> arch/arm/xen/hypercall.S | 6 ++---
> 106 files changed, 644 insertions(+), 607 deletions(-)
>
I tested on PXA3xx platform.
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Regards
Haojian
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
[not found] <E1X20Rs-00082S-KI@rmk-PC.arm.linux.org.uk>
` (6 preceding siblings ...)
2014-07-04 11:09 ` Haojian Zhuang
@ 2014-07-04 11:27 ` Stefano Stabellini
2014-07-04 14:24 ` Uwe Kleine-König
2014-07-07 9:21 ` Simon Horman
9 siblings, 0 replies; 10+ messages in thread
From: Stefano Stabellini @ 2014-07-04 11:27 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, 1 Jul 2014, Russell King wrote:
> ARMv6 and greater introduced a new instruction ("bx") which can be used
> to return from function calls. Recent CPUs perform better when the
> "bx lr" instruction is used rather than the "mov pc, lr" instruction,
> and this sequence is strongly recommended to be used by the ARM
> architecture manual (section A.4.1.1).
>
> We provide a new macro "ret" with all its variants for the condition
> code which will resolve to the appropriate instruction.
>
> Rather than doing this piecemeal, and miss some instances, change all
> the "mov pc" instances to use the new macro, with the exception of
> the "movs" instruction and the kprobes code. This allows us to detect
> the "mov pc, lr" case and fix it up - and also gives us the possibility
> of deploying this for other registers depending on the CPU selection.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
For the Xen changes:
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
[not found] <E1X20Rs-00082S-KI@rmk-PC.arm.linux.org.uk>
` (7 preceding siblings ...)
2014-07-04 11:27 ` Stefano Stabellini
@ 2014-07-04 14:24 ` Uwe Kleine-König
2014-07-07 9:21 ` Simon Horman
9 siblings, 0 replies; 10+ messages in thread
From: Uwe Kleine-König @ 2014-07-04 14:24 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jul 01, 2014 at 04:58:24PM +0100, Russell King wrote:
> ARMv6 and greater introduced a new instruction ("bx") which can be used
> to return from function calls. Recent CPUs perform better when the
> "bx lr" instruction is used rather than the "mov pc, lr" instruction,
> and this sequence is strongly recommended to be used by the ARM
> architecture manual (section A.4.1.1).
>
> We provide a new macro "ret" with all its variants for the condition
> code which will resolve to the appropriate instruction.
>
> Rather than doing this piecemeal, and miss some instances, change all
> the "mov pc" instances to use the new macro, with the exception of
> the "movs" instruction and the kprobes code. This allows us to detect
> the "mov pc, lr" case and fix it up - and also gives us the possibility
> of deploying this for other registers depending on the CPU selection.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Works fine on my ARM-v7M machine:
$ objdump -d vmlinux | grep -E 'mov.*pc'
8c000022: 46e7 mov pc, ip
8c000028: 46ef mov pc, sp
8c000b26: 46af movne pc, r5
8c0037e0: 4687 mov pc, r0
8c0828d2: 4697 mov pc, r2
8c1213ee: 469f mov pc, r3
Also boots fine.
Tested-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
but I wonder what is the reason to not use bx if \reg != lr.
Thanks
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH] ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
[not found] <E1X20Rs-00082S-KI@rmk-PC.arm.linux.org.uk>
` (8 preceding siblings ...)
2014-07-04 14:24 ` Uwe Kleine-König
@ 2014-07-07 9:21 ` Simon Horman
9 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2014-07-07 9:21 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jul 01, 2014 at 04:58:24PM +0100, Russell King wrote:
> ARMv6 and greater introduced a new instruction ("bx") which can be used
> to return from function calls. Recent CPUs perform better when the
> "bx lr" instruction is used rather than the "mov pc, lr" instruction,
> and this sequence is strongly recommended to be used by the ARM
> architecture manual (section A.4.1.1).
>
> We provide a new macro "ret" with all its variants for the condition
> code which will resolve to the appropriate instruction.
>
> Rather than doing this piecemeal, and miss some instances, change all
> the "mov pc" instances to use the new macro, with the exception of
> the "movs" instruction and the kprobes code. This allows us to detect
> the "mov pc, lr" case and fix it up - and also gives us the possibility
> of deploying this for other registers depending on the CPU selection.
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A conflict in next notification from Stephen Rothwell tells me that this
has made it there but regardless I would like to note that I have
successfully tested this on the following shmobile boards:
Genmai, Koelsh, Lager, Marzen, Bockw, APE6EVM, KZM9D, KZM9G,
Armadillo800 EVA and Mackerel. This covers all but one board (I do not
have access to a Henninger) and all SoCs supported in mainline.
Accordingly, the shmobile portion:
Tested-by: Simon Horman <horms+renesas@verge.net.au>
^ permalink raw reply [flat|nested] 10+ messages in thread