* [PATCH] arm64: mm: Make icache synchronisation logic huge page aware
@ 2014-07-02 10:46 Steve Capper
2014-07-02 10:50 ` Will Deacon
0 siblings, 1 reply; 2+ messages in thread
From: Steve Capper @ 2014-07-02 10:46 UTC (permalink / raw)
To: linux-arm-kernel
The __sync_icache_dcache routine will only flush the dcache for the
first page of a compound page, potentially leading to stale icache
data residing further on in a hugetlb page.
This patch addresses this issue by taking into consideration the
order of the page when flushing the dcache.
Reported-by: Mark Brown <broonie@linaro.org>
Tested-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Steve Capper <steve.capper@linaro.org>
---
arch/arm64/mm/flush.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
index e4193e3..0d64089 100644
--- a/arch/arm64/mm/flush.c
+++ b/arch/arm64/mm/flush.c
@@ -79,7 +79,8 @@ void __sync_icache_dcache(pte_t pte, unsigned long addr)
return;
if (!test_and_set_bit(PG_dcache_clean, &page->flags)) {
- __flush_dcache_area(page_address(page), PAGE_SIZE);
+ __flush_dcache_area(page_address(page),
+ PAGE_SIZE << compound_order(page));
__flush_icache_all();
} else if (icache_is_aivivt()) {
__flush_icache_all();
--
1.9.3
^ permalink raw reply related [flat|nested] 2+ messages in thread* [PATCH] arm64: mm: Make icache synchronisation logic huge page aware
2014-07-02 10:46 [PATCH] arm64: mm: Make icache synchronisation logic huge page aware Steve Capper
@ 2014-07-02 10:50 ` Will Deacon
0 siblings, 0 replies; 2+ messages in thread
From: Will Deacon @ 2014-07-02 10:50 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jul 02, 2014 at 11:46:23AM +0100, Steve Capper wrote:
> The __sync_icache_dcache routine will only flush the dcache for the
> first page of a compound page, potentially leading to stale icache
> data residing further on in a hugetlb page.
>
> This patch addresses this issue by taking into consideration the
> order of the page when flushing the dcache.
>
> Reported-by: Mark Brown <broonie@linaro.org>
> Tested-by: Mark Brown <broonie@linaro.org>
> Signed-off-by: Steve Capper <steve.capper@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Will
> ---
> arch/arm64/mm/flush.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
> index e4193e3..0d64089 100644
> --- a/arch/arm64/mm/flush.c
> +++ b/arch/arm64/mm/flush.c
> @@ -79,7 +79,8 @@ void __sync_icache_dcache(pte_t pte, unsigned long addr)
> return;
>
> if (!test_and_set_bit(PG_dcache_clean, &page->flags)) {
> - __flush_dcache_area(page_address(page), PAGE_SIZE);
> + __flush_dcache_area(page_address(page),
> + PAGE_SIZE << compound_order(page));
> __flush_icache_all();
> } else if (icache_is_aivivt()) {
> __flush_icache_all();
> --
> 1.9.3
>
>
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2014-07-02 10:46 [PATCH] arm64: mm: Make icache synchronisation logic huge page aware Steve Capper
2014-07-02 10:50 ` Will Deacon
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