* [PATCH v2 1/2] ata: Fix the watermark threshold for the APM X-Gene SATA host controller driver. [not found] ` <1405000156-321-2-git-send-email-stripathi@apm.com> @ 2014-07-10 14:45 ` Tejun Heo 0 siblings, 0 replies; 2+ messages in thread From: Tejun Heo @ 2014-07-10 14:45 UTC (permalink / raw) To: linux-arm-kernel On Thu, Jul 10, 2014 at 07:19:15PM +0530, Suman Tripathi wrote: > This patch fixes the watermark threshold of the receive FIFO for the > APM X-Gene SATA host controller driver. Can you please explain what are the effects of these patches? Patch descriptions should include why the specific changes are being made in addition to the description of the changes themselves. What are the implications of applying this patch? Thanks. -- tejun ^ permalink raw reply [flat|nested] 2+ messages in thread
[parent not found: <1405000156-321-3-git-send-email-stripathi@apm.com>]
* [PATCH v2 2/2] arm64: Fix the APM X-Gene SoC SATA PHY clock DTS node csr-mask of the SATA Host Controller 1. [not found] ` <1405000156-321-3-git-send-email-stripathi@apm.com> @ 2014-07-10 14:46 ` Tejun Heo 0 siblings, 0 replies; 2+ messages in thread From: Tejun Heo @ 2014-07-10 14:46 UTC (permalink / raw) To: linux-arm-kernel On Thu, Jul 10, 2014 at 07:19:16PM +0530, Suman Tripathi wrote: > This patch fixes the SATA PHY clock DTS node csr-mask of the > SATA Host controller 1. This patch also fixes the status of > the PHY clock node of SATA Host Controller 1. Ditto. Before, XXX was wrong and as a result YYY didn't work properly. This patch updates ZZZ to fix the issue. -- tejun ^ permalink raw reply [flat|nested] 2+ messages in thread
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[not found] <1405000156-321-1-git-send-email-stripathi@apm.com>
[not found] ` <1405000156-321-2-git-send-email-stripathi@apm.com>
2014-07-10 14:45 ` [PATCH v2 1/2] ata: Fix the watermark threshold for the APM X-Gene SATA host controller driver Tejun Heo
[not found] ` <1405000156-321-3-git-send-email-stripathi@apm.com>
2014-07-10 14:46 ` [PATCH v2 2/2] arm64: Fix the APM X-Gene SoC SATA PHY clock DTS node csr-mask of the SATA Host Controller 1 Tejun Heo
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