From: shawn.guo@freescale.com (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] ARM: smp_scu: enable SCU standby support
Date: Tue, 22 Jul 2014 09:56:14 +0800 [thread overview]
Message-ID: <20140722015613.GN8537@dragon> (raw)
In-Reply-To: <20140721094452.GD16122@arm.com>
On Mon, Jul 21, 2014 at 10:44:52AM +0100, Will Deacon wrote:
> > > > @@ -54,7 +55,7 @@ void scu_enable(void __iomem *scu_base)
> > > > if (scu_ctrl & SCU_ENABLE)
> > > > return;
> > > >
> > > > - scu_ctrl |= SCU_ENABLE;
> > > > + scu_ctrl |= SCU_ENABLE | SCU_STANDBY_ENABLE;
> > >
> > > I don't think this bit exists on all revisions of the A9.
> >
> > Thanks for the info, Will. Is there any side-effect to write the
> > standby bit on those revisions which do not define the bit?
>
> I'm not actually sure what happens at the hardware level, but the TRM is
> pretty clear in its definition of `RESERVED':
>
> `All reserved bits not used by the implementation must be written as 0 and
> read as 0.'
Okay. Can you please tell which revisions of A9 do not implement this
standby bit, so that I can check and skip them? The oldest revision I
can find on http://infocenter.arm.com/ is r2p0, which already implements
the bit.
Shawn
next prev parent reply other threads:[~2014-07-22 1:56 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-21 7:45 [PATCH 0/3] Enable SCU standby support at core level Shawn Guo
2014-07-21 7:45 ` [PATCH 1/3] ARM: smp_scu: use macro for SCU enable bit Shawn Guo
2014-07-21 7:45 ` [PATCH 2/3] ARM: smp_scu: enable SCU standby support Shawn Guo
2014-07-21 8:51 ` Will Deacon
2014-07-21 9:27 ` Shawn Guo
2014-07-21 9:44 ` Will Deacon
2014-07-22 1:56 ` Shawn Guo [this message]
2014-07-21 10:26 ` Catalin Marinas
2014-07-22 2:09 ` Shawn Guo
2014-07-22 16:13 ` Catalin Marinas
2014-07-23 4:50 ` Shawn Guo
2014-07-23 16:45 ` Catalin Marinas
2014-07-24 8:49 ` Shawn Guo
2014-07-21 7:45 ` [PATCH 3/3] ARM: imx: remove SCU standby enable code Shawn Guo
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