From mboxrd@z Thu Jan 1 00:00:00 1970 From: k.khlebnikov@samsung.com (Konstantin Khlebnikov) Date: Tue, 22 Jul 2014 19:36:23 +0400 Subject: [PATCH 1/2] ARM: LPAE: load upper bits of early TTBR0/TTBR1 Message-ID: <20140722153623.25088.37742.stgit@buzz> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This patch fixes booting when idmap pgd lays above 4gb. Commit 4756dcbfd37 mostly had fixed this, but it'd failed to load upper bits. Also this fixes adding TTBR1_OFFSET to TTRR1: if lower part overflows carry flag must be added to the upper part. Signed-off-by: Konstantin Khlebnikov Cc: Cyril Chemparathy Cc: Vitaly Andrianov --- arch/arm/mm/proc-v7-3level.S | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S index 22e3ad6..f0481dd 100644 --- a/arch/arm/mm/proc-v7-3level.S +++ b/arch/arm/mm/proc-v7-3level.S @@ -140,12 +140,11 @@ ENDPROC(cpu_v7_set_pte_ext) mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits addls \ttbr1, \ttbr1, #TTBR1_OFFSET - mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1 + adcls \tmp, \tmp, #0 + mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1 mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits - mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0 - mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1 - mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0 + mcrr p15, 0, \ttbr0, \tmp, c2 @ load TTBR0 .endm /*