From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/3] arm64: fix typo in I-cache policy detection
Date: Wed, 6 Aug 2014 13:43:29 +0100 [thread overview]
Message-ID: <20140806124329.GL25953@arm.com> (raw)
In-Reply-To: <1407230757-15305-1-git-send-email-ard.biesheuvel@linaro.org>
On Tue, Aug 05, 2014 at 10:25:55AM +0100, Ard Biesheuvel wrote:
> This removes an unfortunately placed semi-colon resulting in all instruction
> caches being classified as AIVIVT.
>
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Acked-by: Mark Rutland <mark.rutland@arm.com>
> ---
> v2: add ack
Cheers Ard, I'll take this patch into our fixes branch.
Will
prev parent reply other threads:[~2014-08-06 12:43 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-05 9:25 [PATCH v2 1/3] arm64: fix typo in I-cache policy detection Ard Biesheuvel
2014-08-05 9:25 ` [PATCH v2 2/3] arm64: add helper functions to read I-cache attributes Ard Biesheuvel
2014-08-06 13:00 ` Will Deacon
2014-08-06 13:17 ` Ard Biesheuvel
2014-08-06 13:27 ` Ard Biesheuvel
2014-08-06 14:34 ` Will Deacon
2014-08-06 14:38 ` Ard Biesheuvel
2014-08-05 9:25 ` [PATCH v2 3/3] arm64: don't flag non-aliasing VIPT I-caches as aliasing Ard Biesheuvel
2014-08-06 12:43 ` Will Deacon [this message]
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