From mboxrd@z Thu Jan  1 00:00:00 1970
From: catalin.marinas@arm.com (Catalin Marinas)
Date: Thu, 14 Aug 2014 13:58:24 +0100
Subject: [PATCH v7 07/11] arm64: mm: Implement 4 levels of translation
 tables
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On Thu, Aug 14, 2014 at 12:42:12PM +0100, Ganapatrao Kulkarni wrote:
> IMHO, the Macro MAX_PHYSMEM_BITS needs to be set to 48 in file
> arch/arm64/include/asm/sparsemem.h
> 
> with 40 bit set, for RAM address beyond 40 bit,  seeeing below warning message.
> WARNING: CPU: 0 PID: 0 at mm/sparse.c:164
> mminit_validate_memmodel_limits+0xf8/0x118()

I agree. Would you mind sending a patch?

Thanks.

-- 
Catalin