[PATCH v7 2/3] ahci_xgene: Skip the PHY and clock initialization if already configured by the firmware.

[PATCH v7 2/3] ahci_xgene: Skip the PHY and clock initialization if already configured by the firmware.

[Tejun Heo]

On Tue, Aug 19, 2014 at 12:01:50PM +0530, Suman Tripathi wrote:
> This patch implements the feature to skip the PHY and clock
> initialization if it is already configured by the firmware.
> 
> Signed-off-by: Loc Ho <lho@apm.com>
> Signed-off-by: Suman Tripathi <stripathi@apm.com>
...
> +static int xgene_ahci_is_memram_inited(struct xgene_ahci_context *ctx)
> +{
> +	void __iomem *diagcsr = ctx->csr_diag;
> +
> +	if (readl(diagcsr + CFG_MEM_RAM_SHUTDOWN) == 0 &&
> +	    readl(diagcsr + BLOCK_MEM_RDY) == 0xFFFFFFFF)
> +		return 1;
> +	return 0;
> +}

Please make it return bool.

Thanks.

-- 
tejun

[PATCH v7 3/3] ahci_xgene: Fix the link down in first attempt for the APM X-Gene SoC AHCI SATA host controller driver.

[Tejun Heo]

On Tue, Aug 19, 2014 at 12:01:51PM +0530, Suman Tripathi wrote:
> The link down issue in first attempt happens due to 2 H/W errata below:
> 
> 1. Due to HW errata, during speed negotiation, sometimes controller
> is not able to detect ALIGN at GEN3(6Gbps) within 54.6us results in
> a timeout. This issue can be recovered by issuing a COMRESET again.
> 
> 2. Due to HW errata, although ALIGH detection is successfull, due to
> 8b/10b and disparity BERR, sometimes the signature from the drive is
> not received successfully by the Host controller. Due to this the
> communication with the host and drive is not established due to
> locking of CDR(clock and data recovery) circuit. This issue can be
> recovered by issuing a COMRESET again.
> 
> This patch fixes the above issues by retrying the COMRESET with a
> maximum attempts of 3.

It's kinda nasty but if it's necessary.  That said, can you please
update the comment so that it actually matches the code?  Also,
Wouldn't it be better to check how the reset failed before retrying?

Thanks.

-- 
tejun

[PATCH v7 3/3] ahci_xgene: Fix the link down in first attempt for the APM X-Gene SoC AHCI SATA host controller driver.

[Tejun Heo]

On Thu, Aug 21, 2014 at 01:48:00PM +0530, Suman Tripathi wrote:
> [suman] : The problem is COMRESET didn't failed. I meant the hardreset is
> successful (return 0) but the device is not detected even if device is
> present due to speed negotiation failure. For that reason I check for the
> Pxstatus and retried.

Alright, please update the comment to explain what's going on.

Thanks.

-- 
tejun