* [PATCH 1/3] ARM: shmobile: sh73a0: Remove spurious 0x from SCIFB clock name
2014-08-25 1:09 [GIT PULL] Renesas ARM Based SoC Clock Fixes For v3.17 Simon Horman
@ 2014-08-25 1:09 ` Simon Horman
2014-08-25 1:09 ` [PATCH 2/3] ARM: shmobile: r8a7790: add missing 0x0100 for SDCKCR Simon Horman
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2014-08-25 1:09 UTC (permalink / raw)
To: linux-arm-kernel
A stray '0x' crept into a0f7e7496d56ac2d ("ARM: shmobile: sh73a0: add CMT1
clock support for DT"). This patch removes it.
This change should not have any run-time affect at this time as
the clock in question is used by a SCIF device that is not enabled by
default.
Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/clock-sh73a0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 0d77f65..b0993a5 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -644,7 +644,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
CLKDEV_DEV_ID("e6cb0000.serial", &mstp_clks[MSTP207]), /* SCIFA5 */
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
- CLKDEV_DEV_ID("0xe6c3000.serial", &mstp_clks[MSTP206]), /* SCIFB */
+ CLKDEV_DEV_ID("e6c3000.serial", &mstp_clks[MSTP206]), /* SCIFB */
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]), /* SCIFA0 */
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
--
2.0.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/3] ARM: shmobile: r8a7790: add missing 0x0100 for SDCKCR
2014-08-25 1:09 [GIT PULL] Renesas ARM Based SoC Clock Fixes For v3.17 Simon Horman
2014-08-25 1:09 ` [PATCH 1/3] ARM: shmobile: sh73a0: Remove spurious 0x from SCIFB clock name Simon Horman
@ 2014-08-25 1:09 ` Simon Horman
2014-08-25 1:09 ` [PATCH 3/3] ARM: shmobile: r8a7791: " Simon Horman
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2014-08-25 1:09 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
9f13ee6f83c52065112d3e396e42e3780911ef53
(ARM: shmobile: r8a7790: add div4 clocks)
added r8a7790 DIV4 clock support.
But, it is missing
"0x0100: x 1/8" division ratio.
This patch fixes hidden bug.
It is based on R-Car H2 v0.7, R-Car M2 v0.9.
Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 296a057..c62bfe7 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -181,8 +181,8 @@ enum {
static struct clk div4_clks[DIV4_NR] = {
[DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT),
- [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT),
- [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1de0, CLK_ENABLE_ON_INIT),
+ [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT),
+ [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1df0, CLK_ENABLE_ON_INIT),
};
/* DIV6 clocks */
--
2.0.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 3/3] ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR
2014-08-25 1:09 [GIT PULL] Renesas ARM Based SoC Clock Fixes For v3.17 Simon Horman
2014-08-25 1:09 ` [PATCH 1/3] ARM: shmobile: sh73a0: Remove spurious 0x from SCIFB clock name Simon Horman
2014-08-25 1:09 ` [PATCH 2/3] ARM: shmobile: r8a7790: add missing 0x0100 for SDCKCR Simon Horman
@ 2014-08-25 1:09 ` Simon Horman
2014-08-26 9:09 ` [GIT PULL] Renesas ARM Based SoC Clock Fixes For v3.17 Simon Horman
2014-08-27 22:15 ` Olof Johansson
4 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2014-08-25 1:09 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
4bfb358b1d6cdeff8c6a13677f01ed78e9696b98
(ARM: shmobile: Add r8a7791 legacy SDHI clocks)
added r8a7791 SDHI clock support.
But, it is missing
"0x0100: x 1/8" division ratio.
This patch fixes hidden bug.
It is based on R-Car H2 v0.7, R-Car M2 v0.9.
Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/clock-r8a7791.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index e2fdfcc..53161c4 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -152,7 +152,7 @@ enum {
static struct clk div4_clks[DIV4_NR] = {
[DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT),
- [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT),
+ [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT),
};
/* DIV6 clocks */
--
2.0.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [GIT PULL] Renesas ARM Based SoC Clock Fixes For v3.17
2014-08-25 1:09 [GIT PULL] Renesas ARM Based SoC Clock Fixes For v3.17 Simon Horman
` (2 preceding siblings ...)
2014-08-25 1:09 ` [PATCH 3/3] ARM: shmobile: r8a7791: " Simon Horman
@ 2014-08-26 9:09 ` Simon Horman
2014-08-27 22:15 ` Olof Johansson
4 siblings, 0 replies; 6+ messages in thread
From: Simon Horman @ 2014-08-26 9:09 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Aug 25, 2014 at 10:09:47AM +0900, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC clock fixes for v3.17.
>
> This pull request is based on third round of Renesas ARM based SoC
> lock updates for v3.17, tagged as renesas-clock3-for-v3.17,
> which you have previously pulled.
>
> I would like the first to patches considered for -stable.
On reflection as these fixes do not fix any run-time problems
I would like to withdraw my request for them to considered for -stable.
I would, however, still like them considered for v3.17.
Thanks
> The following changes since commit a0f7e7496d56ac2da7c684e2035815318c17973a:
>
> ARM: shmobile: sh73a0: add CMT1 clock support for DT (2014-07-15 13:34:17 +0900)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-clock-fixes-for-v3.17
>
> for you to fetch changes up to 58b80ad6472c0fa12926dfa1f9103d3a326bdf18:
>
> ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR (2014-08-22 09:59:54 +0900)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC Clock Fixes For v3.17
>
> * ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR
>
> This resolves a problem introduced by 4bfb358b1d6cdeff
> ("ARM: shmobile: Add r8a7791 legacy SDHI clocks")
> which was included in v3.15.
>
> This fix does not have any run-time affect at this time.
>
> * ARM: shmobile: r8a7790: add missing 0x0100 for SDCKCR
>
> This resolves a problem introduced by 9f13ee6f83c52065
> ("ARM: shmobile: r8a7790: add div4 clocks")
> which was included in v3.11.
>
> This fix does not have any run-time affect at this time.
>
> * ARM: shmobile: sh73a0: Remove spurious 0x from SCIFB clock name
>
> This resolves a problem introduced by a0f7e7496d56ac2d
> ("ARM: shmobile: sh73a0: add CMT1 clock support for DT")
> which was included in v3.17-rc1.
>
> This fix does not have any run-time affect at this time as the clock in
> question is used by a SCIF device that is not enabled by default.
>
> ----------------------------------------------------------------
> Kuninori Morimoto (2):
> ARM: shmobile: r8a7790: add missing 0x0100 for SDCKCR
> ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCR
>
> Simon Horman (1):
> ARM: shmobile: sh73a0: Remove spurious 0x from SCIFB clock name
>
> arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++--
> arch/arm/mach-shmobile/clock-r8a7791.c | 2 +-
> arch/arm/mach-shmobile/clock-sh73a0.c | 2 +-
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
^ permalink raw reply [flat|nested] 6+ messages in thread* [GIT PULL] Renesas ARM Based SoC Clock Fixes For v3.17
2014-08-25 1:09 [GIT PULL] Renesas ARM Based SoC Clock Fixes For v3.17 Simon Horman
` (3 preceding siblings ...)
2014-08-26 9:09 ` [GIT PULL] Renesas ARM Based SoC Clock Fixes For v3.17 Simon Horman
@ 2014-08-27 22:15 ` Olof Johansson
4 siblings, 0 replies; 6+ messages in thread
From: Olof Johansson @ 2014-08-27 22:15 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Aug 25, 2014 at 10:09:47AM +0900, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC clock fixes for v3.17.
>
> This pull request is based on third round of Renesas ARM based SoC
> lock updates for v3.17, tagged as renesas-clock3-for-v3.17,
> which you have previously pulled.
>
> I would like the first to patches considered for -stable.
>
>
> The following changes since commit a0f7e7496d56ac2da7c684e2035815318c17973a:
>
> ARM: shmobile: sh73a0: add CMT1 clock support for DT (2014-07-15 13:34:17 +0900)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-clock-fixes-for-v3.17
Merged.
-Olof
^ permalink raw reply [flat|nested] 6+ messages in thread