[PATCH 6/7] ARM: dts: sun6i: Add required ahb1 clock parent and rates for dma controller

Maxime Ripard
2014-09-11T21:15:31Z

On Sat, Sep 06, 2014 at 06:47:27PM +0800, Chen-Yu Tsai wrote:
> The DMA controller requires AHB1 bus clock to be clocked from PLL6.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
> arch/arm/boot/dts/sun6i-a31.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> index 8eb2c6d..1117989 100644
> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -317,6 +317,11 @@
> clocks = <&ahb1_gates 6>;
> resets = <&ahb1_rst 6>;
> #dma-cells = <1>;
> +
> + /* DMA controller requires AHB1 clocked from PLL6 */
> + assigned-clocks = <&ahb1>;
> + assigned-clock-parents = <&pll6>;
> + assigned-clock-rates = <200000000>;

Where did you get that from?

The user manual says that it should be clocked at 600MHz, and I'm not
sure it should be enforced there either.

Thanks!
Maxime

--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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