From: alexandre.belloni@free-electrons.com (Alexandre Belloni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 4/7] ARM: l2c: Add support for overriding prefetch settings
Date: Fri, 19 Sep 2014 11:50:01 +0200 [thread overview]
Message-ID: <20140919095000.GF29620@piout.net> (raw)
In-Reply-To: <1409062680-15906-5-git-send-email-t.figa@samsung.com>
On 26/08/2014 at 16:17:57 +0200, Tomasz Figa wrote :
> Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch
> settings configured in registers leading to crashes if L2C is enabled
> without overriding them. This patch introduces bindings to enable
> prefetch settings to be specified from DT and necessary support in the
> driver.
>
> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Tested-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
It is working and useful on Atmel's sama5d4 were the bootloader is not
configuring the L2C prefetch. However, I'm wondering whether we should
add support for setting L310_PREFETCH_CTRL_DATA_PREFETCH and
L310_PREFETCH_CTRL_INSTR_PREFETCH. I'm currently doing it by using
".l2c_aux_val = L310_AUX_CTRL_DATA_PREFETCH |
L310_AUX_CTRL_INSTR_PREFETCH" (those are the same bits) but this has the
disadvantage of displaying the "L2C: platform modifies aux control
register:" twice.
> + if (!of_property_read_u32(np, "arm,prefetch-offset", &val)) {
> + prefetch &= ~L310_PREFETCH_CTRL_OFFSET_MASK;
> + prefetch |= val & L310_PREFETCH_CTRL_OFFSET_MASK;
> + }
> +
While you use val directly here, later, while printing the offset, val +
1 is used. Maybe it would be better to have the same number in both
places, else you end up with having "arm,prefetch-offset = <1>" in your
DT and the kernel printing "L2C-310 ID prefetch enabled, offset 2
lines".
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
next prev parent reply other threads:[~2014-09-19 9:50 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-26 14:17 [PATCH v4 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs Tomasz Figa
2014-08-26 14:17 ` [PATCH v4 1/7] ARM: l2c: Refactor the driver to use commit-like interface Tomasz Figa
2014-08-26 14:17 ` [PATCH v4 2/7] ARM: l2c: Add interface to ask hypervisor to configure L2C Tomasz Figa
2014-08-26 14:17 ` [PATCH v4 3/7] ARM: l2c: Get outer cache .write_sec callback from mach_desc only if not NULL Tomasz Figa
2014-08-26 14:17 ` [PATCH v4 4/7] ARM: l2c: Add support for overriding prefetch settings Tomasz Figa
2014-09-19 9:50 ` Alexandre Belloni [this message]
2014-09-19 16:39 ` Russell King - ARM Linux
2014-09-19 18:30 ` Alexandre Belloni
2014-09-20 8:31 ` Russell King - ARM Linux
2014-08-26 14:17 ` [PATCH v4 5/7] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 Tomasz Figa
2014-09-15 8:58 ` Russell King - ARM Linux
2014-09-15 21:27 ` Tomasz Figa
2014-08-26 14:17 ` [PATCH v4 6/7] ARM: EXYNOS: Add support for non-secure L2X0 resume Tomasz Figa
2014-09-15 9:03 ` Russell King - ARM Linux
2014-09-15 21:31 ` Tomasz Figa
2014-08-26 14:18 ` [PATCH v4 7/7] ARM: dts: exynos4: Add nodes for L2 cache controller Tomasz Figa
2014-09-14 17:50 ` [PATCH v4 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs Tomasz Figa
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