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From: mturquette@linaro.org (Mike Turquette)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/7] clk: sun6i: Unify AHB1 clock and fix rate calculation
Date: Thu, 25 Sep 2014 17:25:44 -0700	[thread overview]
Message-ID: <20140926002544.19023.39287@quantum> (raw)
In-Reply-To: <20140911203623.GJ31276@lukather>

Quoting Maxime Ripard (2014-09-11 13:36:23)
> Hi Chen-Yu,
> 
> On Sat, Sep 06, 2014 at 06:47:21PM +0800, Chen-Yu Tsai wrote:
> > Hi everyone,
> > 
> > This series unifies the mux and divider parts of the AHB1 clock found
> > on sun6i and sun8i, while also adding support for the pre-divider on
> > the PLL6 input.
> > 
> > The rate calculation logic must factor in which parent it is using to
> > calculate the rate, to decide whether to use the pre-divider or not.
> > This is beyond the original factors clk design in sunxi. To avoid
> > feature bloat, this is implemented as a seperate composite clk.
> > 
> > The new clock driver is registered with a separate OF_CLK_DECLARE.
> > This is done so that assigned-clocks* properties on the clk provider
> > node can actually work. The clock framework arranges the clock setup
> > order by checking whether all clock parents are available, by checking
> > the node matching OF_CLK_DECLARE.
> > 
> > However, the sunxi clk driver is based on the root node compatible,
> > has no defined dependencies (parents), and is setup before the fixed-rate
> > clocks. Thus when the ahb1 clock is added, all parents have rate = 0.
> > There is no way to calculate the required clock factors to set a default
> > clock rate under these circumstances. This happens when we set the
> > defaults in the clock node (provider), rather than a clock consumer.
> >
> > I can think of 2 ways to solve the dependency issue, but neither is
> > pretty. One would be to move the root fixed-rate clocks into the sunxi
> > clk driver. The other would be separating all the clocks into individual
> > OF_CLK_DECLARE statements, which adds a lot of boilerplate code.
> 
> I don't know what Mike thinks of this, but I'd prefer the second.

I do not fully understand the problem. Ideally the clock driver should
have some way to fail with EPROBE_DEFER until the fixed-rate clocks are
registered. Those fixed-rate parents are enumerated in your dts, right?
Why isn't this enough?

Thanks,
Mike

> 
> Maxime
> 
> -- 
> Maxime Ripard, Free Electrons
> Embedded Linux, Kernel and Android engineering
> http://free-electrons.com

  reply	other threads:[~2014-09-26  0:25 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-06 10:47 [PATCH 0/7] clk: sun6i: Unify AHB1 clock and fix rate calculation Chen-Yu Tsai
2014-09-06 10:47 ` [PATCH 1/7] clk: sunxi: Add post clk divider for factor clocks Chen-Yu Tsai
2014-09-11 20:36   ` Maxime Ripard
2014-09-13 14:43   ` Emilio López
2014-09-16  8:11     ` [linux-sunxi] " Chen-Yu Tsai
2014-09-16 15:57     ` Maxime Ripard
2014-09-24 15:35       ` Chen-Yu Tsai
2014-09-27  7:07         ` Maxime Ripard
2014-09-27  7:23           ` Chen-Yu Tsai
2014-09-06 10:47 ` [PATCH 2/7] clk: sunxi: Fix PLL6 calculation on sun6i Chen-Yu Tsai
2014-09-11 20:38   ` Maxime Ripard
2014-09-06 10:47 ` [PATCH 3/7] clk: sunxi: unify sun6i AHB1 clock with proper PLL6 pre-divider Chen-Yu Tsai
2014-09-11 21:02   ` Maxime Ripard
2014-09-12  3:16     ` Chen-Yu Tsai
2014-09-13 10:26       ` Maxime Ripard
2014-09-25 23:03         ` Mike Turquette
2014-09-26  8:28           ` Maxime Ripard
2014-09-06 10:47 ` [PATCH 4/7] ARM: dts: sun8i: Unify ahb1 clock nodes Chen-Yu Tsai
2014-09-06 10:47 ` [PATCH 5/7] ARM: dts: sun6i: " Chen-Yu Tsai
2014-09-06 10:47 ` [PATCH 6/7] ARM: dts: sun6i: Add required ahb1 clock parent and rates for dma controller Chen-Yu Tsai
2014-09-11 21:15   ` Maxime Ripard
2014-09-12  2:10     ` Chen-Yu Tsai
2014-09-16 15:48       ` Maxime Ripard
2014-09-16 16:01         ` Chen-Yu Tsai
2014-09-20  9:59           ` Maxime Ripard
2014-09-21  8:31             ` Chen-Yu Tsai
2014-09-25 13:41               ` Maxime Ripard
2014-09-06 10:47 ` [PATCH 7/7] dmaengine: sun6i: Remove obsolete clk muxing code Chen-Yu Tsai
2014-09-11 21:16   ` Maxime Ripard
2014-09-24  5:10   ` Vinod Koul
2014-09-11 20:36 ` [PATCH 0/7] clk: sun6i: Unify AHB1 clock and fix rate calculation Maxime Ripard
2014-09-26  0:25   ` Mike Turquette [this message]
2014-09-26  0:55     ` Chen-Yu Tsai
2014-09-26 18:53       ` Mike Turquette
2014-10-09  3:16         ` Chen-Yu Tsai
2014-10-13 10:39           ` Maxime Ripard

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