From: andrew@lunn.ch (Andrew Lunn)
To: linux-arm-kernel@lists.infradead.org
Subject: mvebu: tclk detection for armada-xp and marvell packet processor with integrated CPU
Date: Mon, 17 Nov 2014 22:55:43 +0100 [thread overview]
Message-ID: <20141117215543.GC4080@lunn.ch> (raw)
In-Reply-To: <546A5714.2090100@alliedtelesis.co.nz>
> Yeah I'm still trying to wrestle that information out of Marvell. What I
> do know is for the eval board I've got the armada register SAR (offset
> 0x18230) is all zeros. I'm not sure if this is because everything really
> strapped low or because this register is unused on the PP.
Do the CPU SAR pins even make it out of the package? It could be when
the synthesised the CPU they hard coded it all and throw away the SAR.
Andrew
next prev parent reply other threads:[~2014-11-17 21:55 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-17 2:12 mvebu: tclk detection for armada-xp and marvell packet processor with integrated CPU Chris Packham
2014-11-17 8:34 ` Thomas Petazzoni
2014-11-17 14:18 ` Andrew Lunn
2014-11-17 20:18 ` Chris Packham
2014-11-17 21:32 ` Andrew Lunn
2014-11-17 20:14 ` Chris Packham
2014-11-17 21:55 ` Andrew Lunn [this message]
2014-11-17 22:07 ` Chris Packham
2014-11-18 0:39 ` Marcin Wojtas
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