From mboxrd@z Thu Jan 1 00:00:00 1970 From: catalin.marinas@arm.com (Catalin Marinas) Date: Fri, 28 Nov 2014 14:16:48 +0000 Subject: [PATCH v4] clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers In-Reply-To: <5475CC66.6080600@linaro.org> References: <1412753627-28287-1-git-send-email-sonnyrao@chromium.org> <5475CC66.6080600@linaro.org> Message-ID: <20141128141648.GB4249@localhost> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, Nov 26, 2014 at 12:49:42PM +0000, Daniel Lezcano wrote: > On 10/08/2014 09:33 AM, Sonny Rao wrote: > > From: Doug Anderson > > > > Some 32-bit (ARMv7) systems are architected like this: > > > > * The firmware doesn't know and doesn't care about hypervisor mode and > > we don't want to add the complexity of hypervisor there. > > > > * The firmware isn't involved in SMP bringup or resume. > > > > * The ARCH timer come up with an uninitialized offset (CNTVOFF) > > between the virtual and physical counters. Each core gets a > > different random offset. > > > > * The device boots in "Secure SVC" mode. > > > > * Nothing has touched the reset value of CNTHCTL.PL1PCEN or > > CNTHCTL.PL1PCTEN (both default to 1 at reset) > > > > On systems like the above, it doesn't make sense to use the virtual > > counter. There's nobody managing the offset and each time a core goes > > down and comes back up it will get reinitialized to some other random > > value. > > > > This adds an optional property which can inform the kernel of this > > situation, and firmware is free to remove the property if it is going > > to initialize the CNTVOFF registers when each CPU comes out of reset. > > > > Currently, the best course of action in this case is to use the > > physical timer, which is why it is important that CNTHCTL hasn't been > > changed from its reset value and it's a reasonable assumption given > > that the firmware has never entered HYP mode. > > > > Note that it's been said that on ARMv8 systems the firmware and > > kernel really can't be architected as described above. That means > > using the physical timer like this really only makes sense for ARMv7 > > systems. > > > > Signed-off-by: Doug Anderson > > Signed-off-by: Sonny Rao > > Reviewed-by: Mark Rutland > > Acked-by: Daniel Lezcano > > I would be nice to have Catalin's ack. FWIW: Acked-by: Catalin Marinas