[PATCH v7 0/5] ARM64: Add support for FSL's LS2085A SoC

[PATCH v7 0/5] ARM64: Add support for FSL's LS2085A SoC

[Bhupesh Sharma]

This patchset adds the support for FSL's LS2085A SoC which is based on
ARMv8 architecture.

This patchset also has patches which address DT compatible strings for
nodes which appear un-documented.

The enable-method for the CPU nodes is left for the bootloader (u-boot or UEFI)
to patch-up which is expected to be PSCI v0.2

This patchset has been tested with the following patches which add PSCI
v0.2 support in ARMv8 u-boot:
http://patchwork.ozlabs.org/patch/383556/
http://patchwork.ozlabs.org/patch/383555/
http://patchwork.ozlabs.org/patch/383557/
http://patchwork.ozlabs.org/patch/383558/
http://patchwork.ozlabs.org/patch/383559/
http://patchwork.ozlabs.org/patch/383560/
http://patchwork.ozlabs.org/patch/383561/
http://patchwork.ozlabs.org/patch/383562/

Rebased against cleanup/dts-subdirs branch of the arm-soc tree

Changes from v6:
----------------
* Rebased against cleanup/dts-subdirs branch of the arm-soc tree.
* As a result, [PATCH 4/6] and [PATCH 5/6] of the v6 series are squashed
  into one patch ([PATCH 4/5] of this series).

Note:
-----
Optional GIC-500 regs like GICC, GICH and GICV are currently
not tested and hence are not part of the DTS patch.

Please review and consider for merge.

Bhupesh Sharma (5):
  Documentation: DT: Add bindings for FSL NS16550A UART
  Documentation: DT: Add entry for FSL LS2085A SoC and Simulator model
  Documentation: DT: Add entry for FSL Management Complex
  arm64: Add DTS support for FSL's LS2085A SoC
  arm64: Add support for FSL's LS2085A SoC in Kconfig and defconfig

 Documentation/devicetree/bindings/arm/fsl.txt      |    8 +
 .../devicetree/bindings/misc/fsl,qoriq-mc.txt      |   40 +++++
 .../devicetree/bindings/serial/of-serial.txt       |   12 ++
 arch/arm64/Kconfig                                 |    5 +
 arch/arm64/boot/dts/Makefile                       |    1 +
 arch/arm64/boot/dts/{ => freescale}/Makefile       |    4 +-
 arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts |   65 ++++++++
 arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi     |  163 ++++++++++++++++++++
 arch/arm64/configs/defconfig                       |    1 +
 9 files changed, 296 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
 copy arch/arm64/boot/dts/{ => freescale}/Makefile (54%)
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi

-- 
1.7.9.5

[PATCH v7 1/5] Documentation: DT: Add bindings for FSL NS16550A UART

[Bhupesh Sharma]

This patch addss the device-tree documentation for Freescale's
NS16550 UART (also called DUART).

There is a specific errata fix required in FSL NS16550 UART
which ensures that an random interrupt storm is not observed when
a break is provided as an input to the UART.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
---
 .../devicetree/bindings/serial/of-serial.txt       |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/of-serial.txt
index 8c4fd03..1b3220b 100644
--- a/Documentation/devicetree/bindings/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/serial/of-serial.txt
@@ -15,6 +15,7 @@ Required properties:
 	- "altr,16550-FIFO64"
 	- "altr,16550-FIFO128"
 	- "fsl,16550-FIFO64"
+	- "fsl,ns16550"
 	- "serial" if the port type is unknown.
 - reg : offset and length of the register set for the device.
 - interrupts : should contain uart interrupt.
@@ -39,6 +40,17 @@ Optional properties:
   driver is allowed to detect support for the capability even without this
   property.
 
+Note:
+* fsl,ns16550:
+  ------------
+  Freescale DUART is very similar to the PC16552D (and to a
+  pair of NS16550A), albeit with some nonstandard behavior such as
+  erratum A-004737 (relating to incorrect BRK handling).
+
+  Represents a single port that is compatible with the DUART found
+  on many Freescale chips (examples include mpc8349, mpc8548,
+  mpc8641d, p4080 and ls2085a).
+
 Example:
 
 	uart at 80230000 {
-- 
1.7.9.5

[PATCH v7 2/5] Documentation: DT: Add entry for FSL LS2085A SoC and Simulator model

[Bhupesh Sharma]

This patch adds a devicetree binding documentation for FSL's
LS2085A SoC and Simulator model.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
---
 Documentation/devicetree/bindings/arm/fsl.txt |    8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index e935d7d..3b28c4d 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -74,3 +74,11 @@ Required root node properties:
 i.MX6q generic board
 Required root node properties:
     - compatible = "fsl,imx6q";
+
+Freescale LS2085A SoC Device Tree Bindings
+------------------------------------------
+
+LS2085A ARMv8 based Simulator model
+Required root node properties:
+    - compatible = "fsl,ls2085a-simu", "fsl,ls2085a";
+
-- 
1.7.9.5

[PATCH v7 3/5] Documentation: DT: Add entry for FSL Management Complex

[Bhupesh Sharma]

This patch adds a devicetree binding documentation for FSL's
Management Complex.

Management Complex is a hardware resource manager that manages
specialized hardware objects used in network-oriented packet
processing applications

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
---
 .../devicetree/bindings/misc/fsl,qoriq-mc.txt      |   40 ++++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt

diff --git a/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt b/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
new file mode 100644
index 0000000..c7a26ca
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
@@ -0,0 +1,40 @@
+* Freescale Management Complex
+
+The Freescale Management Complex (fsl-mc) is a hardware resource
+manager that manages specialized hardware objects used in
+network-oriented packet processing applications. After the fsl-mc
+block is enabled, pools of hardware resources are available, such as
+queues, buffer pools, I/O interfaces. These resources are building
+blocks that can be used to create functional hardware objects/devices
+such as network interfaces, crypto accelerator instances, L2 switches,
+etc.
+
+Required properties:
+
+    - compatible
+        Value type: <string>
+        Definition: Must be "fsl,qoriq-mc".  A Freescale Management Complex
+                    compatible with this binding must have Block Revision
+                    Registers BRR1 and BRR2 at offset 0x0BF8 and 0x0BFC in
+                    the MC control register region.
+
+    - reg
+        Value type: <prop-encoded-array>
+        Definition: A standard property.  Specifies one or two regions
+                    defining the MC's registers:
+
+                       -the first region is the command portal for the
+                        this machine and must always be present
+
+                       -the second region is the MC control registers. This
+                        region may not be present in some scenarios, such
+                        as in the device tree presented to a virtual machine.
+
+Example:
+
+        fsl_mc: fsl-mc at 80c000000 {
+                compatible = "fsl,qoriq-mc";
+                reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */
+                      <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
+        };
+
-- 
1.7.9.5

[PATCH v7 4/5] arm64: Add DTS support for FSL's LS2085A SoC

[Bhupesh Sharma]

This patch adds the device tree support for FSL LS2085A SoC
based on ARMv8 architecture.

Following levels of DTSI/DTS files have been created for the
LS2085A SoC family:

- fsl-ls2085a.dtsi:
DTS-Include file for FSL LS2085A SoC.

- fsl-ls2085a-simu.dts:
DTS file for FSL LS2085a software simulator model.

In addition, this patch adds build support for FSL's LS2085A
simulator model in arm64 dts Makefile.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnab Basu <arnab_basu@rocketmail.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
---
 arch/arm64/boot/dts/Makefile                       |    1 +
 arch/arm64/boot/dts/{ => freescale}/Makefile       |    4 +-
 arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts |   65 ++++++++
 arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi     |  163 ++++++++++++++++++++
 4 files changed, 230 insertions(+), 3 deletions(-)
 copy arch/arm64/boot/dts/{ => freescale}/Makefile (54%)
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index e8efc8f..23467ae 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -1,6 +1,7 @@
 dts-dirs += apm
 dts-dirs += arm
 dts-dirs += cavium
+dts-dirs += freescale
 
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/freescale/Makefile
similarity index 54%
copy from arch/arm64/boot/dts/Makefile
copy to arch/arm64/boot/dts/freescale/Makefile
index e8efc8f..11fe918 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -1,6 +1,4 @@
-dts-dirs += apm
-dts-dirs += arm
-dts-dirs += cavium
+dtb-$(CONFIG_ARCH_FSL_LS2085A) += fsl-ls2085a-simu.dtb
 
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts b/arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts
new file mode 100644
index 0000000..82e2a6f
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts
@@ -0,0 +1,65 @@
+/*
+ * Device Tree file for Freescale LS2085a software Simulator model
+ *
+ * Copyright (C) 2014, Freescale Semiconductor
+ *
+ * Bhupesh Sharma <bhupesh.sharma@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+/include/ "fsl-ls2085a.dtsi"
+
+/ {
+	model = "Freescale Layerscape 2085a software Simulator model";
+	compatible = "fsl,ls2085a-simu", "fsl,ls2085a";
+
+	ethernet at 2210000 {
+		compatible = "smsc,lan91c111";
+		reg = <0x0 0x2210000 0x0 0x100>;
+		interrupts = <0 58 0x1>;
+	};
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
new file mode 100644
index 0000000..e281ceb
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
@@ -0,0 +1,163 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-2085A family SoC.
+ *
+ * Copyright (C) 2014, Freescale Semiconductor
+ *
+ * Bhupesh Sharma <bhupesh.sharma@freescale.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPLv2 or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ *     You should have received a copy of the GNU General Public
+ *     License along with this library; if not, write to the Free
+ *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ *     MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/ {
+	compatible = "fsl,ls2085a";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		/*
+		 * We expect the enable-method for cpu's to be "psci", but this
+		 * is dependent on the SoC FW, which will fill this in.
+		 *
+		 * Currently supported enable-method is psci v0.2
+		 */
+
+		/* We have 4 clusters having 2 Cortex-A57 cores each */
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57";
+			reg = <0x0 0x0>;
+		};
+
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57";
+			reg = <0x0 0x1>;
+		};
+
+		cpu at 100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57";
+			reg = <0x0 0x100>;
+		};
+
+		cpu at 101 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57";
+			reg = <0x0 0x101>;
+		};
+
+		cpu at 200 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57";
+			reg = <0x0 0x200>;
+		};
+
+		cpu at 201 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57";
+			reg = <0x0 0x201>;
+		};
+
+		cpu at 300 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57";
+			reg = <0x0 0x300>;
+		};
+
+		cpu at 301 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a57";
+			reg = <0x0 0x301>;
+		};
+	};
+
+	memory at 80000000 {
+		device_type = "memory";
+		reg = <0x00000000 0x80000000 0 0x80000000>;
+		      /* DRAM space - 1, size : 2 GB DRAM */
+	};
+
+	gic: interrupt-controller at 6000000 {
+		compatible = "arm,gic-v3";
+		reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
+		      <0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */
+		#interrupt-cells = <3>;
+		interrupt-controller;
+		interrupts = <1 9 0x4>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
+			     <1 14 0x8>, /* Physical Non-Secure PPI, active-low */
+			     <1 11 0x8>, /* Virtual PPI, active-low */
+			     <1 10 0x8>; /* Hypervisor PPI, active-low */
+	};
+
+	serial0: serial at 21c0500 {
+		device_type = "serial";
+		compatible = "fsl,ns16550", "ns16550a";
+		reg = <0x0 0x21c0500 0x0 0x100>;
+		clock-frequency = <0>;	/* Updated by bootloader */
+		interrupts = <0 32 0x1>; /* edge triggered */
+	};
+
+	serial1: serial at 21c0600 {
+		device_type = "serial";
+		compatible = "fsl,ns16550", "ns16550a";
+		reg = <0x0 0x21c0600 0x0 0x100>;
+		clock-frequency = <0>; 	/* Updated by bootloader */
+		interrupts = <0 32 0x1>; /* edge triggered */
+	};
+
+	fsl_mc: fsl-mc at 80c000000 {
+		compatible = "fsl,qoriq-mc";
+		reg = <0x00000008 0x0c000000 0 0x40>,	 /* MC portal base */
+		      <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
+	};
+};
-- 
1.7.9.5

[PATCH v7 5/5] arm64: Add support for FSL's LS2085A SoC in Kconfig and defconfig

[Bhupesh Sharma]

This patch adds support for FSL's LS2085A SoC in the arm64 Kconfig
and defconfig files.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Arnab Basu <arnab_basu@rocketmail.com>
---
 arch/arm64/Kconfig           |    5 +++++
 arch/arm64/configs/defconfig |    1 +
 2 files changed, 6 insertions(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ac9afde..e0798cd 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -141,6 +141,11 @@ source "kernel/Kconfig.freezer"
 
 menu "Platform selection"
 
+config ARCH_FSL_LS2085A
+	bool "Freescale LS2085A SOC"
+	help
+	  This enables support for Freescale LS2085A SOC.
+
 config ARCH_THUNDER
 	bool "Cavium Inc. Thunder SoC Family"
 	help
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 9cd37de..29eff9f 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -32,6 +32,7 @@ CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_ARCH_FSL_LS2085A=y
 CONFIG_ARCH_THUNDER=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_XGENE=y
-- 
1.7.9.5

[PATCH v7 0/5] ARM64: Add support for FSL's LS2085A SoC

[Mark Rutland]

Hi Bhupesh,

The series looks mostly fine to me, though I have a couple of comments
below.

On Mon, Dec 01, 2014 at 02:17:17PM +0000, Bhupesh Sharma wrote:
> This patchset adds the support for FSL's LS2085A SoC which is based on
> ARMv8 architecture.
> 
> This patchset also has patches which address DT compatible strings for
> nodes which appear un-documented.
> 
> The enable-method for the CPU nodes is left for the bootloader (u-boot or UEFI)
> to patch-up which is expected to be PSCI v0.2
> 
> This patchset has been tested with the following patches which add PSCI
> v0.2 support in ARMv8 u-boot:
> http://patchwork.ozlabs.org/patch/383556/
> http://patchwork.ozlabs.org/patch/383555/
> http://patchwork.ozlabs.org/patch/383557/
> http://patchwork.ozlabs.org/patch/383558/
> http://patchwork.ozlabs.org/patch/383559/
> http://patchwork.ozlabs.org/patch/383560/
> http://patchwork.ozlabs.org/patch/383561/
> http://patchwork.ozlabs.org/patch/383562/

Has there been any progress on these? last I saw there was some pending
rework, and I was holding off a thorough review of the PSCI parts until
that had happened.

> 
> Rebased against cleanup/dts-subdirs branch of the arm-soc tree
> 
> Changes from v6:
> ----------------
> * Rebased against cleanup/dts-subdirs branch of the arm-soc tree.
> * As a result, [PATCH 4/6] and [PATCH 5/6] of the v6 series are squashed
>   into one patch ([PATCH 4/5] of this series).
> 
> Note:
> -----
> Optional GIC-500 regs like GICC, GICH and GICV are currently
> not tested and hence are not part of the DTS patch.
> 
> Please review and consider for merge.
> 
> Bhupesh Sharma (5):
>   Documentation: DT: Add bindings for FSL NS16550A UART

Regardless of anything else, this patch should be queued given it adds
missing documentation for a binding already supported by the kernel.

>   Documentation: DT: Add entry for FSL LS2085A SoC and Simulator model
>   Documentation: DT: Add entry for FSL Management Complex

Are there any patches adding support for the management complex? There's
nothing in mainline that uses "fsl,qoriq-mc", and nothing in this series
adds support.

Thanks,
Mark.

>   arm64: Add DTS support for FSL's LS2085A SoC
>   arm64: Add support for FSL's LS2085A SoC in Kconfig and defconfig
> 
>  Documentation/devicetree/bindings/arm/fsl.txt      |    8 +
>  .../devicetree/bindings/misc/fsl,qoriq-mc.txt      |   40 +++++
>  .../devicetree/bindings/serial/of-serial.txt       |   12 ++
>  arch/arm64/Kconfig                                 |    5 +
>  arch/arm64/boot/dts/Makefile                       |    1 +
>  arch/arm64/boot/dts/{ => freescale}/Makefile       |    4 +-
>  arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts |   65 ++++++++
>  arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi     |  163 ++++++++++++++++++++
>  arch/arm64/configs/defconfig                       |    1 +
>  9 files changed, 296 insertions(+), 3 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
>  copy arch/arm64/boot/dts/{ => freescale}/Makefile (54%)
>  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts
>  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
> 
> -- 
> 1.7.9.5
> 
> 
> 

[PATCH v7 0/5] ARM64: Add support for FSL's LS2085A SoC

[Stuart Yoder]

> 
> >   Documentation: DT: Add entry for FSL LS2085A SoC and Simulator model
> >   Documentation: DT: Add entry for FSL Management Complex
> 
> Are there any patches adding support for the management complex? There's
> nothing in mainline that uses "fsl,qoriq-mc", and nothing in this series
> adds support.

Yes.  Patches have been in review for the last few months.  Latest 
patch series:
   https://lkml.org/lkml/2014/11/13/482

Thanks,
Stuart

[PATCH v7 0/5] ARM64: Add support for FSL's LS2085A SoC

[bhupesh.sharma at freescale.com]

Hi Mark,

> -----Original Message-----
> From: Mark Rutland [mailto:mark.rutland at arm.com]
> Sent: Monday, December 01, 2014 10:00 PM
> To: Sharma Bhupesh-B45370
> Cc: arm at kernel.org; Marc Zyngier; Catalin Marinas; arnd at arndb.de; linux-
> arm-kernel at lists.infradead.org; grant.likely at secretlab.ca;
> rob.herring at linaro.org; bhupesh.linux at gmail.com; Yoder Stuart-B08248;
> arnab_basu at rocketmail.com
> Subject: Re: [PATCH v7 0/5] ARM64: Add support for FSL's LS2085A SoC
> 
> Hi Bhupesh,
> 
> The series looks mostly fine to me, though I have a couple of comments
> below.
> 
> On Mon, Dec 01, 2014 at 02:17:17PM +0000, Bhupesh Sharma wrote:
> > This patchset adds the support for FSL's LS2085A SoC which is based on
> > ARMv8 architecture.
> >
> > This patchset also has patches which address DT compatible strings for
> > nodes which appear un-documented.
> >
> > The enable-method for the CPU nodes is left for the bootloader (u-boot
> > or UEFI) to patch-up which is expected to be PSCI v0.2
> >
> > This patchset has been tested with the following patches which add
> > PSCI
> > v0.2 support in ARMv8 u-boot:
> > http://patchwork.ozlabs.org/patch/383556/
> > http://patchwork.ozlabs.org/patch/383555/
> > http://patchwork.ozlabs.org/patch/383557/
> > http://patchwork.ozlabs.org/patch/383558/
> > http://patchwork.ozlabs.org/patch/383559/
> > http://patchwork.ozlabs.org/patch/383560/
> > http://patchwork.ozlabs.org/patch/383561/
> > http://patchwork.ozlabs.org/patch/383562/
> 
> Has there been any progress on these? last I saw there was some pending
> rework, and I was holding off a thorough review of the PSCI parts until
> that had happened.

Arnab Basu has since moved on from Freescale, but he plans to maintain and rework these PSCI related patches
in u-boot.

> 
> >
> > Rebased against cleanup/dts-subdirs branch of the arm-soc tree
> >
> > Changes from v6:
> > ----------------
> > * Rebased against cleanup/dts-subdirs branch of the arm-soc tree.
> > * As a result, [PATCH 4/6] and [PATCH 5/6] of the v6 series are
> squashed
> >   into one patch ([PATCH 4/5] of this series).
> >
> > Note:
> > -----
> > Optional GIC-500 regs like GICC, GICH and GICV are currently not
> > tested and hence are not part of the DTS patch.
> >
> > Please review and consider for merge.
> >
> > Bhupesh Sharma (5):
> >   Documentation: DT: Add bindings for FSL NS16550A UART
> 
> Regardless of anything else, this patch should be queued given it adds
> missing documentation for a binding already supported by the kernel.

Right.

> >   Documentation: DT: Add entry for FSL LS2085A SoC and Simulator model
> >   Documentation: DT: Add entry for FSL Management Complex
> 
> Are there any patches adding support for the management complex? There's
> nothing in mainline that uses "fsl,qoriq-mc", and nothing in this series
> adds support.
> 

Like Stuart mentioned in another thread, the Management Complex related patches 
are already under review.

> 
> >   arm64: Add DTS support for FSL's LS2085A SoC
> >   arm64: Add support for FSL's LS2085A SoC in Kconfig and defconfig
> >
> >  Documentation/devicetree/bindings/arm/fsl.txt      |    8 +
> >  .../devicetree/bindings/misc/fsl,qoriq-mc.txt      |   40 +++++
> >  .../devicetree/bindings/serial/of-serial.txt       |   12 ++
> >  arch/arm64/Kconfig                                 |    5 +
> >  arch/arm64/boot/dts/Makefile                       |    1 +
> >  arch/arm64/boot/dts/{ => freescale}/Makefile       |    4 +-
> >  arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts |   65 ++++++++
> >  arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi     |  163
> ++++++++++++++++++++
> >  arch/arm64/configs/defconfig                       |    1 +
> >  9 files changed, 296 insertions(+), 3 deletions(-)  create mode
> > 100644 Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
> >  copy arch/arm64/boot/dts/{ => freescale}/Makefile (54%)  create mode
> > 100644 arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts
> >  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
> >
> > --
> > 1.7.9.5
> >

Regards,
Bhupesh

[PATCH v7 0/5] ARM64: Add support for FSL's LS2085A SoC

[bhupesh.sharma at freescale.com]

Hi Arm Maintainers,

Its been some time since I posted v7 of this series.

If there are no other reviews comments on the series, can this be pulled into
the ARM SoC tree (arm-soc.git) for merge.

> -----Original Message-----
> From: Sharma Bhupesh-B45370
> Sent: Tuesday, December 02, 2014 1:26 AM
> To: 'Mark Rutland'
> Cc: arm at kernel.org; Marc Zyngier; Catalin Marinas; arnd at arndb.de; linux-
> arm-kernel at lists.infradead.org; grant.likely at secretlab.ca;
> rob.herring at linaro.org; bhupesh.linux at gmail.com; Yoder Stuart-B08248;
> arnab_basu at rocketmail.com
> Subject: RE: [PATCH v7 0/5] ARM64: Add support for FSL's LS2085A SoC
> 
> Hi Mark,
> 
> > -----Original Message-----
> > From: Mark Rutland [mailto:mark.rutland at arm.com]
> > Sent: Monday, December 01, 2014 10:00 PM
> > To: Sharma Bhupesh-B45370
> > Cc: arm at kernel.org; Marc Zyngier; Catalin Marinas; arnd at arndb.de;
> > linux- arm-kernel at lists.infradead.org; grant.likely at secretlab.ca;
> > rob.herring at linaro.org; bhupesh.linux at gmail.com; Yoder Stuart-B08248;
> > arnab_basu at rocketmail.com
> > Subject: Re: [PATCH v7 0/5] ARM64: Add support for FSL's LS2085A SoC
> >
> > Hi Bhupesh,
> >
> > The series looks mostly fine to me, though I have a couple of comments
> > below.
> >
> > On Mon, Dec 01, 2014 at 02:17:17PM +0000, Bhupesh Sharma wrote:
> > > This patchset adds the support for FSL's LS2085A SoC which is based
> > > on
> > > ARMv8 architecture.
> > >
> > > This patchset also has patches which address DT compatible strings
> > > for nodes which appear un-documented.
> > >
> > > The enable-method for the CPU nodes is left for the bootloader
> > > (u-boot or UEFI) to patch-up which is expected to be PSCI v0.2
> > >
> > > This patchset has been tested with the following patches which add
> > > PSCI
> > > v0.2 support in ARMv8 u-boot:
> > > http://patchwork.ozlabs.org/patch/383556/
> > > http://patchwork.ozlabs.org/patch/383555/
> > > http://patchwork.ozlabs.org/patch/383557/
> > > http://patchwork.ozlabs.org/patch/383558/
> > > http://patchwork.ozlabs.org/patch/383559/
> > > http://patchwork.ozlabs.org/patch/383560/
> > > http://patchwork.ozlabs.org/patch/383561/
> > > http://patchwork.ozlabs.org/patch/383562/
> >
> > Has there been any progress on these? last I saw there was some
> > pending rework, and I was holding off a thorough review of the PSCI
> > parts until that had happened.
> 
> Arnab Basu has since moved on from Freescale, but he plans to maintain
> and rework these PSCI related patches in u-boot.
> 
> >
> > >
> > > Rebased against cleanup/dts-subdirs branch of the arm-soc tree
> > >
> > > Changes from v6:
> > > ----------------
> > > * Rebased against cleanup/dts-subdirs branch of the arm-soc tree.
> > > * As a result, [PATCH 4/6] and [PATCH 5/6] of the v6 series are
> > squashed
> > >   into one patch ([PATCH 4/5] of this series).
> > >
> > > Note:
> > > -----
> > > Optional GIC-500 regs like GICC, GICH and GICV are currently not
> > > tested and hence are not part of the DTS patch.
> > >
> > > Please review and consider for merge.
> > >
> > > Bhupesh Sharma (5):
> > >   Documentation: DT: Add bindings for FSL NS16550A UART
> >
> > Regardless of anything else, this patch should be queued given it adds
> > missing documentation for a binding already supported by the kernel.
> 
> Right.
> 
> > >   Documentation: DT: Add entry for FSL LS2085A SoC and Simulator
> model
> > >   Documentation: DT: Add entry for FSL Management Complex
> >
> > Are there any patches adding support for the management complex?
> > There's nothing in mainline that uses "fsl,qoriq-mc", and nothing in
> > this series adds support.
> >
> 
> Like Stuart mentioned in another thread, the Management Complex related
> patches are already under review.
> 
> >
> > >   arm64: Add DTS support for FSL's LS2085A SoC
> > >   arm64: Add support for FSL's LS2085A SoC in Kconfig and defconfig
> > >
> > >  Documentation/devicetree/bindings/arm/fsl.txt      |    8 +
> > >  .../devicetree/bindings/misc/fsl,qoriq-mc.txt      |   40 +++++
> > >  .../devicetree/bindings/serial/of-serial.txt       |   12 ++
> > >  arch/arm64/Kconfig                                 |    5 +
> > >  arch/arm64/boot/dts/Makefile                       |    1 +
> > >  arch/arm64/boot/dts/{ => freescale}/Makefile       |    4 +-
> > >  arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts |   65 ++++++++
> > >  arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi     |  163
> > ++++++++++++++++++++
> > >  arch/arm64/configs/defconfig                       |    1 +
> > >  9 files changed, 296 insertions(+), 3 deletions(-)  create mode
> > > 100644 Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
> > >  copy arch/arm64/boot/dts/{ => freescale}/Makefile (54%)  create
> > > mode
> > > 100644 arch/arm64/boot/dts/freescale/fsl-ls2085a-simu.dts
> > >  create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
> > >
> > > --
> > > 1.7.9.5
> > >
> 
> Regards,
> Bhupesh

Regards,
Bhupesh

[PATCH v7 0/5] ARM64: Add support for FSL's LS2085A SoC

[Olof Johansson]

Hi,

On Mon, Dec 8, 2014 at 7:09 AM, bhupesh.sharma at freescale.com
<bhupesh.sharma@freescale.com> wrote:
> Hi Arm Maintainers,
>
> Its been some time since I posted v7 of this series.
>
> If there are no other reviews comments on the series, can this be pulled into
> the ARM SoC tree (arm-soc.git) for merge.

The merge window just opened, so please repost the series to
arm at kernel.org once it has closed (when 3.19-rc1 is out).


Thanks,

-Olof