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From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCHv5 5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC
Date: Tue, 2 Dec 2014 15:01:18 +0000	[thread overview]
Message-ID: <20141202150118.GM23671@leverpostej> (raw)
In-Reply-To: <547CD3ED.1080804@opensource.altera.com>

Hi Thor,

On Mon, Dec 01, 2014 at 08:47:41PM +0000, Thor Thayer wrote:
> Hi Boris,
> 
> On 11/18/2014 02:56 PM, Thor Thayer wrote:
> > Hi all,
> >
> > On 11/11/2014 06:14 PM, tthayer at opensource.altera.com wrote:
> >> From: Thor Thayer<tthayer@opensource.altera.com>
> >>
> >> Adding the device tree entries and bindings needed to support
> >> the Altera L2 cache and On-Chip RAM EDAC. This patch relies upon
> >> an earlier patch to declare and setup On-chip RAM properly.
> >> http://www.spinics.net/lists/devicetree/msg51117.html
> >
> > Any comments on these devicetree additions?
> >
> > Thanks,
> > Thor
> >> Signed-off-by: Thor Thayer<tthayer@opensource.altera.com>
> >> ---
> >> v2: Remove OCRAM declaration and reference prior patch.
> >>
> >> v3-5: No Change
> >> ---
> 
> I originally submitted this series on November 11, 2014.
> 
> I haven't received any comments or ACKs on the device tree patch portion 
> (patch 5 of 5). According to 
> Documentation/devicetree/bindings/submitting-patches.txt, if the patch 
> hasn't been Acked after a couple of weeks, the maintainer can pull the 
> changes if they are comfortable with those changes.

Apologies it has taken so long for this to be looked at. Unfortunately
my inbox is overflowing (as are all of ours) and things fall by the
wayside. I am sorry that this has lead to such a delayed response,
especially given that it was negative.

I'll try to keep up with this a bit more actively.

Thanks,
Mark.

  reply	other threads:[~2014-12-02 15:01 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-12  0:14 [PATCHv5 0/5] Add Altera peripheral memories to EDAC framework tthayer at opensource.altera.com
2014-11-12  0:14 ` [PATCHv5 1/5] arm: socfpga: Enable L2 Cache ECC on startup tthayer at opensource.altera.com
2014-11-12  7:32   ` Dinh Nguyen
2014-11-12  0:14 ` [PATCHv5 2/5] arm: socfpga: Enable OCRAM " tthayer at opensource.altera.com
2014-11-12  7:33   ` Dinh Nguyen
2014-12-02 15:11   ` Mark Rutland
2014-12-02 17:54     ` Thor Thayer
2014-11-12  0:14 ` [PATCHv5 3/5] edac: altera: Remove SDRAM module compile tthayer at opensource.altera.com
2014-11-12  0:14 ` [PATCHv5 4/5] edac: altera: Add Altera L2 Cache and OCRAM EDAC Support tthayer at opensource.altera.com
2014-12-02 15:25   ` Mark Rutland
2014-12-02 17:55     ` Thor Thayer
2014-11-12  0:14 ` [PATCHv5 5/5] arm: dts: Add Altera L2 Cache and OCRAM EDAC tthayer at opensource.altera.com
2014-11-18 20:56   ` [RESEND PATCHv5 " Thor Thayer
2014-12-01 20:47     ` Thor Thayer
2014-12-02 15:01       ` Mark Rutland [this message]
2014-12-02 17:51         ` Thor Thayer
2014-12-02 14:57   ` [PATCHv5 " Mark Rutland
2014-12-02 17:55     ` Thor Thayer

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