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* [PATCH] ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3
@ 2014-12-10  2:30 Simon Horman
  2014-12-10 10:11 ` Geert Uytterhoeven
  0 siblings, 1 reply; 3+ messages in thread
From: Simon Horman @ 2014-12-10  2:30 UTC (permalink / raw)
  To: linux-arm-kernel

From: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>

In order to change into mode3, CPOL and CPHA bit of SPCMD register
of QSPI is changed. Mode3 can avoid intermediate voltage.

Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
[horms: Updated changelog and re-ordered properties]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

---

Based on the renesas-devel-20141210-v3.18 tag of my renesas tree

* Changes by Simon Horman as suggested by Geert Uytterhoeven
- Changed name from
  "ARM: shmobile: lager: Fix SPI mode of SPI-Flash into mode3" to
  "ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3"
- Updated changelog to refer to QSPI instead of MSIOF
- Grouped spi-* properties

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/boot/dts/r8a7790-lager.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 59365bc..b33ebcb 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -397,6 +397,8 @@
 		spi-max-frequency = <30000000>;
 		spi-tx-bus-width = <4>;
 		spi-rx-bus-width = <4>;
+		spi-cpha;
+		spi-cpol;
 		m25p,fast-read;
 
 		partition at 0 {
-- 
2.1.3

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH] ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3
  2014-12-10  2:30 [PATCH] ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3 Simon Horman
@ 2014-12-10 10:11 ` Geert Uytterhoeven
  2014-12-11  0:32   ` Simon Horman
  0 siblings, 1 reply; 3+ messages in thread
From: Geert Uytterhoeven @ 2014-12-10 10:11 UTC (permalink / raw)
  To: linux-arm-kernel

On Wed, Dec 10, 2014 at 3:30 AM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> From: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
>
> In order to change into mode3, CPOL and CPHA bit of SPCMD register
> of QSPI is changed. Mode3 can avoid intermediate voltage.
>
> Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
> [horms: Updated changelog and re-ordered properties]
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH] ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3
  2014-12-10 10:11 ` Geert Uytterhoeven
@ 2014-12-11  0:32   ` Simon Horman
  0 siblings, 0 replies; 3+ messages in thread
From: Simon Horman @ 2014-12-11  0:32 UTC (permalink / raw)
  To: linux-arm-kernel

On Wed, Dec 10, 2014 at 11:11:01AM +0100, Geert Uytterhoeven wrote:
> On Wed, Dec 10, 2014 at 3:30 AM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > From: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
> >
> > In order to change into mode3, CPOL and CPHA bit of SPCMD register
> > of QSPI is changed. Mode3 can avoid intermediate voltage.
> >
> > Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
> > [horms: Updated changelog and re-ordered properties]
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> 
> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks, I have queued this up.

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2014-12-11  0:32 UTC | newest]

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2014-12-10  2:30 [PATCH] ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3 Simon Horman
2014-12-10 10:11 ` Geert Uytterhoeven
2014-12-11  0:32   ` Simon Horman

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