[RFC PATCH v5 0/4] ARM: OMAP2+: AM33XX: Add suspend-resume support

[RFC PATCH v5 0/4] ARM: OMAP2+: AM33XX: Add suspend-resume support

[Dave Gerlach]

Hi,
This series is v5 of the series to add suspend/resume support for Texas
Instruments AM335x SoC. It has gone through a rather major overhaul
since the last version and because of that has been split into multiple
different sets of patches, on which this series depends. Previous discussion
that influenced there changes can be found here [1]. This series depends on
generic sram exec mapping patch here [2], emif series here [3],
and wkup_m3_ipc series here [4]. I have pushed a branch containing the patches
from ALL required series here [5] for testing or a view of the high level
flow of the entire series.

The largest change with this revision is the introduction of a
wkup_m3_ipc driver which handles all communication with the Cortex M3
present on am335x for handling low power tasks. Previously this was
handled in the wkup_m3_rproc driver (also sent in an earlier series)
but that driver is now only responsible for booting the wkup_m3. The
wkup_m3_ipc driver exposes an API with all required PM functionality
needed by the PM code introduced by this series, so the PM code has
shrunk considerably.

Another major change is that the EMIF code previously present in the
sleep33xx asm code and pm33xx code for save and restore of EMIF context
and entry into low power mode has all been moved in to a separate EMIF
driver, further reducing the size of the PM code. Because of this, moving
the emif header defines into include/linux/ti_emif.h is no longer necessary.

Other changes include clean up of the timer suspend/resume handlers, now
look up hwmod in init and use that handle along with renaming to
*_idle/*_unidle to avoid confusion with true suspend handlers. 

Suspend support requires:
CONFIG_TI_EMIF_SRAM
CONFIG_WKUP_M3_RPROC
CONFIG_WKUP_M3_IPC

And also requires AM335x USB support to be enabled to work for multiple
cycles. If you want to load firmware from rootfs in /lib/firmware you now
must also select CONFIG_FW_LOADER_USER_HELPER_FALLBACK.

This code works with version 0x189 of the CM3 firmware found here [6] on
the next branch, /bin/am335x-pm-firmware.elf.

Regards,
Dave

[1] http://www.spinics.net/lists/linux-omap/msg109331.html
[2] http://www.spinics.net/linux/lists/kernel/msg1876629.html
[3] http://www.spinics.net/linux/lists/kernel/msg1876646.html
[4] http://www.spinics.net/linux/lists/kernel/msg1876642.html
[5] https://github.com/dgerlach/linux-pm/tree/rfc-pm-am335x-v3.18-rc6
[6] https://git.ti.com/ti-cm3-pm-firmware/amx3-cm3/commits/next

Dave Gerlach (3):
  ARM: OMAP2+: AM33XX: Add assembly code for PM operations
  ARM: OMAP2+: AM33XX: Basic suspend resume support
  ARM: OMAP2+: AM33XX: Hookup AM33XX PM code into OMAP builds

Vaibhav Bedia (1):
  ARM: OMAP2+: timer: Add suspend-resume callbacks for clkevent device

 arch/arm/boot/dts/am33xx.dtsi   |   2 +
 arch/arm/mach-omap2/Makefile    |   2 +
 arch/arm/mach-omap2/common.h    |   9 ++
 arch/arm/mach-omap2/io.c        |   1 +
 arch/arm/mach-omap2/pm.h        |   6 +
 arch/arm/mach-omap2/pm33xx.c    | 250 ++++++++++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/sleep33xx.S | 216 ++++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/timer.c     |  28 +++++
 8 files changed, 514 insertions(+)
 create mode 100644 arch/arm/mach-omap2/pm33xx.c
 create mode 100644 arch/arm/mach-omap2/sleep33xx.S

-- 
2.1.0

[RFC PATCH v5 1/4] ARM: OMAP2+: timer: Add suspend-resume callbacks for clkevent device

[Dave Gerlach]

From: Vaibhav Bedia <vaibhav.bedia@ti.com>

OMAP timer code registers two timers - one as clocksource
and one as clockevent. Since AM33XX has only one usable timer
in the WKUP domain one of the timers needs suspend-resume
support to restore the configuration to pre-suspend state.

commit adc78e6b9946 ("timekeeping: Add suspend and resume
of clock event devices") introduced .suspend and .resume
callbacks for clock event devices. Leverage these
callbacks to have AM33XX clockevent timer behave properly
across system suspend.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/mach-omap2/timer.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 4f61148..5c7ecde 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -67,6 +67,9 @@
 static struct omap_dm_timer clkev;
 static struct clock_event_device clockevent_gpt;
 
+/* Clockevent hwmod for am335x and am437x suspend */
+struct omap_hwmod *clockevent_gpt_hwmod;
+
 #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 static unsigned long arch_timer_freq;
 
@@ -128,6 +131,23 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 	}
 }
 
+static void omap_clkevt_idle(struct clock_event_device *unused)
+{
+	if (!clockevent_gpt_hwmod)
+		return;
+
+	omap_hwmod_idle(clockevent_gpt_hwmod);
+}
+
+static void omap_clkevt_unidle(struct clock_event_device *unused)
+{
+	if (!clockevent_gpt_hwmod)
+		return;
+
+	omap_hwmod_enable(clockevent_gpt_hwmod);
+	__omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
+}
+
 static struct clock_event_device clockevent_gpt = {
 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 	.rating		= 300,
@@ -355,6 +375,14 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
 					3, /* Timer internal resynch latency */
 					0xffffffff);
 
+	if (soc_is_am33xx()) {
+		clockevent_gpt.suspend = omap_clkevt_idle;
+		clockevent_gpt.resume = omap_clkevt_unidle;
+
+		clockevent_gpt_hwmod =
+			omap_hwmod_lookup(clockevent_gpt.name);
+	}
+
 	pr_info("OMAP clockevent source: %s at %lu Hz\n", clockevent_gpt.name,
 		clkev.rate);
 }
-- 
2.1.0

[RFC PATCH v5 2/4] ARM: OMAP2+: AM33XX: Add assembly code for PM operations

[Dave Gerlach]

In preparation for suspend-resume support for AM33XX, add
the assembly file with the code which is copied to internal
memory (OCMC RAM) during bootup and runs from there.

As part of the low power entry (DeepSleep0 mode in AM33XX TRM),
the code running from OCMC RAM does the following
1. Calls routine to store the EMIF configuration
2. Calls routine to place external memory in self-refresh
3. Disables EMIF clock
4. Executes WFI after writing to MPU_CLKCTRL register.

If no interrupts have come, WFI execution on MPU gets registered
as an interrupt with the WKUP-M3. WKUP-M3 takes care of disabling
some clocks which MPU should not (L3, L4, OCMC RAM etc) and takes
care of clockdomain and powerdomain transitions as part of the
DeepSleep0 mode entry.

In case a late interrupt comes in, WFI ends up as a NOP and MPU
continues execution from internal memory. The 'abort path' code
undoes whatever was done as part of the low power entry and indicates
a suspend failure by passing a non-zero value to the cpu_resume routine.

The 'resume path' code is similar to the 'abort path' with the key
difference of MMU being enabled in the 'abort path' but being
disabled in the 'resume path' due to MPU getting powered off.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/mach-omap2/sleep33xx.S | 216 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 216 insertions(+)
 create mode 100644 arch/arm/mach-omap2/sleep33xx.S

diff --git a/arch/arm/mach-omap2/sleep33xx.S b/arch/arm/mach-omap2/sleep33xx.S
new file mode 100644
index 0000000..9399a16
--- /dev/null
+++ b/arch/arm/mach-omap2/sleep33xx.S
@@ -0,0 +1,216 @@
+/*
+ * Low level suspend code for AM33XX SoCs
+ *
+ * Copyright (C) 2012-2014 Texas Instruments Incorporated - http://www.ti.com/
+ *	Vaibhav Bedia, Dave Gerlach
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/linkage.h>
+#include <asm/memory.h>
+#include <asm/assembler.h>
+
+#include "iomap.h"
+#include "cm33xx.h"
+
+#define AM33XX_CM_CLKCTRL_MODULEMODE_DISABLE			0x0003
+#define AM33XX_CM_CLKCTRL_MODULEMODE_ENABLE			0x0002
+
+	.text
+	.align 3
+
+ENTRY(am33xx_do_wfi)
+	stmfd	sp!, {r4 - r11, lr}	@ save registers on stack
+
+	/*
+	 * Flush all data from the L1 and L2 data cache before disabling
+	 * SCTLR.C bit.
+	 */
+	ldr	r1, kernel_flush
+	blx	r1
+
+	/*
+	 * Clear the SCTLR.C bit to prevent further data cache
+	 * allocation. Clearing SCTLR.C would make all the data accesses
+	 * strongly ordered and would not hit the cache.
+	 */
+	mrc	p15, 0, r0, c1, c0, 0
+	bic	r0, r0, #(1 << 2)	@ Disable the C bit
+	mcr	p15, 0, r0, c1, c0, 0
+	isb
+
+	/*
+	 * Invalidate L1 and L2 data cache.
+	 */
+	ldr	r1, kernel_flush
+	blx	r1
+
+	ldr	r1, ti_emif_save_context
+	blx	r1
+
+	ldr	r1, ti_emif_enter_sr
+	blx	r1
+
+	/* Disable EMIF */
+	ldr     r1, virt_emif_clkctrl
+	ldr     r2, [r1]
+	bic     r2, r2, #AM33XX_CM_CLKCTRL_MODULEMODE_DISABLE
+	str     r2, [r1]
+
+	ldr	r1, virt_emif_clkctrl
+wait_emif_disable:
+	ldr	r2, [r1]
+	ldr	r3, module_disabled_val
+	cmp	r2, r3
+	bne	wait_emif_disable
+
+	/*
+	 * For the MPU WFI to be registered as an interrupt
+	 * to WKUP_M3, MPU_CLKCTRL.MODULEMODE needs to be set
+	 * to DISABLED
+	 */
+	ldr	r1, virt_mpu_clkctrl
+	ldr	r2, [r1]
+	bic	r2, r2, #AM33XX_CM_CLKCTRL_MODULEMODE_DISABLE
+	str	r2, [r1]
+
+	/*
+	 * Execute an ISB instruction to ensure that all of the
+	 * CP15 register changes have been committed.
+	 */
+	isb
+
+	/*
+	 * Execute a barrier instruction to ensure that all cache,
+	 * TLB and branch predictor maintenance operations issued
+	 * have completed.
+	 */
+	dsb
+	dmb
+
+	/*
+	 * Execute a WFI instruction and wait until the
+	 * STANDBYWFI output is asserted to indicate that the
+	 * CPU is in idle and low power state. CPU can specualatively
+	 * prefetch the instructions so add NOPs after WFI. Thirteen
+	 * NOPs as per Cortex-A8 pipeline.
+	 */
+	wfi
+
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+
+	/* We come here in case of an abort due to a late interrupt */
+
+	/* Set MPU_CLKCTRL.MODULEMODE back to ENABLE */
+	ldr	r1, virt_mpu_clkctrl
+	mov	r2, #AM33XX_CM_CLKCTRL_MODULEMODE_ENABLE
+	str	r2, [r1]
+
+	/* Re-enable EMIF */
+	ldr	r1, virt_emif_clkctrl
+	mov	r2, #AM33XX_CM_CLKCTRL_MODULEMODE_ENABLE
+	str	r2, [r1]
+wait_emif_enable:
+	ldr	r3, [r1]
+	cmp	r2, r3
+	bne	wait_emif_enable
+
+	ldr	r1, ti_emif_abort_sr
+	blx	r1
+
+	/*
+	 * Set SCTLR.C bit to allow data cache allocation
+	 */
+	mrc	p15, 0, r0, c1, c0, 0
+	orr	r0, r0, #(1 << 2)	@ Enable the C bit
+	mcr	p15, 0, r0, c1, c0, 0
+	isb
+
+	/* Let the suspend code know about the abort */
+	mov	r0, #1
+	ldmfd	sp!, {r4 - r11, pc}	@ restore regs and return
+ENDPROC(am33xx_do_wfi)
+
+	.align
+ENTRY(am33xx_resume_offset)
+	.word . - am33xx_do_wfi
+
+ENTRY(am33xx_resume_from_deep_sleep)
+	/* Re-enable EMIF */
+	ldr	r0, phys_emif_clkctrl
+	mov	r1, #AM33XX_CM_CLKCTRL_MODULEMODE_ENABLE
+	str	r1, [r0]
+wait_emif_enable1:
+	ldr	r2, [r0]
+	cmp	r1, r2
+	bne	wait_emif_enable1
+
+	adr	sp, temp_stack
+
+	ldr	r1, ti_emif_restore_context
+	blx	r1
+
+	ldr	r1, ti_emif_exit_sr
+	blx	r1
+
+resume_to_ddr:
+	/* We are back. Branch to the common CPU resume routine */
+	mov	r0, #0
+	ldr	pc, resume_addr
+ENDPROC(am33xx_resume_from_deep_sleep)
+
+/*
+ * Local variables
+ */
+	.align
+resume_addr:
+	.word	cpu_resume - PAGE_OFFSET + 0x80000000
+kernel_flush:
+	.word   v7_flush_dcache_all
+virt_mpu_clkctrl:
+	.word	AM33XX_CM_MPU_MPU_CLKCTRL
+virt_emif_clkctrl:
+	.word	AM33XX_CM_PER_EMIF_CLKCTRL
+phys_emif_clkctrl:
+	.word	(AM33XX_CM_BASE + AM33XX_CM_PER_MOD + \
+		AM33XX_CM_PER_EMIF_CLKCTRL_OFFSET)
+module_disabled_val:
+	.word	0x30000
+
+/* DDR related defines */
+ENTRY(am33xx_emif_sram_table)
+ti_emif_save_context:
+	.word	0x00000000
+ti_emif_restore_context:
+	.word	0x00000000
+ti_emif_enter_sr:
+	.word	0x00000000
+ti_emif_exit_sr:
+	.word	0x00000000
+ti_emif_abort_sr:
+	.word	0x00000000
+	.align 3
+	.space 64
+temp_stack:
+ENTRY(am33xx_do_wfi_sz)
+	.word	. - am33xx_do_wfi
-- 
2.1.0

[RFC PATCH v5 3/4] ARM: OMAP2+: AM33XX: Basic suspend resume support

[Dave Gerlach]

AM335x supports various low power modes as documented
in section 8.1.4.3 of the AM335x Technical Reference Manual.

DeepSleep0 mode offers the lowest power mode with limited
wakeup sources without a system reboot and is mapped as
the suspend state in the kernel. In this state, MPU and
PER domains are turned off with the internal RAM held in
retention to facilitate the resume process. As part of
the boot process, the assembly code is copied over to OCMCRAM
so it can be executed to turn of the EMIF and put DDR into self
refresh.

AM335x has a Cortex-M3 (WKUP_M3) which assists the MPU
in DeepSleep0 entry and exit. WKUP_M3 takes care
of the clockdomain and powerdomain transitions based on the
intended low power state. MPU needs to load the appropriate
WKUP_M3 binary onto the WKUP_M3 memory space before it can
leverage any of the PM features like DeepSleep. This loading
is handled by the remoteproc driver wkup_m3_rproc.

Communication with the WKUP_M3 is handled by a wkup_m3_ipc
driver that exposes the specific PM functionality to be used
the PM code.

In the current implementation when the suspend process
is initiated, MPU interrupts the WKUP_M3 to let it know about
the intent of entering DeepSleep0 and waits for an ACK. When
the ACK is received MPU continues with its suspend process
to suspend all the drivers and then jumps to assembly in
OCMC RAM. The assembly code puts the external RAM in self-refresh
mode, gates the MPU clock, and then finally executes the WFI
instruction. Execution of the WFI instruction with MPU clock gated
triggers another interrupt to the WKUP_M3 which then continues
with the power down sequence wherein the clockdomain and
powerdomain transition takes place. As part of the sleep sequence,
WKUP_M3 unmasks the interrupt lines for the wakeup sources. WFI
execution on WKUP_M3 causes the hardware to disable the main
oscillator of the SoC and from here system remains in sleep state
until a wake source brings the system into resume path.

When a wakeup event occurs, WKUP_M3 starts the power-up
sequence by switching on the power domains and finally
enabling the clock to MPU. Since the MPU gets powered down
as part of the sleep sequence in the resume path ROM code
starts executing. The ROM code detects a wakeup from sleep
and then jumps to the resume location in OCMC which was
populated in one of the IPC registers as part of the suspend
sequence.

Code is based on work by Vaibhav Bedia.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/am33xx.dtsi |   2 +
 arch/arm/mach-omap2/pm33xx.c  | 250 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 252 insertions(+)
 create mode 100644 arch/arm/mach-omap2/pm33xx.c

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index b432499..c4210d2 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -80,6 +80,7 @@
 		mpu {
 			compatible = "ti,omap3-mpu";
 			ti,hwmods = "mpu";
+			sram = <&ocmcram>;
 		};
 	};
 
@@ -744,6 +745,7 @@
 		ocmcram: ocmcram at 40300000 {
 			compatible = "mmio-sram";
 			reg = <0x40300000 0x10000>; /* 64k */
+			map-exec;
 		};
 
 		wkup_m3: wkup_m3 at 44d00000 {
diff --git a/arch/arm/mach-omap2/pm33xx.c b/arch/arm/mach-omap2/pm33xx.c
new file mode 100644
index 0000000..2baf810
--- /dev/null
+++ b/arch/arm/mach-omap2/pm33xx.c
@@ -0,0 +1,250 @@
+/*
+ * AM33XX Power Management Routines
+ *
+ * Copyright (C) 2012-2014 Texas Instruments Incorporated - http://www.ti.com/
+ *	Vaibhav Bedia, Dave Gerlach
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/cpu.h>
+#include <linux/err.h>
+#include <linux/genalloc.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/sizes.h>
+#include <linux/suspend.h>
+#include <linux/ti-emif-sram.h>
+#include <linux/wkup_m3_ipc.h>
+
+#include <asm/fncpy.h>
+#include <asm/proc-fns.h>
+#include <asm/suspend.h>
+#include <asm/system_misc.h>
+
+#include "clockdomain.h"
+#include "cm33xx.h"
+#include "common.h"
+#include "pm.h"
+#include "powerdomain.h"
+#include "soc.h"
+
+static struct powerdomain *cefuse_pwrdm, *gfx_pwrdm, *per_pwrdm, *mpu_pwrdm;
+static struct clockdomain *gfx_l4ls_clkdm;
+
+static int (*am33xx_do_wfi_sram)(unsigned long unused);
+static phys_addr_t am33xx_do_wfi_sram_phys;
+
+#ifdef CONFIG_SUSPEND
+static int am33xx_pm_suspend(void)
+{
+	int i, ret = 0;
+	int status = 0;
+
+	/* Try to put GFX to sleep */
+	omap_set_pwrdm_state(gfx_pwrdm, PWRDM_POWER_OFF);
+
+	ret = cpu_suspend(0, am33xx_do_wfi_sram);
+
+	status = pwrdm_read_pwrst(gfx_pwrdm);
+	if (status != PWRDM_POWER_OFF)
+		pr_err("PM: GFX domain did not transition\n");
+
+	/*
+	 * BUG: GFX_L4LS clock domain needs to be woken up to
+	 * ensure thet L4LS clock domain does not get stuck in transition
+	 * If that happens L3 module does not get disabled, thereby leading
+	 * to PER power domain transition failing
+	 */
+	clkdm_wakeup(gfx_l4ls_clkdm);
+	clkdm_sleep(gfx_l4ls_clkdm);
+
+	if (ret) {
+		pr_err("PM: Kernel suspend failure\n");
+	} else {
+		i = wkup_m3_request_pm_status();
+
+		switch (i) {
+		case 0:
+			pr_info("PM: Successfully put all powerdomains to target state\n");
+
+			/*
+			 * The PRCM registers on AM335x do not contain
+			 * previous state information like those present on
+			 * OMAP4 so we must manually indicate transition so
+			 * state counters are properly incremented
+			 */
+			pwrdm_post_transition(mpu_pwrdm);
+			pwrdm_post_transition(per_pwrdm);
+			break;
+		case 1:
+			pr_err("PM: Could not transition all powerdomains to target state\n");
+			ret = -1;
+			break;
+		default:
+			pr_err("PM: CM3 returned unknown result = %d\n", i);
+			ret = -1;
+		}
+	}
+
+	return ret;
+}
+
+static int am33xx_pm_enter(suspend_state_t suspend_state)
+{
+	int ret = 0;
+
+	switch (suspend_state) {
+	case PM_SUSPEND_MEM:
+		ret = am33xx_pm_suspend();
+		break;
+	default:
+		ret = -EINVAL;
+	}
+
+	return ret;
+}
+
+static int am33xx_pm_begin(suspend_state_t state)
+{
+	int ret = -EINVAL;
+
+	switch (state) {
+	case PM_SUSPEND_MEM:
+		ret = wkup_m3_prepare_low_power(state);
+		break;
+	}
+
+	return ret;
+}
+
+static void am33xx_pm_end(void)
+{
+	wkup_m3_finish_low_power();
+}
+
+static int am33xx_pm_valid(suspend_state_t state)
+{
+	switch (state) {
+	case PM_SUSPEND_MEM:
+		return 1;
+	default:
+		return 0;
+	}
+}
+
+static const struct platform_suspend_ops am33xx_pm_ops = {
+	.begin		= am33xx_pm_begin,
+	.end		= am33xx_pm_end,
+	.enter		= am33xx_pm_enter,
+	.valid		= am33xx_pm_valid,
+};
+#endif /* CONFIG_SUSPEND */
+
+/*
+ * Push the minimal suspend-resume code to SRAM
+ */
+static int am33xx_push_sram_idle(void)
+{
+	struct device_node *np;
+	struct gen_pool *sram_pool;
+	phys_addr_t ocmcram_location;
+	int ret;
+
+	ret = ti_emif_copy_pm_function_table(&am33xx_emif_sram_table);
+	if (ret) {
+		pr_err("PM: Cannot copy emif functions to sram, no PM available\n");
+		return -ENODEV;
+	}
+
+	np = of_find_compatible_node(NULL, NULL, "ti,omap3-mpu");
+
+	if (!np) {
+		pr_warn("PM: %s: Unable to find device node for mpu\n",
+			__func__);
+		return -ENODEV;
+	}
+
+	sram_pool = of_get_named_gen_pool(np, "sram", 0);
+
+	if (!sram_pool) {
+		pr_warn("PM: %s: Unable to allocate sram pool for ocmcram\n",
+			__func__);
+		return -ENODEV;
+	}
+
+	ocmcram_location = gen_pool_alloc(sram_pool, am33xx_do_wfi_sz);
+	if (!ocmcram_location)
+		return -EINVAL;
+
+	/* Save physical address to calculate resume offset during pm init */
+	am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool,
+							ocmcram_location);
+	am33xx_do_wfi_sram = (void *)fncpy((void *)ocmcram_location,
+					   &am33xx_do_wfi,
+					   am33xx_do_wfi_sz);
+
+	return 0;
+}
+
+int __init am33xx_pm_init(void)
+{
+	int ret;
+	void *resume_address;
+	u32 temp;
+
+	if (!soc_is_am33xx())
+		return -ENODEV;
+
+	gfx_pwrdm = pwrdm_lookup("gfx_pwrdm");
+	per_pwrdm = pwrdm_lookup("per_pwrdm");
+	mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
+
+	gfx_l4ls_clkdm = clkdm_lookup("gfx_l4ls_gfx_clkdm");
+
+	if ((!gfx_pwrdm) || (!per_pwrdm) || (!mpu_pwrdm) || (!gfx_l4ls_clkdm)) {
+		pr_err("PM: Could not lookup clock and power domains\n");
+		return -ENODEV;
+	}
+
+	(void)clkdm_for_each(omap_pm_clkdms_setup, NULL);
+
+	/* CEFUSE domain can be turned off post bootup */
+	cefuse_pwrdm = pwrdm_lookup("cefuse_pwrdm");
+	if (cefuse_pwrdm)
+		omap_set_pwrdm_state(cefuse_pwrdm, PWRDM_POWER_OFF);
+	else
+		pr_warn("PM: Failed to get cefuse_pwrdm\n");
+
+	ret = am33xx_push_sram_idle();
+	if (ret)
+		return ret;
+
+	/* Physical resume address to be used by ROM code */
+	resume_address = (void *)am33xx_do_wfi_sram_phys +
+			 am33xx_resume_offset + 0x4;
+
+	wkup_m3_set_resume_address(resume_address);
+
+	temp = ti_emif_get_mem_type();
+	if (temp < 0) {
+		pr_err("PM: Cannot determine memory type, no PM available\n");
+		return -ENODEV;
+	}
+	wkup_m3_set_mem_type(temp);
+
+#ifdef CONFIG_SUSPEND
+	suspend_set_ops(&am33xx_pm_ops);
+#endif /* CONFIG_SUSPEND */
+
+	return 0;
+}
-- 
2.1.0

[RFC PATCH v5 4/4] ARM: OMAP2+: AM33XX: Hookup AM33XX PM code into OMAP builds

[Dave Gerlach]

With all the requisite changes in place we can now enable basic
PM support for AM33xx. This patch updates the various OMAP files
to enable suspend-resume on AM33xx.

Because the suspend resume functionality is different on AM33xx
than other OMAP platforms due to the need for M3 firmware and an
IPC channel to be in place, separate PM ops are used instead of
omap_pm_ops.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/mach-omap2/Makefile | 2 ++
 arch/arm/mach-omap2/common.h | 9 +++++++++
 arch/arm/mach-omap2/io.c     | 1 +
 arch/arm/mach-omap2/pm.h     | 6 ++++++
 4 files changed, 18 insertions(+)

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index d9e9412..6d1464d 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -90,6 +90,7 @@ omap-4-5-pm-common			=  pm44xx.o omap-mpuss-lowpower.o
 obj-$(CONFIG_ARCH_OMAP4)		+= $(omap-4-5-pm-common)
 obj-$(CONFIG_SOC_OMAP5)			+= $(omap-4-5-pm-common)
 obj-$(CONFIG_SOC_DRA7XX)		+= $(omap-4-5-pm-common)
+obj-$(CONFIG_SOC_AM33XX)		+= pm33xx.o sleep33xx.o
 obj-$(CONFIG_PM_DEBUG)			+= pm-debug.o
 
 obj-$(CONFIG_POWER_AVS_OMAP)		+= sr_device.o
@@ -97,6 +98,7 @@ obj-$(CONFIG_POWER_AVS_OMAP_CLASS3)    += smartreflex-class3.o
 
 AFLAGS_sleep24xx.o			:=-Wa,-march=armv6
 AFLAGS_sleep34xx.o			:=-Wa,-march=armv7-a$(plus_sec)
+AFLAGS_sleep33xx.o			:=-Wa,-march=armv7-a$(plus_sec)
 
 endif
 
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 377eea8..64bf9a8 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -76,6 +76,15 @@ static inline int omap4_pm_init_early(void)
 }
 #endif
 
+#if defined(CONFIG_PM) && defined(CONFIG_SOC_AM33XX)
+int am33xx_pm_init(void);
+#else
+static inline int am33xx_pm_init(void)
+{
+	return 0;
+}
+#endif
+
 #ifdef CONFIG_OMAP_MUX
 int omap_mux_late_init(void);
 #else
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 03cbb16..4b7828a 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -575,6 +575,7 @@ void __init am33xx_init_early(void)
 void __init am33xx_init_late(void)
 {
 	omap_common_late_init();
+	am33xx_pm_init();
 }
 #endif
 
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 425bfcd..9e19340 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -81,6 +81,12 @@ extern unsigned int omap3_do_wfi_sz;
 /* ... and its pointer from SRAM after copy */
 extern void (*omap3_do_wfi_sram)(void);
 
+/* am33xx_do_wfi function pointer and size, for copy to SRAM */
+extern void am33xx_do_wfi(void);
+extern unsigned int am33xx_do_wfi_sz;
+extern unsigned int am33xx_resume_offset;
+extern unsigned long am33xx_emif_sram_table;
+
 /* save_secure_ram_context function pointer and size, for copy to SRAM */
 extern int save_secure_ram_context(u32 *addr);
 extern unsigned int save_secure_ram_context_sz;
-- 
2.1.0

[RFC PATCH v5 0/4] ARM: OMAP2+: AM33XX: Add suspend-resume support

[Tony Lindgren]

* Dave Gerlach <d-gerlach@ti.com> [141126 13:54]:
> Hi,
> This series is v5 of the series to add suspend/resume support for Texas
> Instruments AM335x SoC. It has gone through a rather major overhaul
> since the last version and because of that has been split into multiple
> different sets of patches, on which this series depends. Previous discussion
> that influenced there changes can be found here [1]. This series depends on
> generic sram exec mapping patch here [2], emif series here [3],
> and wkup_m3_ipc series here [4]. I have pushed a branch containing the patches
> from ALL required series here [5] for testing or a view of the high level
> flow of the entire series.
> 
> The largest change with this revision is the introduction of a
> wkup_m3_ipc driver which handles all communication with the Cortex M3
> present on am335x for handling low power tasks. Previously this was
> handled in the wkup_m3_rproc driver (also sent in an earlier series)
> but that driver is now only responsible for booting the wkup_m3. The
> wkup_m3_ipc driver exposes an API with all required PM functionality
> needed by the PM code introduced by this series, so the PM code has
> shrunk considerably.
> 
> Another major change is that the EMIF code previously present in the
> sleep33xx asm code and pm33xx code for save and restore of EMIF context
> and entry into low power mode has all been moved in to a separate EMIF
> driver, further reducing the size of the PM code. Because of this, moving
> the emif header defines into include/linux/ti_emif.h is no longer necessary.
> 
> Other changes include clean up of the timer suspend/resume handlers, now
> look up hwmod in init and use that handle along with renaming to
> *_idle/*_unidle to avoid confusion with true suspend handlers. 
> 
> Suspend support requires:
> CONFIG_TI_EMIF_SRAM
> CONFIG_WKUP_M3_RPROC
> CONFIG_WKUP_M3_IPC
> 
> And also requires AM335x USB support to be enabled to work for multiple
> cycles. If you want to load firmware from rootfs in /lib/firmware you now
> must also select CONFIG_FW_LOADER_USER_HELPER_FALLBACK.
> 
> This code works with version 0x189 of the CM3 firmware found here [6] on
> the next branch, /bin/am335x-pm-firmware.elf.

Dave, does this series have dependencies to the other patches? Can some
parts of this already be applied without breaking anything?

Regards,

Tony
 
> [1] http://www.spinics.net/lists/linux-omap/msg109331.html
> [2] http://www.spinics.net/linux/lists/kernel/msg1876629.html
> [3] http://www.spinics.net/linux/lists/kernel/msg1876646.html
> [4] http://www.spinics.net/linux/lists/kernel/msg1876642.html
> [5] https://github.com/dgerlach/linux-pm/tree/rfc-pm-am335x-v3.18-rc6
> [6] https://git.ti.com/ti-cm3-pm-firmware/amx3-cm3/commits/next
> 
> Dave Gerlach (3):
>   ARM: OMAP2+: AM33XX: Add assembly code for PM operations
>   ARM: OMAP2+: AM33XX: Basic suspend resume support
>   ARM: OMAP2+: AM33XX: Hookup AM33XX PM code into OMAP builds
> 
> Vaibhav Bedia (1):
>   ARM: OMAP2+: timer: Add suspend-resume callbacks for clkevent device
> 
>  arch/arm/boot/dts/am33xx.dtsi   |   2 +
>  arch/arm/mach-omap2/Makefile    |   2 +
>  arch/arm/mach-omap2/common.h    |   9 ++
>  arch/arm/mach-omap2/io.c        |   1 +
>  arch/arm/mach-omap2/pm.h        |   6 +
>  arch/arm/mach-omap2/pm33xx.c    | 250 ++++++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-omap2/sleep33xx.S | 216 ++++++++++++++++++++++++++++++++++
>  arch/arm/mach-omap2/timer.c     |  28 +++++
>  8 files changed, 514 insertions(+)
>  create mode 100644 arch/arm/mach-omap2/pm33xx.c
>  create mode 100644 arch/arm/mach-omap2/sleep33xx.S
> 
> -- 
> 2.1.0
> 

[RFC PATCH v5 0/4] ARM: OMAP2+: AM33XX: Add suspend-resume support

[Dave Gerlach]

Tony,
On 01/20/2015 12:03 PM, Tony Lindgren wrote:
> * Dave Gerlach <d-gerlach@ti.com> [141126 13:54]:
>> Hi,
>> This series is v5 of the series to add suspend/resume support for Texas
>> Instruments AM335x SoC. It has gone through a rather major overhaul
>> since the last version and because of that has been split into multiple
>> different sets of patches, on which this series depends. Previous discussion
>> that influenced there changes can be found here [1]. This series depends on
>> generic sram exec mapping patch here [2], emif series here [3],
>> and wkup_m3_ipc series here [4]. I have pushed a branch containing the patches
>> from ALL required series here [5] for testing or a view of the high level
>> flow of the entire series.
>>
>> The largest change with this revision is the introduction of a
>> wkup_m3_ipc driver which handles all communication with the Cortex M3
>> present on am335x for handling low power tasks. Previously this was
>> handled in the wkup_m3_rproc driver (also sent in an earlier series)
>> but that driver is now only responsible for booting the wkup_m3. The
>> wkup_m3_ipc driver exposes an API with all required PM functionality
>> needed by the PM code introduced by this series, so the PM code has
>> shrunk considerably.
>>
>> Another major change is that the EMIF code previously present in the
>> sleep33xx asm code and pm33xx code for save and restore of EMIF context
>> and entry into low power mode has all been moved in to a separate EMIF
>> driver, further reducing the size of the PM code. Because of this, moving
>> the emif header defines into include/linux/ti_emif.h is no longer necessary.
>>
>> Other changes include clean up of the timer suspend/resume handlers, now
>> look up hwmod in init and use that handle along with renaming to
>> *_idle/*_unidle to avoid confusion with true suspend handlers. 
>>
>> Suspend support requires:
>> CONFIG_TI_EMIF_SRAM
>> CONFIG_WKUP_M3_RPROC
>> CONFIG_WKUP_M3_IPC
>>
>> And also requires AM335x USB support to be enabled to work for multiple
>> cycles. If you want to load firmware from rootfs in /lib/firmware you now
>> must also select CONFIG_FW_LOADER_USER_HELPER_FALLBACK.
>>
>> This code works with version 0x189 of the CM3 firmware found here [6] on
>> the next branch, /bin/am335x-pm-firmware.elf.
> 
> Dave, does this series have dependencies to the other patches? Can some
> parts of this already be applied without breaking anything?
> 

The only patch with no dependencies is patch 1 (ARM: OMAP2+: timer: Add
suspend-resume callbacks for clkevent device). It's ready to be applied, I just
applied to v3.19-rc5 and built and booted on am335x-evm with no issue just to be
sure. It won't actually do anything until suspend is completely implemented.

Regards,
Dave

> Regards,
> 
> Tony
>  
>> [1] http://www.spinics.net/lists/linux-omap/msg109331.html
>> [2] http://www.spinics.net/linux/lists/kernel/msg1876629.html
>> [3] http://www.spinics.net/linux/lists/kernel/msg1876646.html
>> [4] http://www.spinics.net/linux/lists/kernel/msg1876642.html
>> [5] https://github.com/dgerlach/linux-pm/tree/rfc-pm-am335x-v3.18-rc6
>> [6] https://git.ti.com/ti-cm3-pm-firmware/amx3-cm3/commits/next
>>
>> Dave Gerlach (3):
>>   ARM: OMAP2+: AM33XX: Add assembly code for PM operations
>>   ARM: OMAP2+: AM33XX: Basic suspend resume support
>>   ARM: OMAP2+: AM33XX: Hookup AM33XX PM code into OMAP builds
>>
>> Vaibhav Bedia (1):
>>   ARM: OMAP2+: timer: Add suspend-resume callbacks for clkevent device

>>  arch/arm/boot/dts/am33xx.dtsi   |   2 +
>>  arch/arm/mach-omap2/Makefile    |   2 +
>>  arch/arm/mach-omap2/common.h    |   9 ++
>>  arch/arm/mach-omap2/io.c        |   1 +
>>  arch/arm/mach-omap2/pm.h        |   6 +
>>  arch/arm/mach-omap2/pm33xx.c    | 250 ++++++++++++++++++++++++++++++++++++++++
>>  arch/arm/mach-omap2/sleep33xx.S | 216 ++++++++++++++++++++++++++++++++++
>>  arch/arm/mach-omap2/timer.c     |  28 +++++
>>  8 files changed, 514 insertions(+)
>>  create mode 100644 arch/arm/mach-omap2/pm33xx.c
>>  create mode 100644 arch/arm/mach-omap2/sleep33xx.S
>>
>> -- 
>> 2.1.0
>>

[RFC PATCH v5 0/4] ARM: OMAP2+: AM33XX: Add suspend-resume support

[Tony Lindgren]

* Dave Gerlach <d-gerlach@ti.com> [150120 12:35]:
> Tony,
> On 01/20/2015 12:03 PM, Tony Lindgren wrote:
> > * Dave Gerlach <d-gerlach@ti.com> [141126 13:54]:
> >> Hi,
> >> This series is v5 of the series to add suspend/resume support for Texas
> >> Instruments AM335x SoC. It has gone through a rather major overhaul
> >> since the last version and because of that has been split into multiple
> >> different sets of patches, on which this series depends. Previous discussion
> >> that influenced there changes can be found here [1]. This series depends on
> >> generic sram exec mapping patch here [2], emif series here [3],
> >> and wkup_m3_ipc series here [4]. I have pushed a branch containing the patches
> >> from ALL required series here [5] for testing or a view of the high level
> >> flow of the entire series.
> >>
> >> The largest change with this revision is the introduction of a
> >> wkup_m3_ipc driver which handles all communication with the Cortex M3
> >> present on am335x for handling low power tasks. Previously this was
> >> handled in the wkup_m3_rproc driver (also sent in an earlier series)
> >> but that driver is now only responsible for booting the wkup_m3. The
> >> wkup_m3_ipc driver exposes an API with all required PM functionality
> >> needed by the PM code introduced by this series, so the PM code has
> >> shrunk considerably.
> >>
> >> Another major change is that the EMIF code previously present in the
> >> sleep33xx asm code and pm33xx code for save and restore of EMIF context
> >> and entry into low power mode has all been moved in to a separate EMIF
> >> driver, further reducing the size of the PM code. Because of this, moving
> >> the emif header defines into include/linux/ti_emif.h is no longer necessary.
> >>
> >> Other changes include clean up of the timer suspend/resume handlers, now
> >> look up hwmod in init and use that handle along with renaming to
> >> *_idle/*_unidle to avoid confusion with true suspend handlers. 
> >>
> >> Suspend support requires:
> >> CONFIG_TI_EMIF_SRAM
> >> CONFIG_WKUP_M3_RPROC
> >> CONFIG_WKUP_M3_IPC
> >>
> >> And also requires AM335x USB support to be enabled to work for multiple
> >> cycles. If you want to load firmware from rootfs in /lib/firmware you now
> >> must also select CONFIG_FW_LOADER_USER_HELPER_FALLBACK.
> >>
> >> This code works with version 0x189 of the CM3 firmware found here [6] on
> >> the next branch, /bin/am335x-pm-firmware.elf.
> > 
> > Dave, does this series have dependencies to the other patches? Can some
> > parts of this already be applied without breaking anything?
> > 
> 
> The only patch with no dependencies is patch 1 (ARM: OMAP2+: timer: Add
> suspend-resume callbacks for clkevent device). It's ready to be applied, I just
> applied to v3.19-rc5 and built and booted on am335x-evm with no issue just to be
> sure. It won't actually do anything until suspend is completely implemented.

OK thanks for checking, best to wait until it's usable then.

Regards,

Tony