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From: lee.jones@linaro.org (Lee Jones)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] mfd: sun6i-prcm: Add support for PRCM found on Allwinner A80 SoC
Date: Mon, 9 Mar 2015 07:44:51 +0000	[thread overview]
Message-ID: <20150309074451.GH3318@x1> (raw)
In-Reply-To: <1425349320-2754-3-git-send-email-wens@csie.org>

On Tue, 03 Mar 2015, Chen-Yu Tsai wrote:

> This patch adds support for the PRCM on the A80 SoC. There is little
> to no document for this at the moment. Only register offsets are
> available. However with some testing, the clock and reset controls
> seem to be the similar to the ones on the A31.
> 
> One thing that needs verifying is whether the apbs divider is the same
> as the A31 or the A23. The lowest divider is different between those
> 2 implementations.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  .../devicetree/bindings/mfd/sun6i-prcm.txt         |  3 +-
>  drivers/mfd/sun6i-prcm.c                           | 58 ++++++++++++++++++++++
>  2 files changed, 60 insertions(+), 1 deletion(-)

Acked-by: Lee Jones <lee.jones@linaro.org>

> diff --git a/Documentation/devicetree/bindings/mfd/sun6i-prcm.txt b/Documentation/devicetree/bindings/mfd/sun6i-prcm.txt
> index 03c5a551da55..c100abfcb2a4 100644
> --- a/Documentation/devicetree/bindings/mfd/sun6i-prcm.txt
> +++ b/Documentation/devicetree/bindings/mfd/sun6i-prcm.txt
> @@ -4,7 +4,8 @@ PRCM is an MFD device exposing several Power Management related devices
>  (like clks and reset controllers).
>  
>  Required properties:
> - - compatible: "allwinner,sun6i-a31-prcm" or "allwinner,sun8i-a23-prcm"
> + - compatible: "allwinner,sun6i-a31-prcm", "allwinner,sun8i-a23-prcm",
> +	       "allwinner,sun9i-a80-prcm"
>   - reg: The PRCM registers range
>  
>  The prcm node may contain several subdevices definitions:
> diff --git a/drivers/mfd/sun6i-prcm.c b/drivers/mfd/sun6i-prcm.c
> index 191173166d65..d067c77fb512 100644
> --- a/drivers/mfd/sun6i-prcm.c
> +++ b/drivers/mfd/sun6i-prcm.c
> @@ -33,6 +33,22 @@ static const struct resource sun6i_a31_apb0_clk_res[] = {
>  	},
>  };
>  
> +static const struct resource sun9i_a80_cpus_clk_res[] = {
> +	{
> +		.start = 0x10,
> +		.end = 0x13,
> +		.flags = IORESOURCE_MEM,
> +	},
> +};
> +
> +static const struct resource sun9i_a80_apbs_clk_res[] = {
> +	{
> +		.start = 0x1c,
> +		.end = 0x1f,
> +		.flags = IORESOURCE_MEM,
> +	},
> +};
> +
>  static const struct resource sun6i_a31_apb0_gates_clk_res[] = {
>  	{
>  		.start = 0x28,
> @@ -111,6 +127,39 @@ static const struct mfd_cell sun8i_a23_prcm_subdevs[] = {
>  	},
>  };
>  
> +static const struct mfd_cell sun9i_a80_prcm_subdevs[] = {
> +	{
> +		.name = "sun6i-a31-ar100-clk",
> +		.of_compatible = "allwinner,sun6i-a31-ar100-clk",
> +		.num_resources = ARRAY_SIZE(sun9i_a80_cpus_clk_res),
> +		.resources = sun9i_a80_cpus_clk_res,
> +	},
> +	{
> +		.name = "sun8i-a23-apb0-clk",
> +		.of_compatible = "allwinner,sun8i-a23-apb0-clk",
> +		.num_resources = ARRAY_SIZE(sun9i_a80_apbs_clk_res),
> +		.resources = sun9i_a80_apbs_clk_res,
> +	},
> +	{
> +		.name = "sun6i-a31-apb0-gates-clk",
> +		.of_compatible = "allwinner,sun9i-a80-apbs-gates-clk",
> +		.num_resources = ARRAY_SIZE(sun6i_a31_apb0_gates_clk_res),
> +		.resources = sun6i_a31_apb0_gates_clk_res,
> +	},
> +	{
> +		.name = "sun6i-a31-ir-clk",
> +		.of_compatible = "allwinner,sun4i-a10-mod0-clk",
> +		.num_resources = ARRAY_SIZE(sun6i_a31_ir_clk_res),
> +		.resources = sun6i_a31_ir_clk_res,
> +	},
> +	{
> +		.name = "sun6i-a31-apb0-clock-reset",
> +		.of_compatible = "allwinner,sun6i-a31-clock-reset",
> +		.num_resources = ARRAY_SIZE(sun6i_a31_apb0_rstc_res),
> +		.resources = sun6i_a31_apb0_rstc_res,
> +	},
> +};
> +
>  static const struct prcm_data sun6i_a31_prcm_data = {
>  	.nsubdevs = ARRAY_SIZE(sun6i_a31_prcm_subdevs),
>  	.subdevs = sun6i_a31_prcm_subdevs,
> @@ -121,6 +170,11 @@ static const struct prcm_data sun8i_a23_prcm_data = {
>  	.subdevs = sun8i_a23_prcm_subdevs,
>  };
>  
> +static const struct prcm_data sun9i_a80_prcm_data = {
> +	.nsubdevs = ARRAY_SIZE(sun9i_a80_prcm_subdevs),
> +	.subdevs = sun9i_a80_prcm_subdevs,
> +};
> +
>  static const struct of_device_id sun6i_prcm_dt_ids[] = {
>  	{
>  		.compatible = "allwinner,sun6i-a31-prcm",
> @@ -130,6 +184,10 @@ static const struct of_device_id sun6i_prcm_dt_ids[] = {
>  		.compatible = "allwinner,sun8i-a23-prcm",
>  		.data = &sun8i_a23_prcm_data,
>  	},
> +	{
> +		.compatible = "allwinner,sun9i-a80-prcm",
> +		.data = &sun9i_a80_prcm_data,
> +	},
>  	{ /* sentinel */ },
>  };
>  

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

  reply	other threads:[~2015-03-09  7:44 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-03  2:21 [PATCH 0/3] ARM: sun9i: Add support for PRCM on Allwinner A80 SoC Chen-Yu Tsai
2015-03-03  2:21 ` [PATCH 1/3] clk: sunxi: sun6i-apb0: Add support for sun9i A80 apbs gates Chen-Yu Tsai
2015-03-03  2:21 ` [PATCH 2/3] mfd: sun6i-prcm: Add support for PRCM found on Allwinner A80 SoC Chen-Yu Tsai
2015-03-09  7:44   ` Lee Jones [this message]
2015-03-03  2:22 ` [PATCH 3/3] ARM: dts: sun9i: Add A80 PRCM clocks and reset control nodes Chen-Yu Tsai
2015-03-08 17:32 ` [PATCH 0/3] ARM: sun9i: Add support for PRCM on Allwinner A80 SoC Maxime Ripard
2015-03-09  3:10   ` Chen-Yu Tsai
     [not found]   ` <201503100902208865029@allwinnertech.com>
2015-03-10 20:18     ` maxime.ripard
     [not found]       ` <2015033017191699787718@allwinnertech.com>
2015-03-30 21:50         ` maxime.ripard
2015-04-25  1:54           ` Chen-Yu Tsai

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