* [RESEND PATCH] arm64: dts: add interrupt-affinity property to pmu node for juno
@ 2015-03-30 9:59 Will Deacon
2015-04-03 20:49 ` Olof Johansson
0 siblings, 1 reply; 2+ messages in thread
From: Will Deacon @ 2015-03-30 9:59 UTC (permalink / raw)
To: linux-arm-kernel
Make the Juno .dts robust against potential reordering of the CPU nodes
by adding an explicit interrupt-affinity property to the PMU node. While
we're at it, fix the PMU interrupts numbers too.
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
Resending, as requested. Please apply for 4.1.
arch/arm64/boot/dts/arm/juno.dts | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index 133ee59de2d7..5e9110a3353d 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -120,12 +120,18 @@
pmu {
compatible = "arm,armv8-pmuv3";
- interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 02 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 06 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&A57_0>,
+ <&A57_1>,
+ <&A53_0>,
+ <&A53_1>,
+ <&A53_2>,
+ <&A53_3>;
};
/include/ "juno-clocks.dtsi"
--
2.1.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [RESEND PATCH] arm64: dts: add interrupt-affinity property to pmu node for juno
2015-03-30 9:59 [RESEND PATCH] arm64: dts: add interrupt-affinity property to pmu node for juno Will Deacon
@ 2015-04-03 20:49 ` Olof Johansson
0 siblings, 0 replies; 2+ messages in thread
From: Olof Johansson @ 2015-04-03 20:49 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Mar 30, 2015 at 10:59:30AM +0100, Will Deacon wrote:
> Make the Juno .dts robust against potential reordering of the CPU nodes
> by adding an explicit interrupt-affinity property to the PMU node. While
> we're at it, fix the PMU interrupts numbers too.
>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Acked-by: Liviu Dudau <liviu.dudau@arm.com>
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> ---
>
> Resending, as requested. Please apply for 4.1.
Thanks, applied.
-Olof
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