[PATCH] ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs

[PATCH] ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs

[Gregory CLEMENT]

Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the
Armada 375, 38x and 39x, the frequency is 1GHz. When writting support
for these last SoCs, there was no offical value for the PLL. Now that
we have it, this patch fixes it in the device tree.

This value is currently only used by the NAND driver for the setting
the NAND timing. Fortunately it is not acutally used: all the mainline
board with a NAND flash comes with a NAND device tree node using the
"marvell,nand-keep-config" property. With this property the timings
are not modified in the kernel driver and are kept from the botloader.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm/boot/dts/armada-375.dtsi | 2 +-
 arch/arm/boot/dts/armada-38x.dtsi | 2 +-
 arch/arm/boot/dts/armada-39x.dtsi | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi
index c675257f2377..f076ff856d8b 100644
--- a/arch/arm/boot/dts/armada-375.dtsi
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -69,7 +69,7 @@
 		mainpll: mainpll {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
-			clock-frequency = <2000000000>;
+			clock-frequency = <1000000000>;
 		};
 		/* 25 MHz reference crystal */
 		refclk: oscillator {
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index ed2dd8ba4080..218a2acd36e5 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -585,7 +585,7 @@
 		mainpll: mainpll {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
-			clock-frequency = <2000000000>;
+			clock-frequency = <1000000000>;
 		};
 
 		/* 25 MHz reference crystal */
diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi
index 0e85fc15ceda..ecd1318109ba 100644
--- a/arch/arm/boot/dts/armada-39x.dtsi
+++ b/arch/arm/boot/dts/armada-39x.dtsi
@@ -502,7 +502,7 @@
 		mainpll: mainpll {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
-			clock-frequency = <2000000000>;
+			clock-frequency = <1000000000>;
 		};
 	};
 };
-- 
2.1.0

[PATCH] ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs

[Maxime Ripard]

Hi,

On Mon, Apr 20, 2015 at 03:59:33PM +0200, Gregory CLEMENT wrote:
> Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the
> Armada 375, 38x and 39x, the frequency is 1GHz. When writting support
                                                       ^ writing

> for these last SoCs, there was no offical value for the PLL. Now that
> we have it, this patch fixes it in the device tree.
> 
> This value is currently only used by the NAND driver for the setting
> the NAND timing. Fortunately it is not acutally used: all the mainline
                                         ^ actually

> board with a NAND flash comes with a NAND device tree node using the

  ^ boards                ^ come 

> "marvell,nand-keep-config" property. With this property the timings
> are not modified in the kernel driver and are kept from the botloader.
                                                              ^ bootloader

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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[PATCH] ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs

[Gregory CLEMENT]

Hi Maxime,

On 20/04/2015 19:29, Maxime Ripard wrote:
> Hi,
> 
> On Mon, Apr 20, 2015 at 03:59:33PM +0200, Gregory CLEMENT wrote:
>> Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the
>> Armada 375, 38x and 39x, the frequency is 1GHz. When writting support
>                                                        ^ writing
> 
>> for these last SoCs, there was no offical value for the PLL. Now that
                                     ^ official

>> we have it, this patch fixes it in the device tree.
>>
>> This value is currently only used by the NAND driver for the setting
>> the NAND timing. Fortunately it is not acutally used: all the mainline
>                                          ^ actually
> 
>> board with a NAND flash comes with a NAND device tree node using the
> 
>   ^ boards                ^ come 
> 
>> "marvell,nand-keep-config" property. With this property the timings
>> are not modified in the kernel driver and are kept from the botloader.
>                                                               ^ bootloader

It seemed that my flyspell mode was not activated, thanks for your spell check.
I will send a new patch in a few day, waiting for other review.


Thanks,

Gregory


> 
> Maxime
> 
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 


-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com