* [PATCH] coresight: Add support for Juno platform
@ 2015-04-22 22:46 Mathieu Poirier
2015-04-23 9:20 ` Mark Rutland
0 siblings, 1 reply; 3+ messages in thread
From: Mathieu Poirier @ 2015-04-22 22:46 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds support for ARM's juno platform. More
specifically it has definitions for the A53/57 tracers, the
A53/57 cluster funnels, the main funnel and the ETF in
circular buffer mode.
Support for the replicator, TPIU, ETR, CTI, CTM, ATM along with
all the coresight IP blocks found in the SPC sub-system have
not been addressed.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
arch/arm64/boot/dts/arm/juno.dts | 222 +++++++++++++++++++++++++++++++++++++++
1 file changed, 222 insertions(+)
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index 133ee59de2d7..0d0a9cbbb193 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -200,6 +200,228 @@
clock-names = "apb_pclk";
};
+ etf at 20010000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0 0x20010000 0 0x1000>;
+
+ clocks = <&soc_smc50mhz>;
+ clock-names = "apb_pclk";
+ port {
+ etf_in_port: endpoint at 0 {
+ slave-mode;
+ remote-endpoint = <&main_funnel_out_port>;
+ };
+ };
+ };
+
+ main_funnel at 20040000 {
+ compatible = "arm,coresight-funnel", "arm,primecell";
+ reg = <0 0x20040000 0 0x1000>;
+
+ clocks = <&soc_smc50mhz>;
+ clock-names = "apb_pclk";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ main_funnel_out_port: endpoint {
+ remote-endpoint =
+ <&etf_in_port>;
+ };
+ };
+
+ port at 1 {
+ reg = <0>;
+ main_funnel_in_port0: endpoint {
+ slave-mode;
+ remote-endpoint =
+ <&A57_funnel_out_port>;
+ };
+ };
+
+ port at 2 {
+ reg = <1>;
+ main_funnel_in_port1: endpoint {
+ slave-mode;
+ remote-endpoint = <&A53_etm0_out_port>;
+ };
+ };
+
+ };
+ };
+
+ A57_funnel at 220c0000 {
+ compatible = "arm,coresight-funnel", "arm,primecell";
+ reg = <0 0x220c0000 0 0x1000>;
+
+ clocks = <&soc_smc50mhz>;
+ clock-names = "apb_pclk";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ A57_funnel_out_port: endpoint {
+ remote-endpoint =
+ <&main_funnel_in_port0>;
+ };
+ };
+
+ port at 1 {
+ reg = <0>;
+ A57_funnel_in_port0: endpoint {
+ slave-mode;
+ remote-endpoint = <&A57_etm0_out_port>;
+ };
+ };
+
+ port at 2 {
+ reg = <1>;
+ A57_funnel_in_port1: endpoint {
+ slave-mode;
+ remote-endpoint = <&A57_etm1_out_port>;
+ };
+ };
+ };
+ };
+
+ A53_funnel at 220c0000 {
+ compatible = "arm,coresight-funnel", "arm,primecell";
+ reg = <0 0x230c0000 0 0x1000>;
+
+ clocks = <&soc_smc50mhz>;
+ clock-names = "apb_pclk";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ A53_funnel_out_port: endpoint {
+ remote-endpoint =
+ <&main_funnel_in_port1>;
+ };
+ };
+
+ port at 1 {
+ reg = <0>;
+ A53_funnel_in_port0: endpoint {
+ slave-mode;
+ remote-endpoint = <&A53_etm0_out_port>;
+ };
+ };
+
+ port at 2 {
+ reg = <1>;
+ A53_funnel_in_port1: endpoint {
+ slave-mode;
+ remote-endpoint = <&A53_etm1_out_port>;
+ };
+ };
+ port at 3 {
+ reg = <2>;
+ A53_funnel_in_port2: endpoint {
+ slave-mode;
+ remote-endpoint = <&A53_etm2_out_port>;
+ };
+ };
+ port at 4 {
+ reg = <3>;
+ A53_funnel_in_port3: endpoint {
+ slave-mode;
+ remote-endpoint = <&A53_etm3_out_port>;
+ };
+ };
+ };
+ };
+
+ etm at 22040000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x22040000 0 0x1000>;
+
+ cpu = <&A57_0>;
+ clocks = <&soc_smc50mhz>;
+ clock-names = "apb_pclk";
+ port {
+ A57_etm0_out_port: endpoint {
+ remote-endpoint = <&A57_funnel_in_port0>;
+ };
+ };
+ };
+
+ etm at 22140000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x22140000 0 0x1000>;
+
+ cpu = <&A57_1>;
+ clocks = <&soc_smc50mhz>;
+ clock-names = "apb_pclk";
+ port {
+ A57_etm1_out_port: endpoint {
+ remote-endpoint = <&A57_funnel_in_port1>;
+ };
+ };
+ };
+
+ etm at 23040000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x23040000 0 0x1000>;
+
+ cpu = <&A53_0>;
+ clocks = <&soc_smc50mhz>;
+ clock-names = "apb_pclk";
+ port {
+ A53_etm0_out_port: endpoint {
+ remote-endpoint = <&A53_funnel_in_port0>;
+ };
+ };
+ };
+
+ etm at 23140000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x23140000 0 0x1000>;
+
+ cpu = <&A53_1>;
+ clocks = <&soc_smc50mhz>;
+ clock-names = "apb_pclk";
+ port {
+ A53_etm1_out_port: endpoint {
+ remote-endpoint = <&A53_funnel_in_port1>;
+ };
+ };
+ };
+
+ etm at 23240000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x23240000 0 0x1000>;
+
+ cpu = <&A53_2>;
+ clocks = <&soc_smc50mhz>;
+ clock-names = "apb_pclk";
+ port {
+ A53_etm2_out_port: endpoint {
+ remote-endpoint = <&A53_funnel_in_port2>;
+ };
+ };
+ };
+
+ etm at 23340000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0 0x23340000 0 0x1000>;
+
+ cpu = <&A53_3>;
+ clocks = <&soc_smc50mhz>;
+ clock-names = "apb_pclk";
+ port {
+ A53_etm3_out_port: endpoint {
+ remote-endpoint = <&A53_funnel_in_port3>;
+ };
+ };
+ };
+
smb {
compatible = "simple-bus";
#address-cells = <2>;
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH] coresight: Add support for Juno platform
2015-04-22 22:46 [PATCH] coresight: Add support for Juno platform Mathieu Poirier
@ 2015-04-23 9:20 ` Mark Rutland
2015-04-23 13:41 ` Mathieu Poirier
0 siblings, 1 reply; 3+ messages in thread
From: Mark Rutland @ 2015-04-23 9:20 UTC (permalink / raw)
To: linux-arm-kernel
Hi Matthieu,
> + main_funnel at 20040000 {
> + compatible = "arm,coresight-funnel", "arm,primecell";
> + reg = <0 0x20040000 0 0x1000>;
> +
> + clocks = <&soc_smc50mhz>;
> + clock-names = "apb_pclk";
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port at 0 {
> + reg = <0>;
> + main_funnel_out_port: endpoint {
> + remote-endpoint =
> + <&etf_in_port>;
> + };
> + };
> +
> + port at 1 {
> + reg = <0>;
> + main_funnel_in_port0: endpoint {
> + slave-mode;
> + remote-endpoint =
> + <&A57_funnel_out_port>;
> + };
> + };
> +
> + port at 2 {
> + reg = <1>;
> + main_funnel_in_port1: endpoint {
> + slave-mode;
> + remote-endpoint = <&A53_etm0_out_port>;
> + };
> + };
What's going on with these reg properties? They aren't matched with
their nodes' unit-addresses, and the same reg is reused by multiple
nodes. That doesn't make sense to me.
Is the mismatch deliberate (against DT conventions), or is this
mistaken?
Likewise for the other funnels.
Mark
^ permalink raw reply [flat|nested] 3+ messages in thread* [PATCH] coresight: Add support for Juno platform
2015-04-23 9:20 ` Mark Rutland
@ 2015-04-23 13:41 ` Mathieu Poirier
0 siblings, 0 replies; 3+ messages in thread
From: Mathieu Poirier @ 2015-04-23 13:41 UTC (permalink / raw)
To: linux-arm-kernel
On 23 April 2015 at 03:20, Mark Rutland <mark.rutland@arm.com> wrote:
> Hi Matthieu,
>
>> + main_funnel at 20040000 {
>> + compatible = "arm,coresight-funnel", "arm,primecell";
>> + reg = <0 0x20040000 0 0x1000>;
>> +
>> + clocks = <&soc_smc50mhz>;
>> + clock-names = "apb_pclk";
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port at 0 {
>> + reg = <0>;
>> + main_funnel_out_port: endpoint {
>> + remote-endpoint =
>> + <&etf_in_port>;
>> + };
>> + };
>> +
>> + port at 1 {
>> + reg = <0>;
>> + main_funnel_in_port0: endpoint {
>> + slave-mode;
>> + remote-endpoint =
>> + <&A57_funnel_out_port>;
>> + };
>> + };
>> +
>> + port at 2 {
>> + reg = <1>;
>> + main_funnel_in_port1: endpoint {
>> + slave-mode;
>> + remote-endpoint = <&A53_etm0_out_port>;
>> + };
>> + };
>
> What's going on with these reg properties? They aren't matched with
> their nodes' unit-addresses, and the same reg is reused by multiple
> nodes. That doesn't make sense to me.
>
> Is the mismatch deliberate (against DT conventions), or is this
> mistaken?
Thanks for the review.
Coresight blocks have input and output ports and I use (and used [1])
the reg property to label the physical ports as found on device
itself. Above, "port at 0" doesn't have a "slave-mode" property and as
such is output port "0".
"port at 1" and "port at 2" have a "slave-mode" property and thus are input
port "0" and "1", as indicated by their reg properly.
[1]. http://lxr.free-electrons.com/source/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts#L426
Mathieu
>
> Likewise for the other funnels.
>
> Mark
^ permalink raw reply [flat|nested] 3+ messages in thread
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2015-04-23 9:20 ` Mark Rutland
2015-04-23 13:41 ` Mathieu Poirier
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