From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s
Date: Thu, 20 Aug 2015 17:00:57 +0200 [thread overview]
Message-ID: <20150820150057.GY30520@lukather> (raw)
In-Reply-To: <90730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach@gmail.com>
On Thu, Aug 20, 2015 at 02:19:47PM -0000, Michal Suchanek wrote:
> According to datasheet some pins are available on A10s only while others
> are shared with A13.
>
> Signed-off-by: Michal Suchanek <hramrach@gmail.com>
> ---
> This time add all spi pins and make the CS pins separate as is seen with
> current sun4i DTs
> ---
> arch/arm/boot/dts/sun5i-a10s.dtsi | 21 +++++++++++++++++
> arch/arm/boot/dts/sun5i.dtsi | 49 +++++++++++++++++++++++++++++++++++++++
> 2 files changed, 70 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
> index f11efb7..d9610fa 100644
> --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
> +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
> @@ -201,6 +201,27 @@
> allwinner,drive = <SUN4I_PINCTRL_30_MA>;
> allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> };
> +
> + spi1_cs1_pins_a: spi1_cs1 at 0 {
> + allwinner,pins = "PG13";
> + allwinner,function = "spi1";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + spi2_pins_a: spi2 at 0 {
> + allwinner,pins = "PB12", "PB13", "PB14";
> + allwinner,function = "spi1";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + spi2_cs0_pins_a: spi2_cs0 at 0 {
> + allwinner,pins = "PB11";
> + allwinner,function = "spi1";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
spi2 nodes with spi1 function ??? How can that even work?
> };
>
> &sram_a {
> diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
> index 54b0978..7d32d49 100644
> --- a/arch/arm/boot/dts/sun5i.dtsi
> +++ b/arch/arm/boot/dts/sun5i.dtsi
> @@ -516,6 +516,55 @@
> allwinner,drive = <SUN4I_PINCTRL_30_MA>;
> allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
> };
> +
> + spi0_pins_a: spi0 at 0 {
> + allwinner,pins = "PC00", "PC01", "PC02";
> + allwinner,function = "spi0";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + spi0_cs0_pins_a: spi0_cs0 at 0 {
> + allwinner,pins = "PC03";
> + allwinner,function = "spi0";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + spi1_pins_a: spi1 at 0 {
> + allwinner,pins = "PG10", "PG11", "PG12";
> + allwinner,function = "spi1";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + spi1_cs0_pins_a: spi1_cs0 at 0 {
> + allwinner,pins = "PG09";
> + allwinner,function = "spi1";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + spi2_pins_b: spi2 at 1 {
> + allwinner,pins = "PE01", "PE02", "PE03";
> + allwinner,function = "spi2";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + spi2_cs0_pins_b: spi2_cs1 at 1 {
> + allwinner,pins = "PE00";
> + allwinner,function = "spi2";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + spi2_cs1_pins_a: spi2_cs1 at 0 {
> + allwinner,pins = "PB10";
> + allwinner,function = "spi2";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
Please only add the pins you intend to use.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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next prev parent reply other threads:[~2015-08-20 15:00 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-20 14:15 [PATCH 0/9] spi/sunxi patches Michal Suchanek
2015-08-20 14:19 ` [PATCH 1/9] spi: sunxi: fix transfer timeout Michal Suchanek
2015-08-20 14:43 ` Maxime Ripard
2015-08-20 18:41 ` Mark Brown
2015-08-20 19:34 ` Maxime Ripard
2015-08-20 21:08 ` Mark Brown
2015-08-20 21:18 ` Maxime Ripard
2015-08-20 21:29 ` Mark Brown
2015-08-20 14:19 ` [PATCH 5/9] ARM: dts: sun7i: cubieboard2: Enable SPI0 Michal Suchanek
2015-08-20 14:58 ` Maxime Ripard
2015-08-20 14:19 ` [PATCH 4/9] spi: sun4i: add DMA support Emilio López
2015-08-20 14:24 ` [linux-sunxi] " Michal Suchanek
2015-08-20 14:56 ` Maxime Ripard
2015-08-20 18:58 ` Mark Brown
2016-05-17 5:44 ` [linux-sunxi] " Michal Suchanek
2015-08-20 19:00 ` Mark Brown
2015-08-20 14:19 ` [PATCH 2/9] spi: sun4i: fix FIFO limit Michal Suchanek
2015-08-20 14:45 ` Maxime Ripard
2015-08-20 14:19 ` [PATCH 3/9] spi: sunxi: check that transfer speed is non-zero Michal Suchanek
2015-08-20 14:48 ` Maxime Ripard
2015-08-20 19:45 ` Michal Suchanek
2015-08-20 21:23 ` Maxime Ripard
2015-08-20 18:45 ` Mark Brown
2015-08-20 14:19 ` [PATCH 6/9] ARM: dts: sunxi: add spi aliases on cubieboards Michal Suchanek
2015-08-20 14:19 ` [PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s Michal Suchanek
2015-08-20 15:00 ` Maxime Ripard [this message]
2015-08-20 14:19 ` [PATCH 9/9] ARM: dts: sunxi: Add SPI aliases on A10s Olinuxino Michal Suchanek
2015-08-20 14:19 ` [PATCH 8/9] ARM: dts: sunxi: A10s Olinuxino Micro: add spi2 Michal Suchanek
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