From: jszhang@marvell.com (Jisheng Zhang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH-v2 5/7] mmc: sdhci-pxav3: Fix HS200 mode support
Date: Tue, 8 Sep 2015 14:53:48 +0800 [thread overview]
Message-ID: <20150908145348.6ce640b1@xhacker> (raw)
In-Reply-To: <1441624721-15612-6-git-send-email-vaibhav.hiremath@linaro.org>
On Mon, 7 Sep 2015 16:48:39 +0530
Vaibhav Hiremath <vaibhav.hiremath@linaro.org> wrote:
> From: Kevin Liu <kliu5@marvell.com>
>
> IN case of MMC HS200 mode, current code does not enable
> SD_CE_ATA_2.MMC_HS200 & SD_CE_ATA_2.MMC_CARD bit configurations.
>
> So this patch updates the above bit fields correctly.
>
> Signed-off-by: Tim Wang <wangtt@marvell.com>
> Signed-off-by: Kevin Liu <kliu5@marvell.com>
> Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org>
> ---
> Note: Unfortunately I do not have access to any other datasheets
> which uses sdhci-pxav3 driver, so quite not sure whether this would
> break any existing platform, probably NOT, as I do not see any
> references for this change.
> If anyone can confirm that would be really great.
>
> drivers/mmc/host/sdhci-pxav3.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
> index d933f75..6978810 100644
> --- a/drivers/mmc/host/sdhci-pxav3.c
> +++ b/drivers/mmc/host/sdhci-pxav3.c
> @@ -57,6 +57,8 @@
> #define SD_CE_ATA_1 0x10C
>
> #define SD_CE_ATA_2 0x10E
> +#define SD_CE_ATA2_HS200_EN BIT(10)
> +#define SD_CE_ATA2_MMC_MODE BIT(12)
> #define SDCE_MISC_INT BIT(2)
> #define SDCE_MISC_INT_EN BIT(1)
>
> @@ -330,6 +332,17 @@ static int pxav3_select_pinstate(struct sdhci_host *host, unsigned int uhs)
> return pinctrl_select_state(pxa->pinctrl, pinctrl);
> }
>
> +static int pxav3_select_hs200(struct sdhci_host *host)
I didn't see why we need the return value, make it void would be better?
> +{
> + u16 reg = 0;
> +
> + reg = sdhci_readw(host, SD_CE_ATA_2);
> + reg |= SD_CE_ATA2_HS200_EN | SD_CE_ATA2_MMC_MODE;
> + sdhci_writew(host, reg, SD_CE_ATA_2);
> +
> + return 0;
> +}
> +
> static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
> {
> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> @@ -361,6 +374,10 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
> case MMC_TIMING_UHS_DDR50:
> ctrl_2 |= SDHCI_CTRL_UHS_DDR50 | SDHCI_CTRL_VDD_180;
> break;
> + case MMC_TIMING_MMC_HS200:
> + ctrl_2 |= SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_VDD_180;
> + pxav3_select_hs200(host);
> + break;
> }
>
> /*
next prev parent reply other threads:[~2015-09-08 6:53 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-07 11:18 [PATCH-v2 0/7] mmc: sdhci-pxav3: Enable support for PXA1928 SDCHI controller Vaibhav Hiremath
2015-09-07 11:18 ` [PATCH-v2 1/7] mmc: sdhci-pxav3: Enable pxa1928 device support Vaibhav Hiremath
2015-09-07 11:18 ` [PATCH-v2 2/7] mmc: sdhci-pxav3: binding: Add pxa1928 compatible support Vaibhav Hiremath
2015-09-08 23:49 ` Rob Herring
2015-09-09 11:04 ` Vaibhav Hiremath
2015-09-07 11:18 ` [PATCH-v2 3/7] mmc: sdhci-pxav3: Add platform specific set_clock ops Vaibhav Hiremath
2015-09-07 11:18 ` [PATCH-v2 4/7] mmc: sdhci-pxav3: Add pinctl setting according to bus clock Vaibhav Hiremath
2015-09-08 6:52 ` Jisheng Zhang
2015-09-08 9:34 ` Vaibhav Hiremath
2015-09-08 9:52 ` Jisheng Zhang
2015-09-08 10:02 ` Vaibhav Hiremath
2015-09-08 10:04 ` Jisheng Zhang
2015-09-08 12:17 ` Vaibhav Hiremath
2015-09-08 6:54 ` Jisheng Zhang
2015-09-08 9:54 ` Vaibhav Hiremath
2015-09-08 14:42 ` Linus Walleij
2015-09-08 15:07 ` Vaibhav Hiremath
2015-09-09 8:39 ` Linus Walleij
2015-09-07 11:18 ` [PATCH-v2 5/7] mmc: sdhci-pxav3: Fix HS200 mode support Vaibhav Hiremath
2015-09-08 6:53 ` Jisheng Zhang [this message]
2015-09-08 9:35 ` Vaibhav Hiremath
2015-09-07 11:18 ` [PATCH-v2 6/7] mmc: sdhci: add new quirk for setting BUS_POWER & BUS_VLT fields Vaibhav Hiremath
2015-09-07 11:18 ` [PATCH-v2 7/7] mmc: sdhci: enable SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON for pxa1928 Vaibhav Hiremath
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