* [PATCH 00/10] Add mipi dsi support for rk3288
@ 2015-10-10 9:55 Chris Zhong
2015-10-10 9:55 ` [PATCH 01/10] clk: rockchip: Add sclk_mipidsi_24m for mipi dsi Chris Zhong
` (5 more replies)
0 siblings, 6 replies; 9+ messages in thread
From: Chris Zhong @ 2015-10-10 9:55 UTC (permalink / raw)
To: linux-arm-kernel
The rk3288 MIPI DSI is a Synopsys DesignWare MIPI DSI host controller
IP. This series adds support for a Synopsys DesignWare MIPI DSI host
controller DRM bridge driver and a rockchip MIPI DSI specific DRM
driver.
This series also includes a DRM panel driver for BOE TV080WUM-NL0 panel.
This panel only use the MIPI DSI video mode.
The MIPI DSI feature is tested on rk3288 evb board, backport them to
chrome os kernel v3.14, and it can display normally.
This patchset is base on the patchset from Ying.liu at freescale.com.
<http://www.spinics.net/lists/dri-devel/msg77181.html>
Chris Zhong (8):
clk: rockchip: Add sclk_mipidsi_24m for mipi dsi
drm/rockchip: return a true clock rate to adjusted_mode
drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver
drm: rockchip: Support Synopsys DesignWare MIPI DSI host controller
Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver
ARM: dts: rockchip: add rk3288 mipi_dsi nodes
drm/panel: simple: Add support for BOE TV080WUM-NL0
ARM: dts: rockchip: add support mipi panel tv080wum-nl0 for rk3288-evb
Liu Ying (2):
drm/dsi: Add a helper to get bits per pixel of MIPI DSI pixel format
Documentation: dt-bindings: Add bindings for Synopsys DW MIPI DSI DRM
bridge driver
.../devicetree/bindings/drm/bridge/dw_mipi_dsi.txt | 76 ++
.../bindings/video/dw_mipi_dsi_rockchip.txt | 56 ++
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +-
arch/arm/boot/dts/rk3288.dtsi | 39 +
drivers/clk/rockchip/clk-rk3288.c | 2 +-
drivers/gpu/drm/bridge/Kconfig | 10 +
drivers/gpu/drm/bridge/Makefile | 1 +
drivers/gpu/drm/bridge/dw_mipi_dsi.c | 1055 ++++++++++++++++++++
drivers/gpu/drm/panel/panel-simple.c | 33 +
drivers/gpu/drm/rockchip/Kconfig | 10 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c | 249 +++++
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 9 +
include/drm/bridge/dw_mipi_dsi.h | 27 +
include/drm/drm_mipi_dsi.h | 14 +
include/dt-bindings/clock/rk3288-cru.h | 1 +
16 files changed, 1601 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/drm/bridge/dw_mipi_dsi.txt
create mode 100644 Documentation/devicetree/bindings/video/dw_mipi_dsi_rockchip.txt
create mode 100644 drivers/gpu/drm/bridge/dw_mipi_dsi.c
create mode 100644 drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c
create mode 100644 include/drm/bridge/dw_mipi_dsi.h
--
2.6.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 01/10] clk: rockchip: Add sclk_mipidsi_24m for mipi dsi
2015-10-10 9:55 [PATCH 00/10] Add mipi dsi support for rk3288 Chris Zhong
@ 2015-10-10 9:55 ` Chris Zhong
2015-10-16 21:39 ` Stephen Boyd
2015-10-10 9:55 ` [PATCH 02/10] drm/rockchip: return a true clock rate to adjusted_mode Chris Zhong
` (4 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: Chris Zhong @ 2015-10-10 9:55 UTC (permalink / raw)
To: linux-arm-kernel
sclk_mipidsi_24m is the gating of mipi dsi phy.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3288.c | 2 +-
include/dt-bindings/clock/rk3288-cru.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 9040878..c7d7ebf 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -709,7 +709,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS),
GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS),
GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS),
- GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
+ GATE(SCLK_MIPI_24M, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
/* sclk_gpu gates */
GATE(ACLK_GPU, "aclk_gpu", "sclk_gpu", 0, RK3288_CLKGATE_CON(18), 0, GFLAGS),
diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index c719aac..b07cdd3 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -86,6 +86,7 @@
#define SCLK_USBPHY480M_SRC 122
#define SCLK_PVTM_CORE 123
#define SCLK_PVTM_GPU 124
+#define SCLK_MIPI_24M 125
#define SCLK_MAC 151
#define SCLK_MACREF_OUT 152
--
2.6.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 02/10] drm/rockchip: return a true clock rate to adjusted_mode
2015-10-10 9:55 [PATCH 00/10] Add mipi dsi support for rk3288 Chris Zhong
2015-10-10 9:55 ` [PATCH 01/10] clk: rockchip: Add sclk_mipidsi_24m for mipi dsi Chris Zhong
@ 2015-10-10 9:55 ` Chris Zhong
2015-10-10 9:55 ` [PATCH 06/10] drm: rockchip: Support Synopsys DesignWare MIPI DSI host controller Chris Zhong
` (3 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Chris Zhong @ 2015-10-10 9:55 UTC (permalink / raw)
To: linux-arm-kernel
Sometimes the clock driver can not set a accurate clock_rate for vop,
get the true rate of vop_dclk and set it back to adjusted_mode, since
the mipi dsi driver need to use the clock to make the calculation of
Blanking.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 5d8ae5e..9986b311ed 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1232,6 +1232,12 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc,
reset_control_deassert(vop->dclk_rst);
clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);
+
+ /*
+ * Sometimes the clock driver can not set a accurate clock_rate for vop,
+ * get the true rate of vop_dclk and set it back to adjusted_mode.
+ */
+ adjusted_mode->clock = clk_get_rate(vop->dclk) / 1000;
out:
ret_clk = clk_enable(vop->dclk);
if (ret_clk < 0) {
--
2.6.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 06/10] drm: rockchip: Support Synopsys DesignWare MIPI DSI host controller
2015-10-10 9:55 [PATCH 00/10] Add mipi dsi support for rk3288 Chris Zhong
2015-10-10 9:55 ` [PATCH 01/10] clk: rockchip: Add sclk_mipidsi_24m for mipi dsi Chris Zhong
2015-10-10 9:55 ` [PATCH 02/10] drm/rockchip: return a true clock rate to adjusted_mode Chris Zhong
@ 2015-10-10 9:55 ` Chris Zhong
2015-10-10 9:55 ` [PATCH 07/10] Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver Chris Zhong
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Chris Zhong @ 2015-10-10 9:55 UTC (permalink / raw)
To: linux-arm-kernel
Add support for Synopsys DesignWare MIPI DSI host controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
drivers/gpu/drm/rockchip/Kconfig | 10 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c | 249 ++++++++++++++++++++++++
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 3 +
4 files changed, 263 insertions(+)
create mode 100644 drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c
diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig
index 35215f6..24395f3 100644
--- a/drivers/gpu/drm/rockchip/Kconfig
+++ b/drivers/gpu/drm/rockchip/Kconfig
@@ -25,3 +25,13 @@ config ROCKCHIP_DW_HDMI
for the Synopsys DesignWare HDMI driver. If you want to
enable HDMI on RK3288 based SoC, you should selet this
option.
+
+config ROCKCHIP_DW_MIPI_DSI
+ bool "Rockchip specific extensions for Synopsys DW MIPI DSI"
+ depends on DRM_ROCKCHIP
+ select DRM_DW_MIPI_DSI
+ help
+ This selects support for Rockchip SoC specific extensions
+ for the Synopsys DesignWare HDMI driver. If you want to
+ enable MIPI DSI on RK3288 based SoC, you should selet this
+ option.
diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile
index f3d8a19..6a97059 100644
--- a/drivers/gpu/drm/rockchip/Makefile
+++ b/drivers/gpu/drm/rockchip/Makefile
@@ -6,5 +6,6 @@ rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o rockchip_drm_fbdev.o \
rockchip_drm_gem.o
obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o
+obj-$(CONFIG_ROCKCHIP_DW_MIPI_DSI) += dw_mipi_dsi_rockchip.o
obj-$(CONFIG_DRM_ROCKCHIP) += rockchipdrm.o rockchip_drm_vop.o
diff --git a/drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c b/drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c
new file mode 100644
index 0000000..a0bb4eb
--- /dev/null
+++ b/drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c
@@ -0,0 +1,249 @@
+/*
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/component.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/regmap.h>
+#include <linux/videodev2.h>
+#include <drm/bridge/dw_mipi_dsi.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_of.h>
+
+#include "rockchip_drm_drv.h"
+#include "rockchip_drm_vop.h"
+
+#define DRIVER_NAME "rockchip-mipi-dsi"
+
+#define GRF_SOC_CON6 0x025c
+#define DSI0_SEL_VOP_LIT (1 << 6)
+#define DSI1_SEL_VOP_LIT (1 << 9)
+
+struct rockchip_mipi_dsi {
+ struct drm_encoder encoder;
+ struct device *dev;
+ struct regmap *regmap;
+};
+
+static inline struct rockchip_mipi_dsi *enc_to_dsi(struct drm_encoder *enc)
+{
+ return container_of(enc, struct rockchip_mipi_dsi, encoder);
+}
+
+static struct drm_encoder_funcs rockchip_mipi_dsi_encoder_funcs = {
+ .destroy = drm_encoder_cleanup,
+};
+
+static int rockchip_mipi_parse_dt(struct rockchip_mipi_dsi *dsi)
+{
+ struct device_node *np = dsi->dev->of_node;
+
+ dsi->regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
+ if (IS_ERR(dsi->regmap)) {
+ dev_err(dsi->dev, "Unable to get rockchip,grf\n");
+ return PTR_ERR(dsi->regmap);
+ }
+
+ return 0;
+}
+
+static bool rockchip_mipi_dsi_encoder_mode_fixup(struct drm_encoder *encoder,
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+ return true;
+}
+
+static void rockchip_mipi_dsi_encoder_prepare(struct drm_encoder *encoder)
+{
+ u32 encoder_pix_fmt, interface_pix_fmt;
+
+ encoder_pix_fmt = dw_mipi_dsi_get_encoder_pixel_format(encoder);
+
+ switch (encoder_pix_fmt) {
+ case MIPI_DSI_FMT_RGB888:
+ interface_pix_fmt = ROCKCHIP_OUT_MODE_P888;
+ break;
+ case MIPI_DSI_FMT_RGB666:
+ interface_pix_fmt = ROCKCHIP_OUT_MODE_P666;
+ break;
+ case MIPI_DSI_FMT_RGB565:
+ interface_pix_fmt = ROCKCHIP_OUT_MODE_P565;
+ break;
+ default:
+ WARN_ON(1);
+ return;
+ }
+
+ rockchip_drm_crtc_mode_config(encoder->crtc, DRM_MODE_CONNECTOR_DSI,
+ interface_pix_fmt);
+}
+
+static void rockchip_mipi_dsi_encoder_mode_set(struct drm_encoder *encoder,
+ struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+}
+
+static void rockchip_mipi_dsi_encoder_commit(struct drm_encoder *encoder)
+{
+ struct rockchip_mipi_dsi *dsi = enc_to_dsi(encoder);
+ u32 val;
+ int mux = rockchip_drm_encoder_get_mux_id(dsi->dev->of_node, encoder);
+
+ if (mux)
+ val = DSI0_SEL_VOP_LIT | (DSI0_SEL_VOP_LIT << 16);
+ else
+ val = DSI0_SEL_VOP_LIT << 16;
+
+ regmap_write(dsi->regmap, GRF_SOC_CON6, val);
+ dev_dbg(dsi->dev, "vop %s output to dsi0\n",
+ (mux) ? "LIT" : "BIG");
+}
+
+static void rockchip_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
+{
+}
+
+static struct drm_encoder_helper_funcs
+rockchip_mipi_dsi_encoder_helper_funcs = {
+ .mode_fixup = rockchip_mipi_dsi_encoder_mode_fixup,
+ .prepare = rockchip_mipi_dsi_encoder_prepare,
+ .mode_set = rockchip_mipi_dsi_encoder_mode_set,
+ .commit = rockchip_mipi_dsi_encoder_commit,
+ .disable = rockchip_mipi_dsi_encoder_disable,
+};
+
+static int rockchip_mipi_dsi_register(struct drm_device *drm,
+ struct rockchip_mipi_dsi *dsi)
+{
+ struct drm_encoder *encoder = &dsi->encoder;
+ struct device *dev = dsi->dev;
+
+ encoder->possible_crtcs = drm_of_find_possible_crtcs(drm,
+ dev->of_node);
+ /*
+ * If we failed to find the CRTC(s) which this encoder is
+ * supposed to be connected to, it's because the CRTC has
+ * not been registered yet. Defer probing, and hope that
+ * the required CRTC is added later.
+ */
+ if (encoder->possible_crtcs == 0)
+ return -EPROBE_DEFER;
+
+ drm_encoder_helper_add(&dsi->encoder,
+ &rockchip_mipi_dsi_encoder_helper_funcs);
+ drm_encoder_init(drm, &dsi->encoder, &rockchip_mipi_dsi_encoder_funcs,
+ DRM_MODE_ENCODER_DSI);
+ return 0;
+}
+
+static enum drm_mode_status rockchip_mipi_dsi_mode_valid(
+ struct drm_connector *connector,
+ struct drm_display_mode *mode)
+{
+ /*
+ * The VID_PKT_SIZE field in the DSI_VID_PKT_CFG
+ * register is 11-bit.
+ */
+ if (mode->hdisplay > 0x7ff)
+ return MODE_BAD_HVALUE;
+
+ /*
+ * The V_ACTIVE_LINES field in the DSI_VTIMING_CFG
+ * register is 11-bit.
+ */
+ if (mode->vdisplay > 0x7ff)
+ return MODE_BAD_VVALUE;
+
+ return MODE_OK;
+}
+
+static struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
+ .max_data_lanes = 4,
+ .mode_valid = rockchip_mipi_dsi_mode_valid,
+};
+
+static const struct of_device_id rockchip_mipi_dsi_dt_ids[] = {
+ {
+ .compatible = "rockchip,rk3288-mipi-dsi",
+ .data = &rk3288_mipi_dsi_drv_data,
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, rockchip_mipi_dsi_dt_ids);
+
+static int rockchip_mipi_dsi_bind(struct device *dev, struct device *master,
+ void *data)
+{
+ const struct of_device_id *of_id =
+ of_match_device(rockchip_mipi_dsi_dt_ids, dev);
+ const struct dw_mipi_dsi_plat_data *pdata = of_id->data;
+ struct drm_device *drm = data;
+ struct rockchip_mipi_dsi *dsi;
+ int ret;
+
+ dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
+ if (!dsi)
+ return -ENOMEM;
+
+ dsi->dev = dev;
+
+ ret = rockchip_mipi_dsi_register(drm, dsi);
+ if (ret)
+ return ret;
+
+ ret = rockchip_mipi_parse_dt(dsi);
+ if (ret)
+ return ret;
+
+ dev_set_drvdata(dev, dsi);
+
+ return dw_mipi_dsi_bind(dev, master, data, &dsi->encoder, pdata);
+}
+
+static void rockchip_mipi_dsi_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+ return dw_mipi_dsi_unbind(dev, master, data);
+}
+
+static const struct component_ops rockchip_mipi_dsi_ops = {
+ .bind = rockchip_mipi_dsi_bind,
+ .unbind = rockchip_mipi_dsi_unbind,
+};
+
+static int rockchip_mipi_dsi_probe(struct platform_device *pdev)
+{
+ return component_add(&pdev->dev, &rockchip_mipi_dsi_ops);
+}
+
+static int rockchip_mipi_dsi_remove(struct platform_device *pdev)
+{
+ component_del(&pdev->dev, &rockchip_mipi_dsi_ops);
+ return 0;
+}
+
+static struct platform_driver rockchip_mipi_dsi_driver = {
+ .probe = rockchip_mipi_dsi_probe,
+ .remove = rockchip_mipi_dsi_remove,
+ .driver = {
+ .of_match_table = rockchip_mipi_dsi_dt_ids,
+ .name = DRIVER_NAME,
+ },
+};
+module_platform_driver(rockchip_mipi_dsi_driver);
+
+MODULE_DESCRIPTION("ROCKCHIP MIPI DSI host controller driver");
+MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 9986b311ed..977c17c 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1194,6 +1194,9 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc,
case DRM_MODE_CONNECTOR_HDMIA:
VOP_CTRL_SET(vop, hdmi_en, 1);
break;
+ case DRM_MODE_CONNECTOR_DSI:
+ VOP_CTRL_SET(vop, mipi_en, 1);
+ break;
default:
DRM_ERROR("unsupport connector_type[%d]\n",
vop->connector_type);
--
2.6.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 07/10] Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver
2015-10-10 9:55 [PATCH 00/10] Add mipi dsi support for rk3288 Chris Zhong
` (2 preceding siblings ...)
2015-10-10 9:55 ` [PATCH 06/10] drm: rockchip: Support Synopsys DesignWare MIPI DSI host controller Chris Zhong
@ 2015-10-10 9:55 ` Chris Zhong
2015-10-10 9:55 ` [PATCH 08/10] ARM: dts: rockchip: add rk3288 mipi_dsi nodes Chris Zhong
2015-10-10 9:55 ` [PATCH 10/10] ARM: dts: rockchip: add support mipi panel tv080wum-nl0 for rk3288-evb Chris Zhong
5 siblings, 0 replies; 9+ messages in thread
From: Chris Zhong @ 2015-10-10 9:55 UTC (permalink / raw)
To: linux-arm-kernel
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
.../bindings/video/dw_mipi_dsi_rockchip.txt | 56 ++++++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/dw_mipi_dsi_rockchip.txt
diff --git a/Documentation/devicetree/bindings/video/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/video/dw_mipi_dsi_rockchip.txt
new file mode 100644
index 0000000..4dea804
--- /dev/null
+++ b/Documentation/devicetree/bindings/video/dw_mipi_dsi_rockchip.txt
@@ -0,0 +1,56 @@
+Rockchip specific extensions to the Synopsys Designware MIPI DSI
+================================
+
+Required properties:
+- compatible: "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi".
+- rockchip,grf: this soc should set GRF regs to mux vopl/vopb.
+- ports: contain a port node with endpoint definitions as defined in [1].
+ For vopb,set the reg = <0> and set the reg = <1> for vopl.
+
+For more required properties, please refer to [2].
+
+[1] Documentation/devicetree/bindings/media/video-interfaces.txt
+[2] Documentation/devicetree/bindings/drm/bridge/dw_mipi_dsi.txt
+
+Example:
+ mipi_dsi: mipi at ff960000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0xff960000 0x4000>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPI_DSI0>;
+ clock-names = "ref", "pclk";
+ rockchip,grf = <&grf>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ mipi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mipi_in_vopb: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_mipi>;
+ };
+ mipi_in_vopl: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_mipi>;
+ };
+ };
+ };
+
+ panel {
+ compatible ="boe,tv080wum-nl0";
+ reg = <0>;
+
+ enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_en>;
+ backlight = <&backlight>;
+ status = "okay";
+ };
+ };
--
2.6.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 08/10] ARM: dts: rockchip: add rk3288 mipi_dsi nodes
2015-10-10 9:55 [PATCH 00/10] Add mipi dsi support for rk3288 Chris Zhong
` (3 preceding siblings ...)
2015-10-10 9:55 ` [PATCH 07/10] Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver Chris Zhong
@ 2015-10-10 9:55 ` Chris Zhong
2015-10-10 9:55 ` [PATCH 10/10] ARM: dts: rockchip: add support mipi panel tv080wum-nl0 for rk3288-evb Chris Zhong
5 siblings, 0 replies; 9+ messages in thread
From: Chris Zhong @ 2015-10-10 9:55 UTC (permalink / raw)
To: linux-arm-kernel
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
arch/arm/boot/dts/rk3288.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 1a7cb08..3266d11 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -783,6 +783,10 @@
reg = <0>;
remote-endpoint = <&hdmi_in_vopb>;
};
+ vopb_out_mipi: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&mipi_in_vopb>;
+ };
};
};
@@ -816,6 +820,10 @@
reg = <0>;
remote-endpoint = <&hdmi_in_vopl>;
};
+ vopl_out_mipi: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&mipi_in_vopl>;
+ };
};
};
@@ -856,6 +864,37 @@
};
};
+ mipi_dsi: mipi at ff960000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0xff960000 0x4000>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPI_DSI0>;
+ clock-names = "ref", "pclk";
+ rockchip,grf = <&grf>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ mipi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mipi_in_vopb: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_mipi>;
+ };
+ mipi_in_vopl: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_mipi>;
+ };
+ };
+ };
+ };
+
gic: interrupt-controller at ffc01000 {
compatible = "arm,gic-400";
interrupt-controller;
--
2.6.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 10/10] ARM: dts: rockchip: add support mipi panel tv080wum-nl0 for rk3288-evb
2015-10-10 9:55 [PATCH 00/10] Add mipi dsi support for rk3288 Chris Zhong
` (4 preceding siblings ...)
2015-10-10 9:55 ` [PATCH 08/10] ARM: dts: rockchip: add rk3288 mipi_dsi nodes Chris Zhong
@ 2015-10-10 9:55 ` Chris Zhong
5 siblings, 0 replies; 9+ messages in thread
From: Chris Zhong @ 2015-10-10 9:55 UTC (permalink / raw)
To: linux-arm-kernel
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index f6d2e78..d04878f 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -47,7 +47,7 @@
reg = <0x0 0x80000000>;
};
- backlight {
+ backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <
0 1 2 3 4 5 6 7
@@ -177,6 +177,21 @@
status = "okay";
};
+&mipi_dsi {
+ status = "okay";
+
+ panel {
+ compatible ="boe,tv080wum-nl0";
+ reg = <0>;
+
+ enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_en>;
+ backlight = <&backlight>;
+ status = "okay";
+ };
+};
+
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
@@ -247,6 +262,9 @@
bl_en: bl-en {
rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
};
+ lcd_en: lcd-en {
+ rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
};
buttons {
--
2.6.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 01/10] clk: rockchip: Add sclk_mipidsi_24m for mipi dsi
2015-10-10 9:55 ` [PATCH 01/10] clk: rockchip: Add sclk_mipidsi_24m for mipi dsi Chris Zhong
@ 2015-10-16 21:39 ` Stephen Boyd
2015-10-17 0:49 ` Chris Zhong
0 siblings, 1 reply; 9+ messages in thread
From: Stephen Boyd @ 2015-10-16 21:39 UTC (permalink / raw)
To: linux-arm-kernel
On 10/10, Chris Zhong wrote:
> sclk_mipidsi_24m is the gating of mipi dsi phy.
>
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
> ---
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
>
> drivers/clk/rockchip/clk-rk3288.c | 2 +-
> include/dt-bindings/clock/rk3288-cru.h | 1 +
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
> index 9040878..c7d7ebf 100644
> --- a/drivers/clk/rockchip/clk-rk3288.c
> +++ b/drivers/clk/rockchip/clk-rk3288.c
> @@ -709,7 +709,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
> GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS),
> GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS),
> GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS),
> - GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
> + GATE(SCLK_MIPI_24M, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
>
It would have been better to make #defines for all these clocks
even if they weren't going to be used here. Then we could have
applied this patch directly to clk tree without having a clk tree
to arm-soc dependency. </grumble>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 01/10] clk: rockchip: Add sclk_mipidsi_24m for mipi dsi
2015-10-16 21:39 ` Stephen Boyd
@ 2015-10-17 0:49 ` Chris Zhong
0 siblings, 0 replies; 9+ messages in thread
From: Chris Zhong @ 2015-10-17 0:49 UTC (permalink / raw)
To: linux-arm-kernel
On 10/17/2015 05:39 AM, Stephen Boyd wrote:
> On 10/10, Chris Zhong wrote:
>> sclk_mipidsi_24m is the gating of mipi dsi phy.
>>
>> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
>> ---
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
>
>> drivers/clk/rockchip/clk-rk3288.c | 2 +-
>> include/dt-bindings/clock/rk3288-cru.h | 1 +
>> 2 files changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
>> index 9040878..c7d7ebf 100644
>> --- a/drivers/clk/rockchip/clk-rk3288.c
>> +++ b/drivers/clk/rockchip/clk-rk3288.c
>> @@ -709,7 +709,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
>> GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS),
>> GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS),
>> GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS),
>> - GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
>> + GATE(SCLK_MIPI_24M, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
>>
> It would have been better to make #defines for all these clocks
> even if they weren't going to be used here. Then we could have
> applied this patch directly to clk tree without having a clk tree
> to arm-soc dependency. </grumble>
>
Thanks for your great suggestion, I'll defines all clocks at next
version patch serial
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2015-10-17 0:49 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-10-10 9:55 [PATCH 00/10] Add mipi dsi support for rk3288 Chris Zhong
2015-10-10 9:55 ` [PATCH 01/10] clk: rockchip: Add sclk_mipidsi_24m for mipi dsi Chris Zhong
2015-10-16 21:39 ` Stephen Boyd
2015-10-17 0:49 ` Chris Zhong
2015-10-10 9:55 ` [PATCH 02/10] drm/rockchip: return a true clock rate to adjusted_mode Chris Zhong
2015-10-10 9:55 ` [PATCH 06/10] drm: rockchip: Support Synopsys DesignWare MIPI DSI host controller Chris Zhong
2015-10-10 9:55 ` [PATCH 07/10] Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver Chris Zhong
2015-10-10 9:55 ` [PATCH 08/10] ARM: dts: rockchip: add rk3288 mipi_dsi nodes Chris Zhong
2015-10-10 9:55 ` [PATCH 10/10] ARM: dts: rockchip: add support mipi panel tv080wum-nl0 for rk3288-evb Chris Zhong
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