[PATCH v3 0/3] ARM: OMAP2+ McASP(3) support for DRA7xx family

[PATCH v3 0/3] ARM: OMAP2+ McASP(3) support for DRA7xx family

[Peter Ujfalusi]

Hi Paul, Tony,

Changes since v2:
- DTS patch added which is needed because of the clock handling changes

Felip Balbi reported that linux-next is broken right now since the DTS part of
the earlier series has been applied, but we do not have the mcasp hwmod in the
kernel:
...
[    0.181029] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'
...
[    6.121072] davinci-mcasp 48468000.mcasp: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
[    6.130790] ------------[ cut here ]------------
[    6.135643] WARNING: CPU: 0 PID: 244 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x220/0x34c()
[    6.145576] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access
...

This is the followup series for the hwmod changes needed to get audio working
on DRA7xx family based boards.
The DTS patches has been applied by Tony from the original series:
http://www.spinics.net/lists/linux-omap/msg121473.html

I have addressed your comments in the hwmod data and did some research also
regarding to the use of ahclkx as fclk in the original submission.
It turned out that McASP _needs_ all clocks to be enabled (fclk, iclk and
ahclkx/r) to be able to access registers. The original patch where we handled
the ahclkx as fclk worked, because the fclk clock got enabled in the HW w/o
any SW interaction.
All in all, the McASP found in DRA7 needs all clocks to be enabled.
To satisfy this I have introduced a new flag to hwmod, which means that the
listed optional clocks need to be handled alongside with the fclk clock.

Regards,
Peter
---
Peter Ujfalusi (3):
  ARM: DTS: dra7: Fix McASP3 node regarding to clocks
  ARM: OMAP2+: hwmod: Add hwmod flag for HWMOD_OPT_CLKS_NEEDED
  ARM: OMAP: DRA7: hwmod: Add data for McASP3

 arch/arm/boot/dts/dra7.dtsi               |  4 +-
 arch/arm/mach-omap2/omap_hwmod.c          | 66 +++++++++++++++++--------------
 arch/arm/mach-omap2/omap_hwmod.h          |  3 ++
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 56 ++++++++++++++++++++++++++
 4 files changed, 97 insertions(+), 32 deletions(-)

-- 
2.6.1

[PATCH v3 1/3] ARM: DTS: dra7: Fix McASP3 node regarding to clocks

[Peter Ujfalusi]

McASP node needs to list all mandatory clocks: gfclk and ahclkx

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index bc672fb91466..fe99231cbde5 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1459,8 +1459,8 @@
 			interrupt-names = "tx", "rx";
 			dmas = <&sdma_xbar 133>, <&sdma_xbar 132>;
 			dma-names = "tx", "rx";
-			clocks = <&mcasp3_ahclkx_mux>;
-			clock-names = "fck";
+			clocks = <&mcasp3_aux_gfclk_mux>, <&mcasp3_ahclkx_mux>;
+			clock-names = "fck", "ahclkx";
 			status = "disabled";
 		};
 
-- 
2.6.1

[PATCH v3 2/3] ARM: OMAP2+: hwmod: Add hwmod flag for HWMOD_OPT_CLKS_NEEDED

[Peter Ujfalusi]

Some module needs more than one functional clock in order to be accessible,
like the McASPs found in DRA7xx family.
This flag will indicate that the opt_clks need to be handled at the same
time as the main_clk for the given hwmod, ensuring that all needed clocks
are enabled before we try to access the module's address space.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod.c | 66 ++++++++++++++++++++++------------------
 arch/arm/mach-omap2/omap_hwmod.h |  3 ++
 2 files changed, 39 insertions(+), 30 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index cc8a987149e2..48495ad82aba 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -890,6 +890,36 @@ static int _init_opt_clks(struct omap_hwmod *oh)
 	return ret;
 }
 
+static void _enable_optional_clocks(struct omap_hwmod *oh)
+{
+	struct omap_hwmod_opt_clk *oc;
+	int i;
+
+	pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
+
+	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+		if (oc->_clk) {
+			pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
+				 __clk_get_name(oc->_clk));
+			clk_enable(oc->_clk);
+		}
+}
+
+static void _disable_optional_clocks(struct omap_hwmod *oh)
+{
+	struct omap_hwmod_opt_clk *oc;
+	int i;
+
+	pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
+
+	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+		if (oc->_clk) {
+			pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
+				 __clk_get_name(oc->_clk));
+			clk_disable(oc->_clk);
+		}
+}
+
 /**
  * _enable_clocks - enable hwmod main clock and interface clocks
  * @oh: struct omap_hwmod *
@@ -917,6 +947,9 @@ static int _enable_clocks(struct omap_hwmod *oh)
 			clk_enable(os->_clk);
 	}
 
+	if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
+		_enable_optional_clocks(oh);
+
 	/* The opt clocks are controlled by the device driver. */
 
 	return 0;
@@ -948,41 +981,14 @@ static int _disable_clocks(struct omap_hwmod *oh)
 			clk_disable(os->_clk);
 	}
 
+	if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
+		_disable_optional_clocks(oh);
+
 	/* The opt clocks are controlled by the device driver. */
 
 	return 0;
 }
 
-static void _enable_optional_clocks(struct omap_hwmod *oh)
-{
-	struct omap_hwmod_opt_clk *oc;
-	int i;
-
-	pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
-
-	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
-		if (oc->_clk) {
-			pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
-				 __clk_get_name(oc->_clk));
-			clk_enable(oc->_clk);
-		}
-}
-
-static void _disable_optional_clocks(struct omap_hwmod *oh)
-{
-	struct omap_hwmod_opt_clk *oc;
-	int i;
-
-	pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
-
-	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
-		if (oc->_clk) {
-			pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
-				 __clk_get_name(oc->_clk));
-			clk_disable(oc->_clk);
-		}
-}
-
 /**
  * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  * @oh: struct omap_hwmod *
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index ca6df1a73475..76bce11c85a4 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -523,6 +523,8 @@ struct omap_hwmod_omap4_prcm {
  * HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up 
  *     events by calling _reconfigure_io_chain() when a device is enabled
  *     or idled.
+ * HWMOD_OPT_CLKS_NEEDED: The optional clocks are needed for the module to
+ *     operate and they need to be handled at the same time as the main_clk.
  */
 #define HWMOD_SWSUP_SIDLE			(1 << 0)
 #define HWMOD_SWSUP_MSTANDBY			(1 << 1)
@@ -538,6 +540,7 @@ struct omap_hwmod_omap4_prcm {
 #define HWMOD_FORCE_MSTANDBY			(1 << 11)
 #define HWMOD_SWSUP_SIDLE_ACT			(1 << 12)
 #define HWMOD_RECONFIG_IO_CHAIN			(1 << 13)
+#define HWMOD_OPT_CLKS_NEEDED			(1 << 14)
 
 /*
  * omap_hwmod._int_flags definitions
-- 
2.6.1

[PATCH v3 3/3] ARM: OMAP: DRA7: hwmod: Add data for McASP3

[Peter Ujfalusi]

McASP3 is used by default on DRA7x based boards for audio.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 56 +++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 562247bced49..d798ebe218b2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1298,6 +1298,44 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = {
 };
 
 /*
+ * 'mcasp' class
+ *
+ */
+static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
+	.sysc_offs	= 0x0004,
+	.sysc_flags	= SYSC_HAS_SIDLEMODE,
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+	.sysc_fields	= &omap_hwmod_sysc_type3,
+};
+
+static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
+	.name	= "mcasp",
+	.sysc	= &dra7xx_mcasp_sysc,
+};
+
+/* mcasp3 */
+static struct omap_hwmod_opt_clk mcasp3_opt_clks[] = {
+	{ .role = "ahclkx", .clk = "mcasp3_ahclkx_mux" },
+};
+
+static struct omap_hwmod dra7xx_mcasp3_hwmod = {
+	.name		= "mcasp3",
+	.class		= &dra7xx_mcasp_hwmod_class,
+	.clkdm_name	= "l4per2_clkdm",
+	.main_clk	= "mcasp3_aux_gfclk_mux",
+	.flags		= HWMOD_OPT_CLKS_NEEDED,
+	.prcm = {
+		.omap4 = {
+			.clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
+			.context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
+			.modulemode   = MODULEMODE_SWCTRL,
+		},
+	},
+	.opt_clks	= mcasp3_opt_clks,
+	.opt_clks_cnt	= ARRAY_SIZE(mcasp3_opt_clks),
+};
+
+/*
  * 'mmc' class
  *
  */
@@ -2566,6 +2604,22 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = {
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_per2 -> mcasp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
+	.master		= &dra7xx_l4_per2_hwmod,
+	.slave		= &dra7xx_mcasp3_hwmod,
+	.clk		= "l4_root_clk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l3_main_1 -> mcasp3 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__mcasp3 = {
+	.master		= &dra7xx_l3_main_1_hwmod,
+	.slave		= &dra7xx_mcasp3_hwmod,
+	.clk		= "l3_iclk_div",
+	.user		= OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 static struct omap_hwmod_addr_space dra7xx_elm_addrs[] = {
 	{
 		.pa_start	= 0x48078000,
@@ -3338,6 +3392,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
 	&dra7xx_l4_wkup__dcan1,
 	&dra7xx_l4_per2__dcan2,
 	&dra7xx_l4_per2__cpgmac0,
+	&dra7xx_l4_per2__mcasp3,
+	&dra7xx_l3_main_1__mcasp3,
 	&dra7xx_gmac__mdio,
 	&dra7xx_l4_cfg__dma_system,
 	&dra7xx_l3_main_1__dss,
-- 
2.6.1

[PATCH v3 3/3] ARM: OMAP: DRA7: hwmod: Add data for McASP3

[Tony Lindgren]

Peter,

* Peter Ujfalusi <peter.ujfalusi@ti.com> [151030 00:55]:
> McASP3 is used by default on DRA7x based boards for audio.

Looks like this one no longer applies cleanly. Can you please
rebase and test against current mainline?

Regards,

Tony

> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
>  arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 56 +++++++++++++++++++++++++++++++
>  1 file changed, 56 insertions(+)
> 
> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> index 562247bced49..d798ebe218b2 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> @@ -1298,6 +1298,44 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = {
>  };
>  
>  /*
> + * 'mcasp' class
> + *
> + */
> +static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
> +	.sysc_offs	= 0x0004,
> +	.sysc_flags	= SYSC_HAS_SIDLEMODE,
> +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> +	.sysc_fields	= &omap_hwmod_sysc_type3,
> +};
> +
> +static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
> +	.name	= "mcasp",
> +	.sysc	= &dra7xx_mcasp_sysc,
> +};
> +
> +/* mcasp3 */
> +static struct omap_hwmod_opt_clk mcasp3_opt_clks[] = {
> +	{ .role = "ahclkx", .clk = "mcasp3_ahclkx_mux" },
> +};
> +
> +static struct omap_hwmod dra7xx_mcasp3_hwmod = {
> +	.name		= "mcasp3",
> +	.class		= &dra7xx_mcasp_hwmod_class,
> +	.clkdm_name	= "l4per2_clkdm",
> +	.main_clk	= "mcasp3_aux_gfclk_mux",
> +	.flags		= HWMOD_OPT_CLKS_NEEDED,
> +	.prcm = {
> +		.omap4 = {
> +			.clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
> +			.context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
> +			.modulemode   = MODULEMODE_SWCTRL,
> +		},
> +	},
> +	.opt_clks	= mcasp3_opt_clks,
> +	.opt_clks_cnt	= ARRAY_SIZE(mcasp3_opt_clks),
> +};
> +
> +/*
>   * 'mmc' class
>   *
>   */
> @@ -2566,6 +2604,22 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = {
>  	.user		= OCP_USER_MPU | OCP_USER_SDMA,
>  };
>  
> +/* l4_per2 -> mcasp3 */
> +static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
> +	.master		= &dra7xx_l4_per2_hwmod,
> +	.slave		= &dra7xx_mcasp3_hwmod,
> +	.clk		= "l4_root_clk_div",
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* l3_main_1 -> mcasp3 */
> +static struct omap_hwmod_ocp_if dra7xx_l3_main_1__mcasp3 = {
> +	.master		= &dra7xx_l3_main_1_hwmod,
> +	.slave		= &dra7xx_mcasp3_hwmod,
> +	.clk		= "l3_iclk_div",
> +	.user		= OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
>  static struct omap_hwmod_addr_space dra7xx_elm_addrs[] = {
>  	{
>  		.pa_start	= 0x48078000,
> @@ -3338,6 +3392,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
>  	&dra7xx_l4_wkup__dcan1,
>  	&dra7xx_l4_per2__dcan2,
>  	&dra7xx_l4_per2__cpgmac0,
> +	&dra7xx_l4_per2__mcasp3,
> +	&dra7xx_l3_main_1__mcasp3,
>  	&dra7xx_gmac__mdio,
>  	&dra7xx_l4_cfg__dma_system,
>  	&dra7xx_l3_main_1__dss,
> -- 
> 2.6.1
> 

[PATCH v3 0/3] ARM: OMAP2+ McASP(3) support for DRA7xx family

[Paul Walmsley]

Hi P?ter

On Fri, 30 Oct 2015, Peter Ujfalusi wrote:

> Changes since v2:
> - DTS patch added which is needed because of the clock handling changes
> 
> Felip Balbi reported that linux-next is broken right now since the DTS part of
> the earlier series has been applied, but we do not have the mcasp hwmod in the
> kernel:
> ...
> [    0.181029] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'
> ...
> [    6.121072] davinci-mcasp 48468000.mcasp: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
> [    6.130790] ------------[ cut here ]------------
> [    6.135643] WARNING: CPU: 0 PID: 244 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x220/0x34c()
> [    6.145576] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access
> ...
> 
> This is the followup series for the hwmod changes needed to get audio working
> on DRA7xx family based boards.
> The DTS patches has been applied by Tony from the original series:
> http://www.spinics.net/lists/linux-omap/msg121473.html
> 
> I have addressed your comments in the hwmod data and did some research also
> regarding to the use of ahclkx as fclk in the original submission.
> It turned out that McASP _needs_ all clocks to be enabled (fclk, iclk and
> ahclkx/r) to be able to access registers. The original patch where we handled
> the ahclkx as fclk worked, because the fclk clock got enabled in the HW w/o
> any SW interaction.
> All in all, the McASP found in DRA7 needs all clocks to be enabled.
> To satisfy this I have introduced a new flag to hwmod, which means that the
> listed optional clocks need to be handled alongside with the fclk clock.

Thanks.  I'm happy with your series and appreciate the indepth 
investigation.  As you probably saw last week, we've hit the limit for 
v4.4-rc1:

http://marc.info/?l=linux-omap&m=144564929721826&w=2

This is why I haven't done anything with this series at this time.  
Unfortunately I don't have a DRA7xx board, so I can't do any testing.  
But if this series fixes a problem with DRA7xx in linux-next, we should 
definitely merge it.

Tony, if you want to take this now, you can either take it with my ack, or 
I can send a pull request.  Or, if you'd prefer to take it for v4.4-rc2, 
I can send a pull request after v4.4-rc1.


- Paul

[PATCH v3 0/3] ARM: OMAP2+ McASP(3) support for DRA7xx family

[Peter Ujfalusi]

Tony,

On 10/30/2015 06:11 PM, Paul Walmsley wrote:
> Hi P?ter
> 
> On Fri, 30 Oct 2015, Peter Ujfalusi wrote:
> 
>> Changes since v2:
>> - DTS patch added which is needed because of the clock handling changes
>>
>> Felip Balbi reported that linux-next is broken right now since the DTS part of
>> the earlier series has been applied, but we do not have the mcasp hwmod in the
>> kernel:
>> ...
>> [    0.181029] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'
>> ...
>> [    6.121072] davinci-mcasp 48468000.mcasp: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
>> [    6.130790] ------------[ cut here ]------------
>> [    6.135643] WARNING: CPU: 0 PID: 244 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x220/0x34c()
>> [    6.145576] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access
>> ...
>>
>> This is the followup series for the hwmod changes needed to get audio working
>> on DRA7xx family based boards.
>> The DTS patches has been applied by Tony from the original series:
>> http://www.spinics.net/lists/linux-omap/msg121473.html
>>
>> I have addressed your comments in the hwmod data and did some research also
>> regarding to the use of ahclkx as fclk in the original submission.
>> It turned out that McASP _needs_ all clocks to be enabled (fclk, iclk and
>> ahclkx/r) to be able to access registers. The original patch where we handled
>> the ahclkx as fclk worked, because the fclk clock got enabled in the HW w/o
>> any SW interaction.
>> All in all, the McASP found in DRA7 needs all clocks to be enabled.
>> To satisfy this I have introduced a new flag to hwmod, which means that the
>> listed optional clocks need to be handled alongside with the fclk clock.
> 
> Thanks.  I'm happy with your series and appreciate the indepth 
> investigation.  As you probably saw last week, we've hit the limit for 
> v4.4-rc1:
> 
> http://marc.info/?l=linux-omap&m=144564929721826&w=2
> 
> This is why I haven't done anything with this series at this time.  
> Unfortunately I don't have a DRA7xx board, so I can't do any testing.  
> But if this series fixes a problem with DRA7xx in linux-next, we should 
> definitely merge it.
> 
> Tony, if you want to take this now, you can either take it with my ack, or 
> I can send a pull request.  Or, if you'd prefer to take it for v4.4-rc2, 
> I can send a pull request after v4.4-rc1.

The ARM soc changes for 4.4 are now pulled in to mainline, including the
DRA7/72/X15 audio related DTS changes, but this three patch is not. This means
that dra7-evm, dra72-evm and bealge-x15 will not boot from mainline.
Is there a way to push these patches as soon as possible?

Thanks,
P?ter

[PATCH v3 0/3] ARM: OMAP2+ McASP(3) support for DRA7xx family

[Tony Lindgren]

* Paul Walmsley <paul@pwsan.com> [151030 09:11]:
> Hi P?ter
> 
> On Fri, 30 Oct 2015, Peter Ujfalusi wrote:
> 
> > Changes since v2:
> > - DTS patch added which is needed because of the clock handling changes
> > 
> > Felip Balbi reported that linux-next is broken right now since the DTS part of
> > the earlier series has been applied, but we do not have the mcasp hwmod in the
> > kernel:
> > ...
> > [    0.181029] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'
> > ...
> > [    6.121072] davinci-mcasp 48468000.mcasp: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
> > [    6.130790] ------------[ cut here ]------------
> > [    6.135643] WARNING: CPU: 0 PID: 244 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x220/0x34c()
> > [    6.145576] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access
> > ...
> > 
> > This is the followup series for the hwmod changes needed to get audio working
> > on DRA7xx family based boards.
> > The DTS patches has been applied by Tony from the original series:
> > http://www.spinics.net/lists/linux-omap/msg121473.html
> > 
> > I have addressed your comments in the hwmod data and did some research also
> > regarding to the use of ahclkx as fclk in the original submission.
> > It turned out that McASP _needs_ all clocks to be enabled (fclk, iclk and
> > ahclkx/r) to be able to access registers. The original patch where we handled
> > the ahclkx as fclk worked, because the fclk clock got enabled in the HW w/o
> > any SW interaction.
> > All in all, the McASP found in DRA7 needs all clocks to be enabled.
> > To satisfy this I have introduced a new flag to hwmod, which means that the
> > listed optional clocks need to be handled alongside with the fclk clock.
> 
> Thanks.  I'm happy with your series and appreciate the indepth 
> investigation.  As you probably saw last week, we've hit the limit for 
> v4.4-rc1:
> 
> http://marc.info/?l=linux-omap&m=144564929721826&w=2
> 
> This is why I haven't done anything with this series at this time.  
> Unfortunately I don't have a DRA7xx board, so I can't do any testing.  
> But if this series fixes a problem with DRA7xx in linux-next, we should 
> definitely merge it.
> 
> Tony, if you want to take this now, you can either take it with my ack, or 
> I can send a pull request.  Or, if you'd prefer to take it for v4.4-rc2, 
> I can send a pull request after v4.4-rc1.

OK I'll add your ack to the hwmod patches and apply all theree patches into
omap-for-v4.4/fixes as it fixes the splat on beagle x15 Felipe reported.

Regards,

Tony

[PATCH v3 0/3] ARM: OMAP2+ McASP(3) support for DRA7xx family

[Felipe Balbi]

Hi,

Peter Ujfalusi <peter.ujfalusi@ti.com> writes:
> Hi Paul, Tony,
>
> Changes since v2:
> - DTS patch added which is needed because of the clock handling changes
>
> Felip Balbi reported that linux-next is broken right now since the DTS part of
> the earlier series has been applied, but we do not have the mcasp hwmod in the
> kernel:
> ...
> [    0.181029] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'
> ...
> [    6.121072] davinci-mcasp 48468000.mcasp: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
> [    6.130790] ------------[ cut here ]------------
> [    6.135643] WARNING: CPU: 0 PID: 244 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x220/0x34c()
> [    6.145576] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access
> ...
>
> This is the followup series for the hwmod changes needed to get audio working
> on DRA7xx family based boards.
> The DTS patches has been applied by Tony from the original series:
> http://www.spinics.net/lists/linux-omap/msg121473.html
>
> I have addressed your comments in the hwmod data and did some research also
> regarding to the use of ahclkx as fclk in the original submission.
> It turned out that McASP _needs_ all clocks to be enabled (fclk, iclk and
> ahclkx/r) to be able to access registers. The original patch where we handled
> the ahclkx as fclk worked, because the fclk clock got enabled in the HW w/o
> any SW interaction.
> All in all, the McASP found in DRA7 needs all clocks to be enabled.
> To satisfy this I have introduced a new flag to hwmod, which means that the
> listed optional clocks need to be handled alongside with the fclk clock.
>
> Regards,
> Peter
> ---
> Peter Ujfalusi (3):
>   ARM: DTS: dra7: Fix McASP3 node regarding to clocks
>   ARM: OMAP2+: hwmod: Add hwmod flag for HWMOD_OPT_CLKS_NEEDED
>   ARM: OMAP: DRA7: hwmod: Add data for McASP3

I have tested these patches with today's HEAD + rtc 1307 fix. Boots fine
and I can't see the splat I was seeing with beagle x15.

Tested-by: Felipe Balbi <balbi@ti.com>

logs: http://hastebin.com/ololizojat

-- 
balbi
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