[PATCH v10 1/4] dt-binding:Documents of the mbigen bindings

Marc Zyngier
2015-12-18T11:26:51Z

On 18/12/15 10:58, Mark Rutland wrote:
> On Fri, Dec 18, 2015 at 09:58:20AM +0800, majun (F) wrote:
>> Hi Mark:
>>
>> ? 2015/12/17 21:52, Mark Rutland ??:
>>> On Thu, Dec 17, 2015 at 07:56:34PM +0800, MaJun wrote:
>>>> From: Ma Jun <majun258@huawei.com>
>> [...]
>>>> +- compatible: Should be "hisilicon,mbigen-v2"
>>>> +
>>>> +- reg: Specifies the base physical address and size of the Mbigen
>>>> + registers.
>>>> +
>>>> +- interrupt controller: Identifies the node as an interrupt controller
>>>> +
>>>> +- msi-parent: Specifies the MSI controller this mbigen use.
>>>> + For more detail information,please refer to the generic msi-parent binding in
>>>> + Documentation/devicetree/bindings/interrupt-controller/msi.txt.
>>>> +
>>>> +- num-msis:Specifies the total number of interrupt this device has.
>>>
>>> Is this the number of pins implemented? Or the number of pins that are
>>> in use?
>>>
>>> The latter feels like something we can derive.
>>
>> num-msis means the total number of pins implemented.
>
> Ok. In that case I think it should be:
>
> - num-pins: the total number of pins implemented in this Mbigen
> instance.
>
> (with the appropriate fixups in the driver).
>
> With that:
>
> Acked-by: Mark Rutland <mark.rutland@arm.com>
>
>>>> +- #interrupt-cells : Specifies the number of cells needed to encode an
>>>> + interrupt source. The value must be 2.
>>>> +
>>>> + The 1st cell is hardware pin number of the interrupt.This number is local to
>>>> + each mbigen chip and in the range from 0 to the maximum interrupts number
>>>> + of the mbigen.
>>>
>>> Just to check: 0 - 63 represent the "reserved" pins, yes?
>>
>> Yes, you are right.
>>
>>>
>>> Other than those questions, this looks good to me.
>>
>> Do i need to post a new patch to update these two questions?
>
> Hopefully not.
>
> Marc, are you happy to fold in the s/num-msis/num-pins/ change?

Sure, I'll update the whole thing while merging it.

Thanks,

M.
--
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