linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: drjones@redhat.com (Andrew Jones)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device
Date: Mon, 11 Jan 2016 17:44:09 +0100	[thread overview]
Message-ID: <20160111164409.GH3924@hawk.localdomain> (raw)
In-Reply-To: <CAFEAcA_=7nJz3Wh8py9OaSM_t0eFUcCUcb23-W2cDi-M65ZPYA@mail.gmail.com>

On Mon, Jan 11, 2016 at 04:29:03PM +0000, Peter Maydell wrote:
> On 11 January 2016 at 16:21, Andrew Jones <drjones@redhat.com> wrote:
> > On Mon, Jan 11, 2016 at 05:09:27PM +0100, Andrew Jones wrote:
> >> On Mon, Jan 11, 2016 at 04:09:29PM +0100, Christoffer Dall wrote:
> >> > Are vcpu ids already exposed to userspace (beyond the stupid
> >> > KVM_IRQ_LINE) ioctl and as such we're bound to whatever upper limit and
> >> > format they have?
> >>
> >> The only other place I found is KVM_CREATE_VCPU. I suppose we could move
> >> to MPIDR for that, and it would be a nice way to handle the "userspace
> >> determines MPIDR" work that I plan to do. Both KVM and its userspaces
> >> would still use some counter-based vcpu identifiers internally, to avoid
> >> large, sparse structures, but I guess the advantage is that they don't
> >> have to agree on how they do that. The 'vcpu id' used by KVM_CREATE_VCPU
> >> is already 32-bits, and is supposed to be an arbitrary identifier. That
> >> all looks good for converting to MPIDR.
> >>
> >
> > Correction. I understand that vcpu-id is "supposed" to be an arbitrary
> > identifier now, but it doesn't appear that all the assumptions that it's
> > a counter are gone yet... virt/kvm/kvm_main.c has
> >
> > static int kvm_vm_ioctl_create_vcpu(struct kvm *kvm, u32 id)
> > ...
> >         if (id >= KVM_MAX_VCPUS)
> >                 return -EINVAL;
> 
> I think the last time we talked about supporting "userspace
> determines MPIDR" the idea was to do it by allowing userspace to
> write to the MPIDR register with KVM_SET_ONE_REG. So you'd
> create a bunch of CPUs with vcpu-ids as usual, and then the
> MPIDRs would be set for them later as appropriate (or not
> at all, if userspace was an older qemu).

Yup, I recall that. I'm just expanding this discussion into that one.
If we wanted to single vcpu identifier type, and we wanted it to be
MPIDR, then I guess we'd want to pass it in to KVM_CREATE_VCPU too, at
which point we no longer need to set it later with KVM_SET_ONE_REG.

Thanks,
drew

  reply	other threads:[~2016-01-11 16:44 UTC|newest]

Thread overview: 83+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-22  8:07 [PATCH v8 00/20] KVM: ARM64: Add guest PMU support Shannon Zhao
2015-12-22  8:07 ` [PATCH v8 01/20] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2016-01-07 10:20   ` Marc Zyngier
2015-12-22  8:07 ` [PATCH v8 02/20] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2016-01-07 10:21   ` Marc Zyngier
2016-01-07 19:07   ` Andrew Jones
2015-12-22  8:07 ` [PATCH v8 03/20] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2016-01-07 10:23   ` Marc Zyngier
2015-12-22  8:07 ` [PATCH v8 04/20] KVM: ARM64: Add access handler for PMCR register Shannon Zhao
2016-01-07 10:43   ` Marc Zyngier
2016-01-07 11:16     ` Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 05/20] KVM: ARM64: Add access handler for PMSELR register Shannon Zhao
2016-01-07 10:43   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 06/20] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register Shannon Zhao
2016-01-07 10:44   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 07/20] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2016-01-07 10:55   ` Marc Zyngier
2016-01-07 13:48   ` Marc Zyngier
2016-01-07 14:00     ` Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 08/20] KVM: ARM64: Add access handler for event typer register Shannon Zhao
2016-01-07 11:03   ` Marc Zyngier
2016-01-07 11:11     ` Shannon Zhao
2016-01-07 12:36     ` Shannon Zhao
2016-01-07 13:15       ` Marc Zyngier
2016-01-07 12:09   ` Shannon Zhao
2016-01-07 13:01     ` Marc Zyngier
2016-01-07 19:17   ` Andrew Jones
2015-12-22  8:08 ` [PATCH v8 09/20] KVM: ARM64: Add access handler for event counter register Shannon Zhao
2016-01-07 11:06   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 10/20] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2016-01-07 11:09   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 11/20] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register Shannon Zhao
2016-01-07 11:13   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 12/20] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register Shannon Zhao
2016-01-07 11:14   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 13/20] KVM: ARM64: Add access handler for PMSWINC register Shannon Zhao
2016-01-07 11:29   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 14/20] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2016-01-07 11:59   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 15/20] KVM: ARM64: Add a helper to forward trap to guest EL1 Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 16/20] KVM: ARM64: Add access handler for PMUSERENR register Shannon Zhao
2016-01-07 10:14   ` Marc Zyngier
2016-01-07 11:15     ` Shannon Zhao
2015-12-22  8:08 ` [PATCH v8 17/20] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2016-01-07 13:28   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 18/20] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2016-01-07 13:39   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 19/20] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2016-01-07 13:51   ` Marc Zyngier
2015-12-22  8:08 ` [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao
2016-01-07 13:56   ` Marc Zyngier
2016-01-07 14:35     ` Shannon Zhao
2016-01-07 14:36   ` Peter Maydell
2016-01-07 14:49     ` Shannon Zhao
2016-01-07 14:56       ` Peter Maydell
2016-01-07 20:36         ` Andrew Jones
2016-01-09 12:29           ` Christoffer Dall
2016-01-09 15:03             ` Marc Zyngier
2016-01-11  8:45               ` Shannon Zhao
2016-01-11  8:59                 ` Marc Zyngier
2016-01-11 11:52                   ` Andrew Jones
2016-01-11 12:03                     ` Shannon Zhao
2016-01-11 14:07               ` Andrew Jones
2016-01-11 15:09                 ` Christoffer Dall
2016-01-11 16:09                   ` Andrew Jones
2016-01-11 16:13                     ` Peter Maydell
2016-01-11 16:48                       ` Andrew Jones
2016-01-11 16:21                     ` Andrew Jones
2016-01-11 16:29                       ` Peter Maydell
2016-01-11 16:44                         ` Andrew Jones [this message]
2016-01-08  3:06         ` Shannon Zhao
2016-01-08 10:24           ` Peter Maydell
2016-01-08 12:15             ` Shannon Zhao
2016-01-08 12:56               ` Peter Maydell
2016-01-08 13:31                 ` Shannon Zhao
2016-01-07 20:18   ` Andrew Jones
2016-01-08  2:53     ` Shannon Zhao
2016-01-08 11:22       ` Andrew Jones
2016-01-08 15:20         ` Andrew Jones
2016-01-08 15:59           ` Andrew Jones
2016-01-07 14:10 ` [PATCH v8 00/20] KVM: ARM64: Add guest PMU support Marc Zyngier
2016-01-07 14:12   ` Will Deacon
2016-01-07 14:21     ` Marc Zyngier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20160111164409.GH3924@hawk.localdomain \
    --to=drjones@redhat.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).