From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC 10/15] ARM: dts: sun8i: Include SDC2_RST pin in mmc2_8bit_pins
Date: Sun, 24 Jan 2016 17:58:23 +0100 [thread overview]
Message-ID: <20160124165823.GC7908@lukather> (raw)
In-Reply-To: <1453354002-28366-11-git-send-email-wens@csie.org>
On Thu, Jan 21, 2016 at 01:26:37PM +0800, Chen-Yu Tsai wrote:
> mmc2_8bit_pins is used with eMMC chips, which also have a reset pin.
> The MMC controller also has a reset output that is supported.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20160124/505e82d9/attachment.sig>
next prev parent reply other threads:[~2016-01-24 16:58 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-21 5:26 [PATCH RFC 00/15] mmc: sunxi: Support vqmmc regulator and eMMC DDR modes Chen-Yu Tsai
2016-01-21 5:26 ` [PATCH RFC 01/15] mmc: sunxi: Document host init sequence Chen-Yu Tsai
2016-01-29 11:39 ` Ulf Hansson
2016-01-21 5:26 ` [PATCH RFC 02/15] mmc: sunxi: Return error on mmc_regulator_set_ocr() fail in .set_ios op Chen-Yu Tsai
2016-01-29 11:40 ` Ulf Hansson
2016-01-21 5:26 ` [PATCH RFC 03/15] mmc: sunxi: Block signal voltage switching (CMD11) Chen-Yu Tsai
2016-01-29 10:42 ` Ulf Hansson
2016-01-29 14:44 ` Chen-Yu Tsai
2016-01-21 5:26 ` [PATCH RFC 04/15] mmc: sunxi: Support vqmmc regulator Chen-Yu Tsai
2016-01-29 11:40 ` Ulf Hansson
2016-01-21 5:26 ` [PATCH RFC 05/15] mmc: sunxi: Support MMC_DDR52 timing modes Chen-Yu Tsai
2016-01-21 11:14 ` Hans de Goede
2016-01-21 11:55 ` Chen-Yu Tsai
2016-01-21 12:26 ` Hans de Goede
2016-01-21 5:26 ` [PATCH RFC 06/15] mmc: sunxi: Support 8 bit eMMC DDR transfer modes Chen-Yu Tsai
2016-01-21 5:26 ` [PATCH RFC 07/15] mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support Chen-Yu Tsai
2016-01-21 5:26 ` [PATCH RFC 08/15] ARM: dts: sun6i: Add mmc3 pins for 8 bit emmc Chen-Yu Tsai
2016-01-22 20:31 ` Maxime Ripard
2016-01-23 11:04 ` Chen-Yu Tsai
2016-01-24 16:54 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 09/15] ARM: dts: sun6i: sina31s: Switch to mmc3 for onboard eMMC Chen-Yu Tsai
2016-01-21 11:16 ` Hans de Goede
2016-01-21 12:23 ` Chen-Yu Tsai
2016-01-21 12:25 ` Hans de Goede
2016-01-21 12:28 ` Chen-Yu Tsai
2016-01-21 12:38 ` Hans de Goede
2016-01-22 20:39 ` Maxime Ripard
2016-01-23 4:21 ` Chen-Yu Tsai
2016-01-24 16:56 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 10/15] ARM: dts: sun8i: Include SDC2_RST pin in mmc2_8bit_pins Chen-Yu Tsai
2016-01-24 16:58 ` Maxime Ripard [this message]
2016-01-21 5:26 ` [PATCH RFC 11/15] ARM: dts: sun8i: sina33: Enable hardware reset and HS-DDR for eMMC Chen-Yu Tsai
2016-01-22 20:42 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 12/15] ARM: dts: sun9i: Use sun9i specific mmc compatible Chen-Yu Tsai
2016-01-22 20:44 ` Maxime Ripard
2016-01-23 10:50 ` Chen-Yu Tsai
2016-01-21 5:26 ` [PATCH RFC 13/15] ARM: dts: sun9i: Include SDC2_RST pin in mmc2_8bit_pins Chen-Yu Tsai
2016-01-24 16:58 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 14/15] ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC Chen-Yu Tsai
2016-01-24 16:59 ` Maxime Ripard
2016-01-21 5:26 ` [PATCH RFC 15/15] ARM: dts: sun9i: cubieboard4: " Chen-Yu Tsai
2016-01-24 16:59 ` Maxime Ripard
2016-01-21 11:19 ` [PATCH RFC 00/15] mmc: sunxi: Support vqmmc regulator and eMMC DDR modes Hans de Goede
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160124165823.GC7908@lukather \
--to=maxime.ripard@free-electrons.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).