* [PATCH 1/8] arm64: dts: r8a7795: Complete SYS-DMAC nodes
2016-02-04 14:29 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Simon Horman
@ 2016-02-04 14:29 ` Simon Horman
2016-02-04 14:29 ` [PATCH 2/8] arm64: dts: r8a7795: Add USB3.0 host device nodes Simon Horman
` (7 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2016-02-04 14:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Complete the dma-controller nodes for SYS-DMAC 0 to 2.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 93 ++++++++++++++++++++++++++++++--
1 file changed, 90 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index bb353cde1253..221a8f5d24af 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -333,15 +333,102 @@
};
dmac0: dma-controller at e6700000 {
- /* Empty node for now */
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xe6700000 0 0x10000>;
+ interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 219>;
+ clock-names = "fck";
+ power-domains = <&cpg>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
};
dmac1: dma-controller at e7300000 {
- /* Empty node for now */
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7300000 0 0x10000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
+ power-domains = <&cpg>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
};
dmac2: dma-controller at e7310000 {
- /* Empty node for now */
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7310000 0 0x10000>;
+ interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 217>;
+ clock-names = "fck";
+ power-domains = <&cpg>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
};
avb: ethernet at e6800000 {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 2/8] arm64: dts: r8a7795: Add USB3.0 host device nodes
2016-02-04 14:29 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Simon Horman
2016-02-04 14:29 ` [PATCH 1/8] arm64: dts: r8a7795: Complete SYS-DMAC nodes Simon Horman
@ 2016-02-04 14:29 ` Simon Horman
2016-02-04 14:29 ` [PATCH 3/8] arm64: dts: salvator-x: enable usb3.0 host channel 0 Simon Horman
` (6 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2016-02-04 14:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 221a8f5d24af..119549e6502d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -862,5 +862,23 @@
clocks = <&cpg CPG_MOD 815>;
status = "disabled";
};
+
+ xhci0: usb at ee000000 {
+ compatible = "renesas,xhci-r8a7795";
+ reg = <0 0xee000000 0 0xc00>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ xhci1: usb at ee0400000 {
+ compatible = "renesas,xhci-r8a7795";
+ reg = <0 0xee040000 0 0xc00>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 327>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 3/8] arm64: dts: salvator-x: enable usb3.0 host channel 0
2016-02-04 14:29 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Simon Horman
2016-02-04 14:29 ` [PATCH 1/8] arm64: dts: r8a7795: Complete SYS-DMAC nodes Simon Horman
2016-02-04 14:29 ` [PATCH 2/8] arm64: dts: r8a7795: Add USB3.0 host device nodes Simon Horman
@ 2016-02-04 14:29 ` Simon Horman
2016-02-04 14:29 ` [PATCH 4/8] arm64: dts: r8a7795: Add USB-DMAC device nodes Simon Horman
` (5 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2016-02-04 14:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 265d12ff6022..9af1e3fdc468 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -249,3 +249,7 @@
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
};
};
+
+&xhci0 {
+ status = "okay";
+};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 4/8] arm64: dts: r8a7795: Add USB-DMAC device nodes
2016-02-04 14:29 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Simon Horman
` (2 preceding siblings ...)
2016-02-04 14:29 ` [PATCH 3/8] arm64: dts: salvator-x: enable usb3.0 host channel 0 Simon Horman
@ 2016-02-04 14:29 ` Simon Horman
2016-02-04 14:29 ` [PATCH 5/8] arm64: dts: r8a7795: Add SCIF fallback compatibility strings Simon Horman
` (4 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2016-02-04 14:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 119549e6502d..95967b72db35 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -880,5 +880,31 @@
power-domains = <&cpg>;
status = "disabled";
};
+
+ usb_dmac0: dma-controller at e65a0000 {
+ compatible = "renesas,r8a7795-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&cpg>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ usb_dmac1: dma-controller at e65b0000 {
+ compatible = "renesas,r8a7795-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&cpg>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 5/8] arm64: dts: r8a7795: Add SCIF fallback compatibility strings
2016-02-04 14:29 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Simon Horman
` (3 preceding siblings ...)
2016-02-04 14:29 ` [PATCH 4/8] arm64: dts: r8a7795: Add USB-DMAC device nodes Simon Horman
@ 2016-02-04 14:29 ` Simon Horman
2016-02-04 14:29 ` [PATCH 6/8] arm64: dts: r8a7795: Rename the serial port clock to fck Simon Horman
` (3 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2016-02-04 14:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 38 +++++++++++++++++++++++---------
1 file changed, 27 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 95967b72db35..013df449fc30 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -474,7 +474,9 @@
};
hscif0: serial at e6540000 {
- compatible = "renesas,hscif-r8a7795", "renesas,hscif";
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
reg = <0 0xe6540000 0 96>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 520>;
@@ -486,7 +488,9 @@
};
hscif1: serial at e6550000 {
- compatible = "renesas,hscif-r8a7795", "renesas,hscif";
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
reg = <0 0xe6550000 0 96>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 519>;
@@ -498,7 +502,9 @@
};
hscif2: serial at e6560000 {
- compatible = "renesas,hscif-r8a7795", "renesas,hscif";
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
reg = <0 0xe6560000 0 96>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 518>;
@@ -510,7 +516,9 @@
};
hscif3: serial at e66a0000 {
- compatible = "renesas,hscif-r8a7795", "renesas,hscif";
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
reg = <0 0xe66a0000 0 96>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 517>;
@@ -522,7 +530,9 @@
};
hscif4: serial at e66b0000 {
- compatible = "renesas,hscif-r8a7795", "renesas,hscif";
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
reg = <0 0xe66b0000 0 96>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 516>;
@@ -534,7 +544,8 @@
};
scif0: serial at e6e60000 {
- compatible = "renesas,scif-r8a7795", "renesas,scif";
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 207>;
@@ -546,7 +557,8 @@
};
scif1: serial at e6e68000 {
- compatible = "renesas,scif-r8a7795", "renesas,scif";
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>;
@@ -558,7 +570,8 @@
};
scif2: serial at e6e88000 {
- compatible = "renesas,scif-r8a7795", "renesas,scif";
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e88000 0 64>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 310>;
@@ -570,7 +583,8 @@
};
scif3: serial at e6c50000 {
- compatible = "renesas,scif-r8a7795", "renesas,scif";
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 204>;
@@ -582,7 +596,8 @@
};
scif4: serial at e6c40000 {
- compatible = "renesas,scif-r8a7795", "renesas,scif";
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 203>;
@@ -594,7 +609,8 @@
};
scif5: serial at e6f30000 {
- compatible = "renesas,scif-r8a7795", "renesas,scif";
+ compatible = "renesas,scif-r8a7795",
+ "renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6f30000 0 64>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 202>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 6/8] arm64: dts: r8a7795: Rename the serial port clock to fck
2016-02-04 14:29 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Simon Horman
` (4 preceding siblings ...)
2016-02-04 14:29 ` [PATCH 5/8] arm64: dts: r8a7795: Add SCIF fallback compatibility strings Simon Horman
@ 2016-02-04 14:29 ` Simon Horman
2016-02-04 14:29 ` [PATCH 7/8] arm64: dts: r8a7795: Add BRG support for (H)SCIF Simon Horman
` (2 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2016-02-04 14:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 013df449fc30..ddeec7d7b6eb 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -480,7 +480,7 @@
reg = <0 0xe6540000 0 96>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 520>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac1 0x31>, <&dmac1 0x30>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -494,7 +494,7 @@
reg = <0 0xe6550000 0 96>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 519>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac1 0x33>, <&dmac1 0x32>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -508,7 +508,7 @@
reg = <0 0xe6560000 0 96>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 518>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac1 0x35>, <&dmac1 0x34>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -522,7 +522,7 @@
reg = <0 0xe66a0000 0 96>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 517>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac0 0x37>, <&dmac0 0x36>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -536,7 +536,7 @@
reg = <0 0xe66b0000 0 96>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 516>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac0 0x39>, <&dmac0 0x38>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -549,7 +549,7 @@
reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 207>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac1 0x51>, <&dmac1 0x50>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -562,7 +562,7 @@
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac1 0x53>, <&dmac1 0x52>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -575,7 +575,7 @@
reg = <0 0xe6e88000 0 64>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 310>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac1 0x13>, <&dmac1 0x12>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -588,7 +588,7 @@
reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 204>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac0 0x57>, <&dmac0 0x56>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -601,7 +601,7 @@
reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 203>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac0 0x59>, <&dmac0 0x58>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -614,7 +614,7 @@
reg = <0 0xe6f30000 0 64>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 202>;
- clock-names = "sci_ick";
+ clock-names = "fck";
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 7/8] arm64: dts: r8a7795: Add BRG support for (H)SCIF
2016-02-04 14:29 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Simon Horman
` (5 preceding siblings ...)
2016-02-04 14:29 ` [PATCH 6/8] arm64: dts: r8a7795: Rename the serial port clock to fck Simon Horman
@ 2016-02-04 14:29 ` Simon Horman
2016-02-04 14:29 ` [PATCH 8/8] arm64: dts: salvator-x: Enable SCIF_CLK frequency and pins Simon Horman
2016-02-08 21:41 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Olof Johansson
8 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2016-02-04 14:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depend on
the actual board.
Add the two optional clock sources (S3D1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and HSCIF device nodes.
This increases the range and accuracy of supported baud rates on
(H)SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 74 ++++++++++++++++++++++----------
1 file changed, 52 insertions(+), 22 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index ddeec7d7b6eb..9634e3a4858e 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -99,6 +99,14 @@
clock-frequency = <0>;
};
+ /* External SCIF clock - to be overridden by boards that provide it */
+ scif_clk: scif {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ status = "disabled";
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -479,8 +487,10 @@
"renesas,hscif";
reg = <0 0xe6540000 0 96>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 520>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 520>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x31>, <&dmac1 0x30>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -493,8 +503,10 @@
"renesas,hscif";
reg = <0 0xe6550000 0 96>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 519>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 519>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x33>, <&dmac1 0x32>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -507,8 +519,10 @@
"renesas,hscif";
reg = <0 0xe6560000 0 96>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 518>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 518>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x35>, <&dmac1 0x34>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -521,8 +535,10 @@
"renesas,hscif";
reg = <0 0xe66a0000 0 96>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 517>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 517>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x37>, <&dmac0 0x36>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -535,8 +551,10 @@
"renesas,hscif";
reg = <0 0xe66b0000 0 96>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 516>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 516>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x38>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -548,8 +566,10 @@
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 207>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x51>, <&dmac1 0x50>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -561,8 +581,10 @@
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 206>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x53>, <&dmac1 0x52>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -574,8 +596,10 @@
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6e88000 0 64>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 310>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 310>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x13>, <&dmac1 0x12>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -587,8 +611,10 @@
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 204>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x57>, <&dmac0 0x56>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -600,8 +626,10 @@
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 203>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x59>, <&dmac0 0x58>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
@@ -613,8 +641,10 @@
"renesas,rcar-gen3-scif", "renesas,scif";
reg = <0 0xe6f30000 0 64>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>;
- clock-names = "fck";
+ clocks = <&cpg CPG_MOD 202>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
dma-names = "tx", "rx";
power-domains = <&cpg>;
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 8/8] arm64: dts: salvator-x: Enable SCIF_CLK frequency and pins
2016-02-04 14:29 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Simon Horman
` (6 preceding siblings ...)
2016-02-04 14:29 ` [PATCH 7/8] arm64: dts: r8a7795: Add BRG support for (H)SCIF Simon Horman
@ 2016-02-04 14:29 ` Simon Horman
2016-02-08 21:41 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Olof Johansson
8 siblings, 0 replies; 10+ messages in thread
From: Simon Horman @ 2016-02-04 14:29 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates:
- SCIF:
- Supports now 50, 230400, 460800, 500000, and 921600 bps,
- Perfect match for standard 50-460800, and 9216000 bps.
- HSCIF:
- Supports now 50, 75, and 110 bps,
- Perfect match for standard 50-460800, and 9216000 bps.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 9af1e3fdc468..31ace9c1f79d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -93,6 +93,9 @@
};
&pfc {
+ pinctrl-0 = <&scif_clk_pins>;
+ pinctrl-names = "default";
+
scif1_pins: scif1 {
renesas,groups = "scif1_data_a", "scif1_ctrl";
renesas,function = "scif1";
@@ -101,6 +104,10 @@
renesas,groups = "scif2_data_a";
renesas,function = "scif2";
};
+ scif_clk_pins: scif_clk {
+ renesas,groups = "scif_clk_a";
+ renesas,function = "scif_clk";
+ };
i2c2_pins: i2c2 {
renesas,groups = "i2c2_a";
@@ -138,6 +145,11 @@
status = "okay";
};
+&scif_clk {
+ clock-frequency = <14745600>;
+ status = "okay";
+};
+
&i2c2 {
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 10+ messages in thread* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6
2016-02-04 14:29 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.6 Simon Horman
` (7 preceding siblings ...)
2016-02-04 14:29 ` [PATCH 8/8] arm64: dts: salvator-x: Enable SCIF_CLK frequency and pins Simon Horman
@ 2016-02-08 21:41 ` Olof Johansson
8 siblings, 0 replies; 10+ messages in thread
From: Olof Johansson @ 2016-02-08 21:41 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Feb 04, 2016 at 03:29:44PM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM64 based SoC DT updates for v4.6.
>
>
> The following changes since commit 92e963f50fc74041b5e9e744c330dca48e04f08d:
>
> Linux 4.5-rc1 (2016-01-24 13:06:47 -0800)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-for-v4.6
>
> for you to fetch changes up to a3fc85e27b7e3c29b30909929bc64737a19fd251:
>
> arm64: dts: salvator-x: Enable SCIF_CLK frequency and pins (2016-02-03 10:04:33 +0100)
Thanks, merged into next/dt64.
-Olof
^ permalink raw reply [flat|nested] 10+ messages in thread