From: jan.glauber@caviumnetworks.com (Jan Glauber)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 3/5] arm64: dts: Add Cavium ThunderX specific PMU
Date: Mon, 22 Feb 2016 13:40:34 +0100 [thread overview]
Message-ID: <20160222124034.GA766@hardcore> (raw)
In-Reply-To: <20160218173248.GD16883@arm.com>
On Thu, Feb 18, 2016 at 05:32:48PM +0000, Will Deacon wrote:
> On Thu, Feb 18, 2016 at 05:50:12PM +0100, Jan Glauber wrote:
> > Add a compatible string for the Cavium ThunderX PMU.
>
> Stupid question, but is "thunder" the name of the CPU or the SoC or ...?
>
> Whatever we use to describe the PMU, should probably also identify the
> CPU uniquely.
The CPU is currently:
compatible = "cavium,thunder", "arm,armv8";
We clearly need better names in case of a subsequent CPU, but for now
I think we should stick to the existing name.
Jan
> Will
>
> > Signed-off-by: Jan Glauber <jglauber@cavium.com>
> > ---
> > Documentation/devicetree/bindings/arm/pmu.txt | 1 +
> > arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 5 +++++
> > 2 files changed, 6 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/arm/pmu.txt b/Documentation/devicetree/bindings/arm/pmu.txt
> > index 5651883..d3999a1 100644
> > --- a/Documentation/devicetree/bindings/arm/pmu.txt
> > +++ b/Documentation/devicetree/bindings/arm/pmu.txt
> > @@ -25,6 +25,7 @@ Required properties:
> > "qcom,scorpion-pmu"
> > "qcom,scorpion-mp-pmu"
> > "qcom,krait-pmu"
> > + "cavium,thunder-pmu"
> > - interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
> > interrupt (PPI) then 1 interrupt should be specified.
> >
> > diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > index 9cb7cf9..2eb9b22 100644
> > --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
> > @@ -360,6 +360,11 @@
> > <1 10 0xff01>;
> > };
> >
> > + pmu {
> > + compatible = "cavium,thunder-pmu", "arm,armv8-pmuv3";
> > + interrupts = <1 7 4>;
> > + };
> > +
> > soc {
> > compatible = "simple-bus";
> > #address-cells = <2>;
> > --
> > 1.9.1
> >
next prev parent reply other threads:[~2016-02-22 12:40 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-18 16:50 [PATCH v4 0/5] Cavium ThunderX PMU support Jan Glauber
2016-02-18 16:50 ` [PATCH v4 1/5] arm64/perf: Rename Cortex A57 events Jan Glauber
2016-02-18 16:50 ` [PATCH v4 2/5] arm64/perf: Add Cavium ThunderX PMU support Jan Glauber
2016-02-18 16:50 ` [PATCH v4 3/5] arm64: dts: Add Cavium ThunderX specific PMU Jan Glauber
2016-02-18 17:32 ` Will Deacon
2016-02-18 18:37 ` David Daney
2016-02-22 12:40 ` Jan Glauber [this message]
2016-02-18 16:50 ` [PATCH v4 4/5] arm64/perf: Enable PMCR long cycle counter bit Jan Glauber
2016-02-18 17:34 ` Will Deacon
2016-02-18 18:28 ` Jan Glauber
2016-02-18 18:57 ` David Daney
2016-02-22 12:45 ` Jan Glauber
2016-02-22 13:41 ` Will Deacon
2016-02-29 15:39 ` Will Deacon
2016-03-01 7:21 ` Jan Glauber
2016-03-01 15:10 ` Jan Glauber
2016-02-18 16:50 ` [PATCH v4 5/5] arm64/perf: Extend event mask for ARMv8.1 Jan Glauber
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