[PATCH 0/9] ARM: uniphier: UniPhier updates for Linux 4.6-rc1

[PATCH 0/9] ARM: uniphier: UniPhier updates for Linux 4.6-rc1

[Masahiro Yamada]

Hi Arnd and Olof,

Here is a series I want you to apply to ASOC.

I know this series includes DT updates for ARM 32bit and ARM 64bit,
but this is intentional.

Please apply the whole series to one branch.
Otherwise, it would cause a build error and big conflicts.
(some DT files are shared between arch/arm and arch/arm64,
so it is impossible to split the series into two.)



Masahiro Yamada (9):
  ARM: dts: uniphier: factor out ranges property of support card
  ARM: dts: uniphier: rework UniPhier System Bus nodes
  ARM: uniphier: add missing of_node_put()
  ARM: dts: uniphier: add reference clock nodes
  ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board
  ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board
  ARM: dts: uniphier: add PH1-Pro4 Ace board support
  ARM: dts: uniphier: add PH1-Pro4 Sanji board support
  ARM: dts: uniphier: add @{address} to EEPROM node

 arch/arm/boot/dts/Makefile                         |   2 +
 arch/arm/boot/dts/uniphier-common32.dtsi           |  26 +++--
 arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts         |   8 --
 arch/arm/boot/dts/uniphier-ph1-ld4.dtsi            |   4 +
 arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts        |   8 --
 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts        | 113 +++++++++++++++++++++
 arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts        |   8 --
 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts      | 108 ++++++++++++++++++++
 arch/arm/boot/dts/uniphier-ph1-pro4.dtsi           |   4 +
 arch/arm/boot/dts/uniphier-ph1-pro5.dtsi           |   4 +
 arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts        |   8 --
 arch/arm/boot/dts/uniphier-ph1-sld3.dtsi           |  25 +++--
 arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts        |   8 --
 arch/arm/boot/dts/uniphier-ph1-sld8.dtsi           |   4 +
 arch/arm/boot/dts/uniphier-proxstream2-gentil.dts  |  10 ++
 arch/arm/boot/dts/uniphier-proxstream2.dtsi        |   4 +
 arch/arm/boot/dts/uniphier-ref-daughter.dtsi       |   2 +-
 arch/arm/boot/dts/uniphier-support-card.dtsi       |   5 +-
 arch/arm/mach-uniphier/platsmp.c                   |  12 +--
 .../boot/dts/socionext/uniphier-ph1-ld10-ref.dts   |   8 --
 .../boot/dts/socionext/uniphier-ph1-ld10.dtsi      |  18 ++--
 21 files changed, 309 insertions(+), 80 deletions(-)
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts

-- 
1.9.1

[PATCH 1/9] ARM: dts: uniphier: factor out ranges property of support card

[Masahiro Yamada]

This property is used in common by several boards.  Move it to the
common place (uniphier-support-card.dtsi).  If necessary, each board
can still override the property.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts              | 8 --------
 arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts             | 8 --------
 arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts             | 8 --------
 arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts             | 8 --------
 arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts             | 8 --------
 arch/arm/boot/dts/uniphier-support-card.dtsi            | 3 +++
 arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts | 8 --------
 7 files changed, 3 insertions(+), 48 deletions(-)

diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
index f1e9d40..ec94b7a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
@@ -72,14 +72,6 @@
 	};
 };
 
-&extbus {
-	ranges = <1 0x00000000 0x42000000 0x02000000>;
-};
-
-&support_card {
-	ranges = <0x00000000 1 0x01f00000 0x00100000>;
-};
-
 &ethsc {
 	interrupts = <0 49 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
index 5baa9fc..b8134c6 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld6b-ref.dts
@@ -74,14 +74,6 @@
 	};
 };
 
-&extbus {
-	ranges = <1 0x00000000 0x42000000 0x02000000>;
-};
-
-&support_card {
-	ranges = <0x00000000 1 0x01f00000 0x00100000>;
-};
-
 &ethsc {
 	interrupts = <0 52 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
index 2462668..95f631a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
@@ -74,14 +74,6 @@
 	};
 };
 
-&extbus {
-	ranges = <1 0x00000000 0x42000000 0x02000000>;
-};
-
-&support_card {
-	ranges = <0x00000000 1 0x01f00000 0x00100000>;
-};
-
 &ethsc {
 	interrupts = <0 50 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
index b7a03215..acb4204 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
@@ -73,14 +73,6 @@
 	};
 };
 
-&extbus {
-	ranges = <1 0x00000000 0x42000000 0x02000000>;
-};
-
-&support_card {
-	ranges = <0x00000000 1 0x01f00000 0x00100000>;
-};
-
 &ethsc {
 	interrupts = <0 49 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
index fc7250c..d594f40 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
@@ -72,14 +72,6 @@
 	};
 };
 
-&extbus {
-	ranges = <1 0x00000000 0x42000000 0x02000000>;
-};
-
-&support_card {
-	ranges = <0x00000000 1 0x01f00000 0x00100000>;
-};
-
 &ethsc {
 	interrupts = <0 48 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-support-card.dtsi b/arch/arm/boot/dts/uniphier-support-card.dtsi
index da271e3..fa807e8 100644
--- a/arch/arm/boot/dts/uniphier-support-card.dtsi
+++ b/arch/arm/boot/dts/uniphier-support-card.dtsi
@@ -43,10 +43,13 @@
  */
 
 &extbus {
+	ranges = <1 0x00000000 0x42000000 0x02000000>;
+
 	support_card: support_card {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
+		ranges = <0x00000000 1 0x01f00000 0x00100000>;
 
 		ethsc: ethernet at 00000000 {
 			compatible = "smsc,lan9118", "smsc,lan9115";
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts
index 3e53317..e5c8a20 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10-ref.dts
@@ -74,14 +74,6 @@
 	};
 };
 
-&extbus {
-	ranges = <1 0x00000000 0x42000000 0x02000000>;
-};
-
-&support_card {
-	ranges = <0x00000000 1 0x01f00000 0x00100000>;
-};
-
 &ethsc {
 	interrupts = <0 48 4>;
 };
-- 
1.9.1

[PATCH 2/9] ARM: dts: uniphier: rework UniPhier System Bus nodes

[Masahiro Yamada]

Tidy up the System Bus nodes in order to make the driver
(drivers/bus/uniphier-system-bus.c) really available.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/boot/dts/uniphier-common32.dtsi             | 19 ++++++++++---------
 arch/arm/boot/dts/uniphier-ph1-sld3.dtsi             | 19 ++++++++++---------
 arch/arm/boot/dts/uniphier-support-card.dtsi         |  2 +-
 arch/arm/mach-uniphier/platsmp.c                     | 11 +++++------
 arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi | 18 ++++++++++++------
 5 files changed, 38 insertions(+), 31 deletions(-)

diff --git a/arch/arm/boot/dts/uniphier-common32.dtsi b/arch/arm/boot/dts/uniphier-common32.dtsi
index ea9301a..ae48d28 100644
--- a/arch/arm/boot/dts/uniphier-common32.dtsi
+++ b/arch/arm/boot/dts/uniphier-common32.dtsi
@@ -52,12 +52,6 @@
 		ranges;
 		interrupt-parent = <&intc>;
 
-		extbus: extbus {
-			compatible = "simple-bus";
-			#address-cells = <2>;
-			#size-cells = <1>;
-		};
-
 		serial0: serial at 54006800 {
 			compatible = "socionext,uniphier-uart";
 			status = "disabled";
@@ -98,9 +92,16 @@
 			clocks = <&uart_clk>;
 		};
 
-		system-bus-controller at 58c00000 {
-			compatible = "socionext,uniphier-system-bus-controller";
-			reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
+		system_bus: system-bus at 58c00000 {
+			compatible = "socionext,uniphier-system-bus";
+			reg = <0x58c00000 0x400>;
+			#address-cells = <2>;
+			#size-cells = <1>;
+		};
+
+		smpctrl at 59800000 {
+			compatible = "socionext,uniphier-smpctrl";
+			reg = <0x59801000 0x400>;
 		};
 
 		timer at 60000200 {
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
index 691a17d..ef94d2e 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
@@ -94,12 +94,6 @@
 		ranges;
 		interrupt-parent = <&intc>;
 
-		extbus: extbus {
-			compatible = "simple-bus";
-			#address-cells = <2>;
-			#size-cells = <1>;
-		};
-
 		timer at 20000200 {
 			compatible = "arm,cortex-a9-global-timer";
 			reg = <0x20000200 0x20>;
@@ -216,9 +210,16 @@
 			clock-frequency = <400000>;
 		};
 
-		system-bus-controller at 58c00000 {
-			compatible = "socionext,uniphier-system-bus-controller";
-			reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
+		system_bus: system-bus at 58c00000 {
+			compatible = "socionext,uniphier-system-bus";
+			reg = <0x58c00000 0x400>;
+			#address-cells = <2>;
+			#size-cells = <1>;
+		};
+
+		smpctrl at 59800000 {
+			compatible = "socionext,uniphier-smpctrl";
+			reg = <0x59801000 0x400>;
 		};
 
 		usb0: usb at 5a800100 {
diff --git a/arch/arm/boot/dts/uniphier-support-card.dtsi b/arch/arm/boot/dts/uniphier-support-card.dtsi
index fa807e8..0d2826a 100644
--- a/arch/arm/boot/dts/uniphier-support-card.dtsi
+++ b/arch/arm/boot/dts/uniphier-support-card.dtsi
@@ -42,7 +42,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-&extbus {
+&system_bus {
 	ranges = <1 0x00000000 0x42000000 0x02000000>;
 
 	support_card: support_card {
diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c
index e1cfc1d..b53a8d9 100644
--- a/arch/arm/mach-uniphier/platsmp.c
+++ b/arch/arm/mach-uniphier/platsmp.c
@@ -30,7 +30,7 @@
  * The secondary CPUs check this register from the boot ROM for the jump
  * destination.  After that, it can be reused as a scratch register.
  */
-#define UNIPHIER_SBC_ROM_BOOT_RSV2	0x1208
+#define UNIPHIER_SMPCTRL_ROM_BOOT_RSV2	0x208
 
 static void __iomem *uniphier_smp_rom_boot_rsv2;
 static unsigned int uniphier_smp_max_cpus;
@@ -98,15 +98,14 @@ static int __init uniphier_smp_prepare_trampoline(unsigned int max_cpus)
 	phys_addr_t rom_rsv2_phys;
 	int ret;
 
-	np = of_find_compatible_node(NULL, NULL,
-				"socionext,uniphier-system-bus-controller");
-	ret = of_address_to_resource(np, 1, &res);
+	np = of_find_compatible_node(NULL, NULL, "socionext,uniphier-smpctrl");
+	ret = of_address_to_resource(np, 0, &res);
 	if (ret) {
-		pr_err("failed to get resource of system-bus-controller\n");
+		pr_err("failed to get resource of uniphier-smpctrl\n");
 		return ret;
 	}
 
-	rom_rsv2_phys = res.start + UNIPHIER_SBC_ROM_BOOT_RSV2;
+	rom_rsv2_phys = res.start + UNIPHIER_SMPCTRL_ROM_BOOT_RSV2;
 
 	ret = uniphier_smp_copy_trampoline(rom_rsv2_phys);
 	if (ret)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi
index 0296af9..84637eb 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld10.dtsi
@@ -133,12 +133,6 @@
 		#size-cells = <1>;
 		ranges = <0 0 0 0xffffffff>;
 
-		extbus: extbus {
-			compatible = "simple-bus";
-			#address-cells = <2>;
-			#size-cells = <1>;
-		};
-
 		serial0: serial at 54006800 {
 			compatible = "socionext,uniphier-uart";
 			status = "disabled";
@@ -261,6 +255,18 @@
 			clock-frequency = <400000>;
 		};
 
+		system_bus: system-bus at 58c00000 {
+			compatible = "socionext,uniphier-system-bus";
+			reg = <0x58c00000 0x400>;
+			#address-cells = <2>;
+			#size-cells = <1>;
+		};
+
+		smpctrl at 59800000 {
+			compatible = "socionext,uniphier-smpctrl";
+			reg = <0x59801000 0x400>;
+		};
+
 		pinctrl: pinctrl at 5f801000 {
 			compatible = "socionext,ph1-ld10-pinctrl", "syscon";
 			reg = <0x5f801000 0xe00>;
-- 
1.9.1

[PATCH 2/9] ARM: dts: uniphier: rework UniPhier System Bus nodes

[Olof Johansson]

Hi,

On Tue, Feb 16, 2016 at 11:15:04AM +0900, Masahiro Yamada wrote:

> diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c
> index e1cfc1d..b53a8d9 100644
> --- a/arch/arm/mach-uniphier/platsmp.c
> +++ b/arch/arm/mach-uniphier/platsmp.c
> @@ -30,7 +30,7 @@
>   * The secondary CPUs check this register from the boot ROM for the jump
>   * destination.  After that, it can be reused as a scratch register.
>   */
> -#define UNIPHIER_SBC_ROM_BOOT_RSV2	0x1208
> +#define UNIPHIER_SMPCTRL_ROM_BOOT_RSV2	0x208
>  
>  static void __iomem *uniphier_smp_rom_boot_rsv2;
>  static unsigned int uniphier_smp_max_cpus;
> @@ -98,15 +98,14 @@ static int __init uniphier_smp_prepare_trampoline(unsigned int max_cpus)
>  	phys_addr_t rom_rsv2_phys;
>  	int ret;
>  
> -	np = of_find_compatible_node(NULL, NULL,
> -				"socionext,uniphier-system-bus-controller");
> -	ret = of_address_to_resource(np, 1, &res);
> +	np = of_find_compatible_node(NULL, NULL, "socionext,uniphier-smpctrl");
> +	ret = of_address_to_resource(np, 0, &res);
>  	if (ret) {
> -		pr_err("failed to get resource of system-bus-controller\n");
> +		pr_err("failed to get resource of uniphier-smpctrl\n");
>  		return ret;
>  	}
>  
> -	rom_rsv2_phys = res.start + UNIPHIER_SBC_ROM_BOOT_RSV2;
> +	rom_rsv2_phys = res.start + UNIPHIER_SMPCTRL_ROM_BOOT_RSV2;
>  
>  	ret = uniphier_smp_copy_trampoline(rom_rsv2_phys);
>  	if (ret)

The previous binding has already been released. You can update, but your driver
should be able to handle the previous binding.

So, you still need to keep the old code around.

This has the benefit of breaking the dependency between the code change and the
DT change, so you no longer have to change your platform code at the same time
as the DT to avoid regressions.


Please adjust and resend. I'll hold off applying the series until then, so we
don't have a partially applied series.


Thanks!

-Olof

[PATCH 2/9] ARM: dts: uniphier: rework UniPhier System Bus nodes

[Masahiro Yamada]

Hi Olof,


2016-02-25 9:26 GMT+09:00 Olof Johansson <olof@lixom.net>:
> Hi,
>
> On Tue, Feb 16, 2016 at 11:15:04AM +0900, Masahiro Yamada wrote:
>
>> diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c
>> index e1cfc1d..b53a8d9 100644
>> --- a/arch/arm/mach-uniphier/platsmp.c
>> +++ b/arch/arm/mach-uniphier/platsmp.c
>> @@ -30,7 +30,7 @@
>>   * The secondary CPUs check this register from the boot ROM for the jump
>>   * destination.  After that, it can be reused as a scratch register.
>>   */
>> -#define UNIPHIER_SBC_ROM_BOOT_RSV2   0x1208
>> +#define UNIPHIER_SMPCTRL_ROM_BOOT_RSV2       0x208
>>
>>  static void __iomem *uniphier_smp_rom_boot_rsv2;
>>  static unsigned int uniphier_smp_max_cpus;
>> @@ -98,15 +98,14 @@ static int __init uniphier_smp_prepare_trampoline(unsigned int max_cpus)
>>       phys_addr_t rom_rsv2_phys;
>>       int ret;
>>
>> -     np = of_find_compatible_node(NULL, NULL,
>> -                             "socionext,uniphier-system-bus-controller");
>> -     ret = of_address_to_resource(np, 1, &res);
>> +     np = of_find_compatible_node(NULL, NULL, "socionext,uniphier-smpctrl");
>> +     ret = of_address_to_resource(np, 0, &res);
>>       if (ret) {
>> -             pr_err("failed to get resource of system-bus-controller\n");
>> +             pr_err("failed to get resource of uniphier-smpctrl\n");
>>               return ret;
>>       }
>>
>> -     rom_rsv2_phys = res.start + UNIPHIER_SBC_ROM_BOOT_RSV2;
>> +     rom_rsv2_phys = res.start + UNIPHIER_SMPCTRL_ROM_BOOT_RSV2;
>>
>>       ret = uniphier_smp_copy_trampoline(rom_rsv2_phys);
>>       if (ret)
>
> The previous binding has already been released. You can update, but your driver
> should be able to handle the previous binding.
>
> So, you still need to keep the old code around.
>
> This has the benefit of breaking the dependency between the code change and the
> DT change, so you no longer have to change your platform code at the same time
> as the DT to avoid regressions.
>
>
> Please adjust and resend. I'll hold off applying the series until then, so we
> don't have a partially applied series.



How long do I have to keep the support for the old binding?


[1]
Everyone makes mistakes.
The constraint for the DT-binding is really really painful.

This is how it happened.

At first, I implemented uniphier-system-bus.c based on the old binding.
Then, during the review, Mark suggested me to change the driver design:
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/387938.html

I followed his suggestion, but I needed to changed the DT-binding as well.
Before that time, the DT and other support code for UniPhier had been
partially merged
in the mainline.  So, in the current tree exist two bindings that are
not compatible to
each other.  This situation is really a mess.
I want to clean up the code as soon as possible.



[2]
For now, DT is mostly developed in the kernel tree in practice,
while DT is not theoretically only for Linux.
Everybody (at least every user of UniPhier SoCs) uses the combination
of a DTB and a kernel image
generated from the same Linux tree.
I see no reason to use a new DTB + an old kernel image, or vice versa.


[3]
This binding is UniPhier-specific.  No impact on other SoC vendors.
Everything is under my control.



For now, I will prepare the logic to support the old binding,
but for the reasons above, please let me drop the support for the old
one some time later.





-- 
Best Regards
Masahiro Yamada

[PATCH 2/9] ARM: dts: uniphier: rework UniPhier System Bus nodes

[Olof Johansson]

On Wed, Feb 24, 2016 at 6:22 PM, Masahiro Yamada
<yamada.masahiro@socionext.com> wrote:
> Hi Olof,
>
>
> 2016-02-25 9:26 GMT+09:00 Olof Johansson <olof@lixom.net>:
>> Hi,
>>
>> On Tue, Feb 16, 2016 at 11:15:04AM +0900, Masahiro Yamada wrote:
>>
>>> diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c
>>> index e1cfc1d..b53a8d9 100644
>>> --- a/arch/arm/mach-uniphier/platsmp.c
>>> +++ b/arch/arm/mach-uniphier/platsmp.c
>>> @@ -30,7 +30,7 @@
>>>   * The secondary CPUs check this register from the boot ROM for the jump
>>>   * destination.  After that, it can be reused as a scratch register.
>>>   */
>>> -#define UNIPHIER_SBC_ROM_BOOT_RSV2   0x1208
>>> +#define UNIPHIER_SMPCTRL_ROM_BOOT_RSV2       0x208
>>>
>>>  static void __iomem *uniphier_smp_rom_boot_rsv2;
>>>  static unsigned int uniphier_smp_max_cpus;
>>> @@ -98,15 +98,14 @@ static int __init uniphier_smp_prepare_trampoline(unsigned int max_cpus)
>>>       phys_addr_t rom_rsv2_phys;
>>>       int ret;
>>>
>>> -     np = of_find_compatible_node(NULL, NULL,
>>> -                             "socionext,uniphier-system-bus-controller");
>>> -     ret = of_address_to_resource(np, 1, &res);
>>> +     np = of_find_compatible_node(NULL, NULL, "socionext,uniphier-smpctrl");
>>> +     ret = of_address_to_resource(np, 0, &res);
>>>       if (ret) {
>>> -             pr_err("failed to get resource of system-bus-controller\n");
>>> +             pr_err("failed to get resource of uniphier-smpctrl\n");
>>>               return ret;
>>>       }
>>>
>>> -     rom_rsv2_phys = res.start + UNIPHIER_SBC_ROM_BOOT_RSV2;
>>> +     rom_rsv2_phys = res.start + UNIPHIER_SMPCTRL_ROM_BOOT_RSV2;
>>>
>>>       ret = uniphier_smp_copy_trampoline(rom_rsv2_phys);
>>>       if (ret)
>>
>> The previous binding has already been released. You can update, but your driver
>> should be able to handle the previous binding.
>>
>> So, you still need to keep the old code around.
>>
>> This has the benefit of breaking the dependency between the code change and the
>> DT change, so you no longer have to change your platform code at the same time
>> as the DT to avoid regressions.
>>
>>
>> Please adjust and resend. I'll hold off applying the series until then, so we
>> don't have a partially applied series.
>
>
>
> How long do I have to keep the support for the old binding?

You know your platform best -- how many users do you think you have
out there that might have built DTS files based on the old binding?

If there's a good chance there are none, or if you're in good contact
with them and can ask them to update, then you can be more flexible.

> [1]
> Everyone makes mistakes.
> The constraint for the DT-binding is really really painful.
>
> This is how it happened.
>
> At first, I implemented uniphier-system-bus.c based on the old binding.
> Then, during the review, Mark suggested me to change the driver design:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/387938.html
>
> I followed his suggestion, but I needed to changed the DT-binding as well.
> Before that time, the DT and other support code for UniPhier had been
> partially merged
> in the mainline.  So, in the current tree exist two bindings that are
> not compatible to
> each other.  This situation is really a mess.
> I want to clean up the code as soon as possible.

Yeah, I understand that it's hard to come up with perfect bindings
from day one, and that's why we sometimes have to play by ear.

It's not a bad idea to get practice on how to solve it -- in this case
it wouldn't really bad that bad. If you use variables to hold the base
addresses, and get them from either binding, you'll only special-case
during probe and not anywhere else in the driver.

The general idea of decoupling DT changes from code changes is also a
good habit.

> [2]
> For now, DT is mostly developed in the kernel tree in practice,
> while DT is not theoretically only for Linux.
> Everybody (at least every user of UniPhier SoCs) uses the combination
> of a DTB and a kernel image
> generated from the same Linux tree.
> I see no reason to use a new DTB + an old kernel image, or vice versa.

We're not aiming to support new DTB + old kernel image. The main
problem is if someone has a product DTB that's not yet merged, and you
change the binding, then their DTB might no longer work. It's not a
huge deal, and for most changes it's fairly harmless, but the general
principle still applies.

As I said earlier, you know the users of your platform the best (I
hope :), so you'll have the best feel for whether this is a breakage
they will hurt from or not.

> [3]
> This binding is UniPhier-specific.  No impact on other SoC vendors.
> Everything is under my control.
>
>
>
> For now, I will prepare the logic to support the old binding,
> but for the reasons above, please let me drop the support for the old
> one some time later.

Yeah, I'm perfectly fine with not keeping it for a long time. For
example, feel free to remove it next release if you think that will
work for your downstream users.


-Olof

[PATCH 2/9] ARM: dts: uniphier: rework UniPhier System Bus nodes

[Masahiro Yamada]

Hi Olof,


2016-02-25 16:20 GMT+09:00 Olof Johansson <olof@lixom.net>:
> On Wed, Feb 24, 2016 at 6:22 PM, Masahiro Yamada
> <yamada.masahiro@socionext.com> wrote:
>> Hi Olof,
>>
>>
>> 2016-02-25 9:26 GMT+09:00 Olof Johansson <olof@lixom.net>:
>>> Hi,
>>>
>>> On Tue, Feb 16, 2016 at 11:15:04AM +0900, Masahiro Yamada wrote:
>>>
>>>> diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c
>>>> index e1cfc1d..b53a8d9 100644
>>>> --- a/arch/arm/mach-uniphier/platsmp.c
>>>> +++ b/arch/arm/mach-uniphier/platsmp.c
>>>> @@ -30,7 +30,7 @@
>>>>   * The secondary CPUs check this register from the boot ROM for the jump
>>>>   * destination.  After that, it can be reused as a scratch register.
>>>>   */
>>>> -#define UNIPHIER_SBC_ROM_BOOT_RSV2   0x1208
>>>> +#define UNIPHIER_SMPCTRL_ROM_BOOT_RSV2       0x208
>>>>
>>>>  static void __iomem *uniphier_smp_rom_boot_rsv2;
>>>>  static unsigned int uniphier_smp_max_cpus;
>>>> @@ -98,15 +98,14 @@ static int __init uniphier_smp_prepare_trampoline(unsigned int max_cpus)
>>>>       phys_addr_t rom_rsv2_phys;
>>>>       int ret;
>>>>
>>>> -     np = of_find_compatible_node(NULL, NULL,
>>>> -                             "socionext,uniphier-system-bus-controller");
>>>> -     ret = of_address_to_resource(np, 1, &res);
>>>> +     np = of_find_compatible_node(NULL, NULL, "socionext,uniphier-smpctrl");
>>>> +     ret = of_address_to_resource(np, 0, &res);
>>>>       if (ret) {
>>>> -             pr_err("failed to get resource of system-bus-controller\n");
>>>> +             pr_err("failed to get resource of uniphier-smpctrl\n");
>>>>               return ret;
>>>>       }
>>>>
>>>> -     rom_rsv2_phys = res.start + UNIPHIER_SBC_ROM_BOOT_RSV2;
>>>> +     rom_rsv2_phys = res.start + UNIPHIER_SMPCTRL_ROM_BOOT_RSV2;
>>>>
>>>>       ret = uniphier_smp_copy_trampoline(rom_rsv2_phys);
>>>>       if (ret)
>>>
>>> The previous binding has already been released. You can update, but your driver
>>> should be able to handle the previous binding.
>>>
>>> So, you still need to keep the old code around.
>>>
>>> This has the benefit of breaking the dependency between the code change and the
>>> DT change, so you no longer have to change your platform code at the same time
>>> as the DT to avoid regressions.
>>>
>>>
>>> Please adjust and resend. I'll hold off applying the series until then, so we
>>> don't have a partially applied series.
>>
>>
>>
>> How long do I have to keep the support for the old binding?
>
> You know your platform best -- how many users do you think you have
> out there that might have built DTS files based on the old binding?
>
> If there's a good chance there are none, or if you're in good contact
> with them and can ask them to update, then you can be more flexible.
>
>> [1]
>> Everyone makes mistakes.
>> The constraint for the DT-binding is really really painful.
>>
>> This is how it happened.
>>
>> At first, I implemented uniphier-system-bus.c based on the old binding.
>> Then, during the review, Mark suggested me to change the driver design:
>> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-November/387938.html
>>
>> I followed his suggestion, but I needed to changed the DT-binding as well.
>> Before that time, the DT and other support code for UniPhier had been
>> partially merged
>> in the mainline.  So, in the current tree exist two bindings that are
>> not compatible to
>> each other.  This situation is really a mess.
>> I want to clean up the code as soon as possible.
>
> Yeah, I understand that it's hard to come up with perfect bindings
> from day one, and that's why we sometimes have to play by ear.
>
> It's not a bad idea to get practice on how to solve it -- in this case
> it wouldn't really bad that bad. If you use variables to hold the base
> addresses, and get them from either binding, you'll only special-case
> during probe and not anywhere else in the driver.
>
> The general idea of decoupling DT changes from code changes is also a
> good habit.
>
>> [2]
>> For now, DT is mostly developed in the kernel tree in practice,
>> while DT is not theoretically only for Linux.
>> Everybody (at least every user of UniPhier SoCs) uses the combination
>> of a DTB and a kernel image
>> generated from the same Linux tree.
>> I see no reason to use a new DTB + an old kernel image, or vice versa.
>
> We're not aiming to support new DTB + old kernel image. The main
> problem is if someone has a product DTB that's not yet merged, and you
> change the binding, then their DTB might no longer work. It's not a
> huge deal, and for most changes it's fairly harmless, but the general
> principle still applies.
>
> As I said earlier, you know the users of your platform the best (I
> hope :), so you'll have the best feel for whether this is a breakage
> they will hurt from or not.
>
>> [3]
>> This binding is UniPhier-specific.  No impact on other SoC vendors.
>> Everything is under my control.
>>
>>
>>
>> For now, I will prepare the logic to support the old binding,
>> but for the reasons above, please let me drop the support for the old
>> one some time later.
>
> Yeah, I'm perfectly fine with not keeping it for a long time. For
> example, feel free to remove it next release if you think that will
> work for your downstream users.


OK, I split the series into two.  (DT and non-DT updates)

Thanks.


-- 
Best Regards
Masahiro Yamada

[PATCH 3/9] ARM: uniphier: add missing of_node_put()

[Masahiro Yamada]

This node pointer is allocated by of_find_compatible_node() in this
function.  It should be put before exitting this function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/mach-uniphier/platsmp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-uniphier/platsmp.c b/arch/arm/mach-uniphier/platsmp.c
index b53a8d9..fad568d 100644
--- a/arch/arm/mach-uniphier/platsmp.c
+++ b/arch/arm/mach-uniphier/platsmp.c
@@ -100,6 +100,7 @@ static int __init uniphier_smp_prepare_trampoline(unsigned int max_cpus)
 
 	np = of_find_compatible_node(NULL, NULL, "socionext,uniphier-smpctrl");
 	ret = of_address_to_resource(np, 0, &res);
+	of_node_put(np);
 	if (ret) {
 		pr_err("failed to get resource of uniphier-smpctrl\n");
 		return ret;
-- 
1.9.1

[PATCH 4/9] ARM: dts: uniphier: add reference clock nodes

[Masahiro Yamada]

Add master clock nodes generated by crystal oscillators.

  PH1-sLD3, PH1-LD4: 24.576 MHz
  PH1-Pro4, ProXstream2: 25.000 MHz
  PH1-Pro5: 20.000 MHz

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/boot/dts/uniphier-common32.dtsi    | 7 +++++++
 arch/arm/boot/dts/uniphier-ph1-ld4.dtsi     | 4 ++++
 arch/arm/boot/dts/uniphier-ph1-pro4.dtsi    | 4 ++++
 arch/arm/boot/dts/uniphier-ph1-pro5.dtsi    | 4 ++++
 arch/arm/boot/dts/uniphier-ph1-sld3.dtsi    | 6 ++++++
 arch/arm/boot/dts/uniphier-ph1-sld8.dtsi    | 4 ++++
 arch/arm/boot/dts/uniphier-proxstream2.dtsi | 4 ++++
 7 files changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/uniphier-common32.dtsi b/arch/arm/boot/dts/uniphier-common32.dtsi
index ae48d28..77a6694 100644
--- a/arch/arm/boot/dts/uniphier-common32.dtsi
+++ b/arch/arm/boot/dts/uniphier-common32.dtsi
@@ -45,6 +45,13 @@
 /include/ "skeleton.dtsi"
 
 / {
+	clocks {
+		refclk: ref {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+		};
+	};
+
 	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
index 34f0d8d..dadd860 100644
--- a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
@@ -173,6 +173,10 @@
 
 };
 
+&refclk {
+	clock-frequency = <24576000>;
+};
+
 &serial3 {
 	interrupts = <0 29 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
index d78142f..20f3f2a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
@@ -195,6 +195,10 @@
 	};
 };
 
+&refclk {
+	clock-frequency = <25000000>;
+};
+
 &pinctrl {
 	compatible = "socionext,ph1-pro4-pinctrl", "syscon";
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
index 2f389ea..24f6f66 100644
--- a/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro5.dtsi
@@ -189,6 +189,10 @@
 	};
 };
 
+&refclk {
+	clock-frequency = <20000000>;
+};
+
 &pinctrl {
 	compatible = "socionext,ph1-pro5-pinctrl", "syscon";
 };
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
index ef94d2e..0c61e74 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
@@ -68,6 +68,12 @@
 	};
 
 	clocks {
+		refclk: ref {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <24576000>;
+		};
+
 		arm_timer_clk: arm_timer_clk {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
index 7d06a1c..6bfd29a 100644
--- a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
@@ -172,6 +172,10 @@
 	};
 };
 
+&refclk {
+	clock-frequency = <25000000>;
+};
+
 &serial3 {
 	interrupts = <0 29 4>;
 };
diff --git a/arch/arm/boot/dts/uniphier-proxstream2.dtsi b/arch/arm/boot/dts/uniphier-proxstream2.dtsi
index 6bd353f..4ac484c 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/boot/dts/uniphier-proxstream2.dtsi
@@ -200,6 +200,10 @@
 	};
 };
 
+&refclk {
+	clock-frequency = <25000000>;
+};
+
 &pinctrl {
 	compatible = "socionext,proxstream2-pinctrl", "syscon";
 };
-- 
1.9.1

[PATCH 5/9] ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board

[Masahiro Yamada]

This board has an EEPROM (STMicroelectronics M24C64-WMN6TP) connected
to the I2C channel 0 of the SoC.  Its slave address is 0x54.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/boot/dts/uniphier-proxstream2-gentil.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
index 9d7ec5c..0da3018 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
@@ -75,4 +75,9 @@
 
 &i2c0 {
 	status = "okay";
+
+	eeprom at 54 {
+		compatible = "st,24c64";
+		reg = <0x54>;
+	};
 };
-- 
1.9.1

[PATCH 6/9] ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board

[Masahiro Yamada]

This is used for on-board inter-connection.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/boot/dts/uniphier-proxstream2-gentil.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
index 0da3018..bf2619e 100644
--- a/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-proxstream2-gentil.dts
@@ -63,6 +63,7 @@
 		serial1 = &serial1;
 		serial2 = &serial2;
 		i2c0 = &i2c0;
+		i2c2 = &i2c2;
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
 		i2c6 = &i2c6;
@@ -81,3 +82,7 @@
 		reg = <0x54>;
 	};
 };
+
+&i2c2 {
+	status = "okay";
+};
-- 
1.9.1

[PATCH 7/9] ARM: dts: uniphier: add PH1-Pro4 Ace board support

[Masahiro Yamada]

Initial commit for PH1-Pro4 Ace board support.

Note:
There are two variants for the amount of DDR memory; 1GB or 2GB.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/boot/dts/Makefile                  |   1 +
 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts | 113 ++++++++++++++++++++++++++++
 2 files changed, 114 insertions(+)
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70..d9d899f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -736,6 +736,7 @@ dtb-$(CONFIG_ARCH_U8500) += \
 dtb-$(CONFIG_ARCH_UNIPHIER) += \
 	uniphier-ph1-ld4-ref.dtb \
 	uniphier-ph1-ld6b-ref.dtb \
+	uniphier-ph1-pro4-ace.dtb \
 	uniphier-ph1-pro4-ref.dtb \
 	uniphier-ph1-sld3-ref.dtb \
 	uniphier-ph1-sld8-ref.dtb \
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts b/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts
new file mode 100644
index 0000000..d343586
--- /dev/null
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts
@@ -0,0 +1,113 @@
+/*
+ * Device Tree Source for UniPhier PH1-Pro4 Ace Board
+ *
+ * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-pro4.dtsi"
+
+/ {
+	model = "UniPhier PH1-Pro4 Ace Board";
+	compatible = "socionext,ph1-pro4-ace", "socionext,ph1-pro4";
+
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x40000000>;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	aliases {
+		serial0 = &serial0;
+		serial1 = &serial1;
+		serial2 = &serial2;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+	};
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&serial2 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	eeprom at 54 {
+		compatible = "st,24c64";
+		reg = <0x54>;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	status = "okay";
+};
+
+&usb2 {
+	status = "okay";
+};
+
+&usb3 {
+	status = "okay";
+};
-- 
1.9.1

[PATCH 8/9] ARM: dts: uniphier: add PH1-Pro4 Sanji board support

[Masahiro Yamada]

Initial commit for PH1-Pro4 Sanji board support.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/boot/dts/Makefile                    |   1 +
 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts | 108 ++++++++++++++++++++++++++
 2 files changed, 109 insertions(+)
 create mode 100644 arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d9d899f..f2663ac 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -738,6 +738,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \
 	uniphier-ph1-ld6b-ref.dtb \
 	uniphier-ph1-pro4-ace.dtb \
 	uniphier-ph1-pro4-ref.dtb \
+	uniphier-ph1-pro4-sanji.dtb \
 	uniphier-ph1-sld3-ref.dtb \
 	uniphier-ph1-sld8-ref.dtb \
 	uniphier-proxstream2-gentil.dtb \
diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts b/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts
new file mode 100644
index 0000000..7c3a1fc
--- /dev/null
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts
@@ -0,0 +1,108 @@
+/*
+ * Device Tree Source for UniPhier PH1-Pro4 Sanji Board
+ *
+ * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-pro4.dtsi"
+
+/ {
+	model = "UniPhier PH1-Pro4 Sanji Board";
+	compatible = "socionext,ph1-pro4-sanji", "socionext,ph1-pro4";
+
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x80000000>;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	aliases {
+		serial0 = &serial0;
+		serial1 = &serial1;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+	};
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&serial1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	eeprom at 54 {
+		compatible = "st,24c64";
+		reg = <0x54>;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2c3 {
+	status = "okay";
+};
+
+&usb2 {
+	status = "okay";
+};
+
+&usb3 {
+	status = "okay";
+};
-- 
1.9.1

[PATCH 9/9] ARM: dts: uniphier: add @{address} to EEPROM node

[Masahiro Yamada]

Just for consistent coding style.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 arch/arm/boot/dts/uniphier-ref-daughter.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/uniphier-ref-daughter.dtsi b/arch/arm/boot/dts/uniphier-ref-daughter.dtsi
index 3d29d28..f7df088 100644
--- a/arch/arm/boot/dts/uniphier-ref-daughter.dtsi
+++ b/arch/arm/boot/dts/uniphier-ref-daughter.dtsi
@@ -43,7 +43,7 @@
  */
 
 &i2c0 {
-	eeprom {
+	eeprom at 50 {
 		compatible = "microchip,24lc128";
 		reg = <0x50>;
 	};
-- 
1.9.1