From mboxrd@z Thu Jan  1 00:00:00 1970
From: robh@kernel.org (Rob Herring)
Date: Fri, 4 Mar 2016 22:26:13 -0600
Subject: [PATCH 2/5] Documentation: dt: socfpga: Add Altera Arri10 L2
 cache binding
In-Reply-To: <1456850301-22066-2-git-send-email-tthayer@opensource.altera.com>
References: <1456850301-22066-1-git-send-email-tthayer@opensource.altera.com>
 <1456850301-22066-2-git-send-email-tthayer@opensource.altera.com>
Message-ID: <20160305042613.GI13525@rob-hp-laptop>
To: linux-arm-kernel@lists.infradead.org
List-Id: linux-arm-kernel.lists.infradead.org

On Tue, Mar 01, 2016 at 10:38:18AM -0600, tthayer at opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
> 
> Add the device tree binding string needed to support the Altera L2
> cache on the Arria10 chip.
> 
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
>  .../bindings/arm/altera/socfpga-eccmgr.txt         |    3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Acked-by: Rob Herring <robh@kernel.org>