From: christoffer.dall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 05/12] KVM: arm/arm64: vgic-v2: Reset LRs at boot time
Date: Tue, 8 Mar 2016 19:07:51 -0800 [thread overview]
Message-ID: <20160309030751.GA26583@lvm> (raw)
In-Reply-To: <1457343214-19547-6-git-send-email-marc.zyngier@arm.com>
On Mon, Mar 07, 2016 at 09:33:27AM +0000, Marc Zyngier wrote:
> In order to let make the GICv2 code more lazy in the way it
> accesses the LRs, it is necessary to start with a clean slate.
>
> Let's reset the LRs on each CPU when the vgic is probed.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
> ---
> virt/kvm/arm/vgic-v2.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/virt/kvm/arm/vgic-v2.c b/virt/kvm/arm/vgic-v2.c
> index ff02f08..67ec334 100644
> --- a/virt/kvm/arm/vgic-v2.c
> +++ b/virt/kvm/arm/vgic-v2.c
> @@ -176,6 +176,15 @@ static const struct vgic_ops vgic_v2_ops = {
>
> static struct vgic_params vgic_v2_params;
>
> +static void vgic_cpu_init_lrs(void *params)
> +{
> + struct vgic_params *vgic = params;
> + int i;
> +
> + for (i = 0; i < vgic->nr_lr; i++)
> + writel_relaxed(0, vgic->vctrl_base + GICH_LR0 + (i * 4));
> +}
> +
> /**
> * vgic_v2_probe - probe for a GICv2 compatible interrupt controller in DT
> * @node: pointer to the DT node
> @@ -257,6 +266,9 @@ int vgic_v2_probe(struct device_node *vgic_node,
>
> vgic->type = VGIC_V2;
> vgic->max_gic_vcpus = VGIC_V2_MAX_CPUS;
> +
> + on_each_cpu(vgic_cpu_init_lrs, vgic, 1);
> +
> *ops = &vgic_v2_ops;
> *params = vgic;
> goto out;
> --
> 2.1.4
>
next prev parent reply other threads:[~2016-03-09 3:07 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-07 9:33 [PATCH v3 00/12] Virtual GIC save/restore optimization Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 01/12] KVM: arm/arm64: vgic-v2: Avoid accessing GICH registers Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 02/12] KVM: arm/arm64: vgic-v2: Save maintenance interrupt state only if required Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 03/12] KVM: arm/arm64: vgic-v2: Move GICH_ELRSR saving to its own function Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 04/12] KVM: arm/arm64: vgic-v2: Do not save an LR known to be empty Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 05/12] KVM: arm/arm64: vgic-v2: Reset LRs at boot time Marc Zyngier
2016-03-09 3:07 ` Christoffer Dall [this message]
2016-03-07 9:33 ` [PATCH v3 06/12] KVM: arm/arm64: vgic-v2: Only wipe LRs on vcpu exit Marc Zyngier
2016-03-09 3:09 ` Christoffer Dall
2016-03-07 9:33 ` [PATCH v3 07/12] KVM: arm/arm64: vgic-v2: Make GICD_SGIR quicker to hit Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 08/12] arm64: KVM: vgic-v3: Avoid accessing ICH registers Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 09/12] arm64: KVM: vgic-v3: Save maintenance interrupt state only if required Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 10/12] arm64: KVM: vgic-v3: Do not save an LR known to be empty Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 11/12] arm64: KVM: vgic-v3: Reset LRs at boot time Marc Zyngier
2016-03-09 3:12 ` Christoffer Dall
2016-03-07 9:33 ` [PATCH v3 12/12] arm64: KVM: vgic-v3: Only wipe LRs on vcpu exit Marc Zyngier
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