From: christoffer.dall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 06/12] KVM: arm/arm64: vgic-v2: Only wipe LRs on vcpu exit
Date: Tue, 8 Mar 2016 19:09:53 -0800 [thread overview]
Message-ID: <20160309030953.GB26583@lvm> (raw)
In-Reply-To: <1457343214-19547-7-git-send-email-marc.zyngier@arm.com>
On Mon, Mar 07, 2016 at 09:33:28AM +0000, Marc Zyngier wrote:
> So far, we're always writing all possible LRs, setting the empty
> ones with a zero value. This is obvious doing a lot of work for
> nothing, and we're better off clearing those we've actually
> dirtied on the exit path (it is very rare to inject more than one
> interrupt at a time anyway).
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
> ---
> virt/kvm/arm/hyp/vgic-v2-sr.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/virt/kvm/arm/hyp/vgic-v2-sr.c b/virt/kvm/arm/hyp/vgic-v2-sr.c
> index 6d4dd78..674bdf8 100644
> --- a/virt/kvm/arm/hyp/vgic-v2-sr.c
> +++ b/virt/kvm/arm/hyp/vgic-v2-sr.c
> @@ -99,6 +99,7 @@ static void __hyp_text save_lrs(struct kvm_vcpu *vcpu, void __iomem *base)
> }
>
> cpu_if->vgic_lr[i] = readl_relaxed(base + GICH_LR0 + (i * 4));
> + writel_relaxed(0, base + GICH_LR0 + (i * 4));
> }
> }
>
> @@ -156,12 +157,11 @@ void __hyp_text __vgic_v2_restore_state(struct kvm_vcpu *vcpu)
> writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR);
> writel_relaxed(cpu_if->vgic_apr, base + GICH_APR);
> for (i = 0; i < nr_lr; i++) {
> - u32 val = 0;
> -
> - if (live_lrs & (1UL << i))
> - val = cpu_if->vgic_lr[i];
> + if (!(live_lrs & (1UL << i)))
> + continue;
>
> - writel_relaxed(val, base + GICH_LR0 + (i * 4));
> + writel_relaxed(cpu_if->vgic_lr[i],
> + base + GICH_LR0 + (i * 4));
> }
> }
>
> --
> 2.1.4
>
next prev parent reply other threads:[~2016-03-09 3:09 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-07 9:33 [PATCH v3 00/12] Virtual GIC save/restore optimization Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 01/12] KVM: arm/arm64: vgic-v2: Avoid accessing GICH registers Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 02/12] KVM: arm/arm64: vgic-v2: Save maintenance interrupt state only if required Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 03/12] KVM: arm/arm64: vgic-v2: Move GICH_ELRSR saving to its own function Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 04/12] KVM: arm/arm64: vgic-v2: Do not save an LR known to be empty Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 05/12] KVM: arm/arm64: vgic-v2: Reset LRs at boot time Marc Zyngier
2016-03-09 3:07 ` Christoffer Dall
2016-03-07 9:33 ` [PATCH v3 06/12] KVM: arm/arm64: vgic-v2: Only wipe LRs on vcpu exit Marc Zyngier
2016-03-09 3:09 ` Christoffer Dall [this message]
2016-03-07 9:33 ` [PATCH v3 07/12] KVM: arm/arm64: vgic-v2: Make GICD_SGIR quicker to hit Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 08/12] arm64: KVM: vgic-v3: Avoid accessing ICH registers Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 09/12] arm64: KVM: vgic-v3: Save maintenance interrupt state only if required Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 10/12] arm64: KVM: vgic-v3: Do not save an LR known to be empty Marc Zyngier
2016-03-07 9:33 ` [PATCH v3 11/12] arm64: KVM: vgic-v3: Reset LRs at boot time Marc Zyngier
2016-03-09 3:12 ` Christoffer Dall
2016-03-07 9:33 ` [PATCH v3 12/12] arm64: KVM: vgic-v3: Only wipe LRs on vcpu exit Marc Zyngier
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