From: horms@verge.net.au (Simon Horman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 6/6] arm64: dts: r8a7795: Add SYSC PM domains
Date: Fri, 11 Mar 2016 08:34:11 +0900 [thread overview]
Message-ID: <20160310233411.GC7423@verge.net.au> (raw)
In-Reply-To: <1457551135-22078-7-git-send-email-geert+renesas@glider.be>
On Wed, Mar 09, 2016 at 08:18:55PM +0100, Geert Uytterhoeven wrote:
> Add a device node for the System Controller.
> Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2
> caches/SCUs to their respective PM domains.
> Hook up all devices that are part of the CPG/MSSR Clock Domain to the
> SYSC "always-on" PM Domain.
[snip]
> + sysc: system-controller at e6180000 {
> + compatible = "renesas,r8a7795-sysc";
> + reg = <0 0xe6180000 0 0x0400>;
In table 9.2 of v0.51e of the documentation I see some registers
beyond the 0x400 range above. Perhaps it could be enlarged accordingly?
> + #power-domain-cells = <1>;
> + };
[snip]
next parent reply other threads:[~2016-03-10 23:34 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1457551135-22078-1-git-send-email-geert+renesas@glider.be>
[not found] ` <1457551135-22078-7-git-send-email-geert+renesas@glider.be>
2016-03-10 23:34 ` Simon Horman [this message]
2016-03-11 8:01 ` [PATCH v3 6/6] arm64: dts: r8a7795: Add SYSC PM domains Geert Uytterhoeven
2016-03-14 0:12 ` Simon Horman
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