From: robh@kernel.org (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2 v6] dt/bindings: Add bindings for Layerscape SCFG MSI
Date: Wed, 23 Mar 2016 10:22:17 -0500 [thread overview]
Message-ID: <20160323152217.GA23919@rob-hp-laptop> (raw)
In-Reply-To: <1458731300-13648-1-git-send-email-Minghuan.Lian@nxp.com>
On Wed, Mar 23, 2016 at 07:08:19PM +0800, Minghuan Lian wrote:
> Some Layerscape SoCs use a simple MSI controller implementation.
> It contains only two SCFG register to trigger and describe a
> group 32 MSI interrupts. The patch adds bindings to describe
> the controller.
>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
> ---
> change log:
> v6-v4: no change
> v4: add interrupt-parent description
> v3-v1: no change
>
> .../interrupt-controller/fsl,ls-scfg-msi.txt | 30 ++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
Acked-by: Rob Herring <robh@kernel.org>
prev parent reply other threads:[~2016-03-23 15:22 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-23 11:08 [PATCH 1/2 v6] dt/bindings: Add bindings for Layerscape SCFG MSI Minghuan Lian
2016-03-23 11:08 ` [PATCH 2/2 v6] irqchip/Layerscape: Add SCFG MSI controller support Minghuan Lian
2016-03-23 15:22 ` Rob Herring [this message]
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