From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 1/3] arm64: Append more field of id_aa64mmfr2 for cpufeature
Date: Tue, 29 Mar 2016 13:44:01 +0100 [thread overview]
Message-ID: <20160329124401.GE26574@leverpostej> (raw)
In-Reply-To: <1458898209-7486-2-git-send-email-wangkefeng.wang@huawei.com>
On Fri, Mar 25, 2016 at 05:30:07PM +0800, Kefeng Wang wrote:
> There are some new cpu features which can be identified by id_aa64mmfr2,
> this patch appends all fields of it.
FWIW, this looks like a good thing regardless of the cpuinfo patches.
The shifts look right to me. I'm not all that familiar with each of the
features, so I don't know whether or not we need strict exact matching
(though it's a safer to assume that we do for now).
Mark.
>
> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
> ---
> arch/arm64/include/asm/sysreg.h | 4 ++++
> arch/arm64/kernel/cpufeature.c | 4 ++++
> 2 files changed, 8 insertions(+)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 1a78d6e..c141243 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -142,7 +142,11 @@
> #define ID_AA64MMFR1_HADBS_SHIFT 0
>
> /* id_aa64mmfr2 */
> +#define ID_AA64MMFR2_LVA_SHIFT 16
> +#define ID_AA64MMFR2_IESB_SHIFT 12
> +#define ID_AA64MMFR2_LSM_SHIFT 8
> #define ID_AA64MMFR2_UAO_SHIFT 4
> +#define ID_AA64MMFR2_CNP_SHIFT 0
>
> /* id_aa64dfr0 */
> #define ID_AA64DFR0_CTX_CMPS_SHIFT 28
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index 943f514..677f17c 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -130,7 +130,11 @@ static struct arm64_ftr_bits ftr_id_aa64mmfr1[] = {
> };
>
> static struct arm64_ftr_bits ftr_id_aa64mmfr2[] = {
> + ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR2_LVA_SHIFT, 4, 0),
> + ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR2_IESB_SHIFT, 4, 0),
> + ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR2_LSM_SHIFT, 4, 0),
> ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR2_UAO_SHIFT, 4, 0),
> + ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_AA64MMFR2_CNP_SHIFT, 4, 0),
> ARM64_FTR_END,
> };
>
> --
> 1.7.12.4
>
next prev parent reply other threads:[~2016-03-29 12:44 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-25 9:30 [PATCH 0/3] Entend cpuinfo Kefeng Wang
2016-03-25 9:30 ` [RFC PATCH 1/3] arm64: Append more field of id_aa64mmfr2 for cpufeature Kefeng Wang
2016-03-29 12:44 ` Mark Rutland [this message]
2016-03-25 9:30 ` [RFC PATCH 2/3] arm64: Expose physical/virtual address bits through cpuinfo Kefeng Wang
2016-03-29 11:29 ` Dave Martin
2016-03-29 17:05 ` Russell King - ARM Linux
2016-03-25 9:30 ` [RFC PATCH 3/3] arm64: Expose cpu vender id and model name " Kefeng Wang
2016-03-29 11:38 ` Mark Rutland
2016-03-29 12:11 ` Kefeng Wang
2016-03-29 11:45 ` Dave Martin
2016-03-29 12:15 ` [PATCH 0/3] Entend cpuinfo Kefeng Wang
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