[PATCH v2 1/4] ARM: dts: imx6sx: Fix SAI DMA index

[PATCH v2 1/4] ARM: dts: imx6sx: Fix SAI DMA index

[Fabio Estevam]

From: Fabio Estevam <fabio.estevam@nxp.com>

According to sdma_peripheral_type in include/linux/platform_data/dma-imx.h
IMX_DMATYPE_SAI corresponds to index 24, so fix it accordingly.

Suggested-by: Zidan Wang <zidan.wang@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
Changes since v1:
- None

 arch/arm/boot/dts/imx6sx.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index a5f7602..c8269e7 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -970,7 +970,7 @@
 					 <&clks 0>, <&clks 0>;
 				clock-names = "bus", "mclk1", "mclk2", "mclk3";
 				dma-names = "rx", "tx";
-				dmas = <&sdma 31 23 0>, <&sdma 32 23 0>;
+				dmas = <&sdma 31 24 0>, <&sdma 32 24 0>;
 				dma-source = <&gpr 0 15 0 16>;
 				status = "disabled";
 			};
@@ -990,7 +990,7 @@
 					 <&clks 0>, <&clks 0>;
 				clock-names = "bus", "mclk1", "mclk2", "mclk3";
 				dma-names = "rx", "tx";
-				dmas = <&sdma 33 23 0>, <&sdma 34 23 0>;
+				dmas = <&sdma 33 24 0>, <&sdma 34 24 0>;
 				dma-source = <&gpr 0 17 0 18>;
 				status = "disabled";
 			};
-- 
1.9.1

[PATCH v2 2/4] ARM: dts: imx6sx: Remove unused property

[Fabio Estevam]

From: Fabio Estevam <fabio.estevam@nxp.com>

Property 'dma-source' is not used anywhere, nor it is documented, so
let's just get rid of it.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
Changes since v1:
- None

 arch/arm/boot/dts/imx6sx.dtsi | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index c8269e7..d02ab32 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -971,7 +971,6 @@
 				clock-names = "bus", "mclk1", "mclk2", "mclk3";
 				dma-names = "rx", "tx";
 				dmas = <&sdma 31 24 0>, <&sdma 32 24 0>;
-				dma-source = <&gpr 0 15 0 16>;
 				status = "disabled";
 			};
 
@@ -991,7 +990,6 @@
 				clock-names = "bus", "mclk1", "mclk2", "mclk3";
 				dma-names = "rx", "tx";
 				dmas = <&sdma 33 24 0>, <&sdma 34 24 0>;
-				dma-source = <&gpr 0 17 0 18>;
 				status = "disabled";
 			};
 
-- 
1.9.1

[PATCH v2 3/4] fsl-imx-sdma.txt: Document 'fsl, sdma-event-remap' property

[Fabio Estevam]

From: Fabio Estevam <fabio.estevam@nxp.com>

Document the 'fsl,sdma-event-remap' property and provide an example of
its usage.

Cc: Vinod Koul <vinod.koul@intel.com> 
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
Changes since v1:
- Newly introduced in this series

 .../devicetree/bindings/dma/fsl-imx-sdma.txt       | 27 ++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
index dc8d3aa..175f0e4 100644
--- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
@@ -58,6 +58,15 @@ The third cell specifies the transfer priority as below.
 	1	Medium
 	2	Low
 
+Optional properties:
+
+- gpr : The phandle to the General Purpose Register (GPR) node.
+- fsl,sdma-event-remap : Register bits of sdma event remap, the format is
+  <reg shift val>.
+    reg is the GPR register offset.
+    shift is the bit position inside the GPR register.
+    val is the value of the bit (0 or 1).
+
 Examples:
 
 sdma at 83fb0000 {
@@ -83,3 +92,21 @@ ssi2: ssi at 70014000 {
 	dma-names = "rx", "tx";
 	fsl,fifo-depth = <15>;
 };
+
+Using the fsl,sdma-event-remap property:
+
+If we want to use SDMA on the SAI1 port on a MX6SX:
+
+&sdma {
+	gpr = <&gpr>;
+	/* SDMA events remap for SAI1_RX and SAI1_TX */
+	fsl,sdma-event-remap = <0 15 1>, <0 16 1>;
+};
+
+The fsl,sdma-event-remap property in this case has two values:
+- <0 15 1> means that the offset is 0, so GPR0 is the register of the
+SDMA remap. Bit 15 of GPR0 selects between UART4_RX and SAI1_RX.
+Setting bit 15 to 1 selects SAI1_RX.
+- <0 16 1> means that the offset is 0, so GPR0 is the register of the
+SDMA remap. Bit 16 of GPR0 selects between UART4_TX and SAI1_TX.
+Setting bit 16 to 1 selects SAI1_TX.
-- 
1.9.1

[PATCH v2 4/4] ARM: dts: imx6sx-sdb: Add SAI support

[Fabio Estevam]

From: Fabio Estevam <fabio.estevam@nxp.com>

Introduce imx6sx-sdb-sai.dts so that it is possible to use the
SAI interface. 

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
Changes since v1:
- Add imx6sx-sdb-sai.dtb into Makefile

 arch/arm/boot/dts/Makefile           |  1 +
 arch/arm/boot/dts/imx6sx-sdb-sai.dts | 67 ++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/imx6sx-sdb.dtsi    | 16 +++++++++
 3 files changed, 84 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6sx-sdb-sai.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 1993333..ea71187 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -374,6 +374,7 @@ dtb-$(CONFIG_SOC_IMX6SL) += \
 dtb-$(CONFIG_SOC_IMX6SX) += \
 	imx6sx-sabreauto.dtb \
 	imx6sx-sdb-reva.dtb \
+	imx6sx-sdb-sai.dtb \
 	imx6sx-sdb.dtb
 dtb-$(CONFIG_SOC_IMX6UL) += \
 	imx6ul-14x14-evk.dtb \
diff --git a/arch/arm/boot/dts/imx6sx-sdb-sai.dts b/arch/arm/boot/dts/imx6sx-sdb-sai.dts
new file mode 100644
index 0000000..0155450
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sx-sdb-sai.dts
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2016 NXP Semiconductors
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License
+ *     version 2 as published by the Free Software Foundation.
+ *
+ *     This file is distributed in the hope that it will be useful
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "imx6sx-sdb.dts"
+
+/ {
+	sound {
+		audio-cpu = <&sai1>;
+	};
+};
+
+&audmux {
+	/* pin conflict with sai */
+	status = "disabled";
+};
+
+&sai1 {
+	status = "okay";
+};
+
+&sdma {
+	gpr = <&gpr>;
+	/* SDMA event remap for SAI1 */
+	fsl,sdma-event-remap = <0 15 1>, <0 16 1>;
+};
+
+&ssi2 {
+	status = "disabled";
+};
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi
index f1d3730..e5eafe4 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dtsi
+++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi
@@ -254,6 +254,12 @@
 	status = "okay";
 };
 
+&sai1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai1>;
+	status = "disabled";
+};
+
 &ssi2 {
 	status = "okay";
 };
@@ -468,6 +474,16 @@
 			>;
 		};
 
+		pinctrl_sai1: sai1grp {
+			fsl,pins = <
+				MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK	0x130b0
+				MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC	0x130b0
+				MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0	0x120b0
+				MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0	0x130b0
+				MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK	0x130b0
+			>;
+		};
+
 		pinctrl_uart1: uart1grp {
 			fsl,pins = <
 				MX6SX_PAD_GPIO1_IO04__UART1_TX		0x1b0b1
-- 
1.9.1

[PATCH v2 1/4] ARM: dts: imx6sx: Fix SAI DMA index

[Shawn Guo]

On Fri, Apr 01, 2016 at 08:52:14PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
> 
> According to sdma_peripheral_type in include/linux/platform_data/dma-imx.h
> IMX_DMATYPE_SAI corresponds to index 24, so fix it accordingly.
> 
> Suggested-by: Zidan Wang <zidan.wang@nxp.com>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>

Applied all, thanks.

[PATCH v2 3/4] fsl-imx-sdma.txt: Document 'fsl, sdma-event-remap' property

[Vinod Koul]

On Fri, Apr 01, 2016 at 08:52:16PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
> 
> Document the 'fsl,sdma-event-remap' property and provide an example of
> its usage.

just 2/3 patch so I have no idea of the series. Whats going on?

> 
> Cc: Vinod Koul <vinod.koul@intel.com> 
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
> Changes since v1:
> - Newly introduced in this series
> 
>  .../devicetree/bindings/dma/fsl-imx-sdma.txt       | 27 ++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
> index dc8d3aa..175f0e4 100644
> --- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
> +++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
> @@ -58,6 +58,15 @@ The third cell specifies the transfer priority as below.
>  	1	Medium
>  	2	Low
>  
> +Optional properties:
> +
> +- gpr : The phandle to the General Purpose Register (GPR) node.
> +- fsl,sdma-event-remap : Register bits of sdma event remap, the format is
> +  <reg shift val>.
> +    reg is the GPR register offset.
> +    shift is the bit position inside the GPR register.
> +    val is the value of the bit (0 or 1).
> +
>  Examples:
>  
>  sdma at 83fb0000 {
> @@ -83,3 +92,21 @@ ssi2: ssi at 70014000 {
>  	dma-names = "rx", "tx";
>  	fsl,fifo-depth = <15>;
>  };
> +
> +Using the fsl,sdma-event-remap property:
> +
> +If we want to use SDMA on the SAI1 port on a MX6SX:
> +
> +&sdma {
> +	gpr = <&gpr>;
> +	/* SDMA events remap for SAI1_RX and SAI1_TX */
> +	fsl,sdma-event-remap = <0 15 1>, <0 16 1>;
> +};
> +
> +The fsl,sdma-event-remap property in this case has two values:
> +- <0 15 1> means that the offset is 0, so GPR0 is the register of the
> +SDMA remap. Bit 15 of GPR0 selects between UART4_RX and SAI1_RX.
> +Setting bit 15 to 1 selects SAI1_RX.
> +- <0 16 1> means that the offset is 0, so GPR0 is the register of the
> +SDMA remap. Bit 16 of GPR0 selects between UART4_TX and SAI1_TX.
> +Setting bit 16 to 1 selects SAI1_TX.
> -- 
> 1.9.1
> 

-- 
~Vinod