* [PATCH 01/26] ARM: dts: lager: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 02/26] ARM: dts: ape6evm: " Simon Horman
` (25 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the lager device tree to use the generic
rather than renesas-specific properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/boot/dts/r8a7790-lager.dts | 92 ++++++++++++++++++-------------------
1 file changed, 46 insertions(+), 46 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index aa6ca92a9485..a5828721ab7c 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -314,119 +314,119 @@
pinctrl-names = "default";
du_pins: du {
- renesas,groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
- renesas,function = "du";
+ groups = "du_rgb666", "du_sync_1", "du_clk_out_0";
+ function = "du";
};
scif0_pins: serial0 {
- renesas,groups = "scif0_data";
- renesas,function = "scif0";
+ groups = "scif0_data";
+ function = "scif0";
};
scif_clk_pins: scif_clk {
- renesas,groups = "scif_clk";
- renesas,function = "scif_clk";
+ groups = "scif_clk";
+ function = "scif_clk";
};
ether_pins: ether {
- renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
- renesas,function = "eth";
+ groups = "eth_link", "eth_mdio", "eth_rmii";
+ function = "eth";
};
phy1_pins: phy1 {
- renesas,groups = "intc_irq0";
- renesas,function = "intc";
+ groups = "intc_irq0";
+ function = "intc";
};
scifa1_pins: serial1 {
- renesas,groups = "scifa1_data";
- renesas,function = "scifa1";
+ groups = "scifa1_data";
+ function = "scifa1";
};
sdhi0_pins: sd0 {
- renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
- renesas,function = "sdhi0";
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
};
sdhi2_pins: sd2 {
- renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
- renesas,function = "sdhi2";
+ groups = "sdhi2_data4", "sdhi2_ctrl";
+ function = "sdhi2";
};
mmc1_pins: mmc1 {
- renesas,groups = "mmc1_data8", "mmc1_ctrl";
- renesas,function = "mmc1";
+ groups = "mmc1_data8", "mmc1_ctrl";
+ function = "mmc1";
};
qspi_pins: spi0 {
- renesas,groups = "qspi_ctrl", "qspi_data4";
- renesas,function = "qspi";
+ groups = "qspi_ctrl", "qspi_data4";
+ function = "qspi";
};
msiof1_pins: spi2 {
- renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
+ groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
"msiof1_tx";
- renesas,function = "msiof1";
+ function = "msiof1";
};
i2c0_pins: i2c0 {
- renesas,groups = "i2c0";
- renesas,function = "i2c0";
+ groups = "i2c0";
+ function = "i2c0";
};
iic0_pins: iic0 {
- renesas,groups = "iic0";
- renesas,function = "iic0";
+ groups = "iic0";
+ function = "iic0";
};
iic1_pins: iic1 {
- renesas,groups = "iic1";
- renesas,function = "iic1";
+ groups = "iic1";
+ function = "iic1";
};
iic2_pins: iic2 {
- renesas,groups = "iic2";
- renesas,function = "iic2";
+ groups = "iic2";
+ function = "iic2";
};
iic3_pins: iic3 {
- renesas,groups = "iic3";
- renesas,function = "iic3";
+ groups = "iic3";
+ function = "iic3";
};
hsusb_pins: hsusb {
- renesas,groups = "usb0_ovc_vbus";
- renesas,function = "usb0";
+ groups = "usb0_ovc_vbus";
+ function = "usb0";
};
usb0_pins: usb0 {
- renesas,groups = "usb0";
- renesas,function = "usb0";
+ groups = "usb0";
+ function = "usb0";
};
usb1_pins: usb1 {
- renesas,groups = "usb1";
- renesas,function = "usb1";
+ groups = "usb1";
+ function = "usb1";
};
usb2_pins: usb2 {
- renesas,groups = "usb2";
- renesas,function = "usb2";
+ groups = "usb2";
+ function = "usb2";
};
vin1_pins: vin {
- renesas,groups = "vin1_data8", "vin1_clk";
- renesas,function = "vin1";
+ groups = "vin1_data8", "vin1_clk";
+ function = "vin1";
};
sound_pins: sound {
- renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
- renesas,function = "ssi";
+ groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
+ function = "ssi";
};
sound_clk_pins: sound_clk {
- renesas,groups = "audio_clk_a";
- renesas,function = "audio_clk";
+ groups = "audio_clk_a";
+ function = "audio_clk";
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 02/26] ARM: dts: ape6evm: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
2016-04-04 1:22 ` [PATCH 01/26] ARM: dts: lager: use generic pinctrl properties Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 03/26] ARM: dts: armadillo800eva: " Simon Horman
` (24 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the ape6evm device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a73a4-ape6evm.dts | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
index 590257095700..93ace33e3e36 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
@@ -189,28 +189,28 @@
&pfc {
scifa0_pins: serial0 {
- renesas,groups = "scifa0_data";
- renesas,function = "scifa0";
+ groups = "scifa0_data";
+ function = "scifa0";
};
mmc0_pins: mmc {
- renesas,groups = "mmc0_data8", "mmc0_ctrl";
- renesas,function = "mmc0";
+ groups = "mmc0_data8", "mmc0_ctrl";
+ function = "mmc0";
};
sdhi0_pins: sd0 {
- renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
- renesas,function = "sdhi0";
+ groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
+ function = "sdhi0";
};
sdhi1_pins: sd1 {
- renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
- renesas,function = "sdhi1";
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
};
keyboard_pins: keyboard {
- renesas,pins = "PORT324", "PORT325", "PORT326", "PORT327",
- "PORT328", "PORT329";
+ pins = "PORT324", "PORT325", "PORT326", "PORT327", "PORT328",
+ "PORT329";
bias-pull-up;
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 03/26] ARM: dts: armadillo800eva: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
2016-04-04 1:22 ` [PATCH 01/26] ARM: dts: lager: use generic pinctrl properties Simon Horman
2016-04-04 1:22 ` [PATCH 02/26] ARM: dts: ape6evm: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 04/26] ARM: dts: bockw: " Simon Horman
` (23 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the armadillo800eva device tree to use the generic
properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 34 +++++++++++++--------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
index c548cabb102f..2c82dab2b6f4 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
@@ -228,44 +228,44 @@
pinctrl-names = "default";
ether_pins: ether {
- renesas,groups = "gether_mii", "gether_int";
- renesas,function = "gether";
+ groups = "gether_mii", "gether_int";
+ function = "gether";
};
scifa1_pins: serial1 {
- renesas,groups = "scifa1_data";
- renesas,function = "scifa1";
+ groups = "scifa1_data";
+ function = "scifa1";
};
st1232_pins: touchscreen {
- renesas,groups = "intc_irq10";
- renesas,function = "intc";
+ groups = "intc_irq10";
+ function = "intc";
};
backlight_pins: backlight {
- renesas,groups = "tpu0_to2_1";
- renesas,function = "tpu0";
+ groups = "tpu0_to2_1";
+ function = "tpu0";
};
mmc0_pins: mmc0 {
- renesas,groups = "mmc0_data8_1", "mmc0_ctrl_1";
- renesas,function = "mmc0";
+ groups = "mmc0_data8_1", "mmc0_ctrl_1";
+ function = "mmc0";
};
sdhi0_pins: sd0 {
- renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
- renesas,function = "sdhi0";
+ groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
+ function = "sdhi0";
};
fsia_pins: sounda {
- renesas,groups = "fsia_sclk_in", "fsia_mclk_out",
- "fsia_data_in_1", "fsia_data_out_0";
- renesas,function = "fsia";
+ groups = "fsia_sclk_in", "fsia_mclk_out",
+ "fsia_data_in_1", "fsia_data_out_0";
+ function = "fsia";
};
lcd0_pins: lcd0 {
- renesas,groups = "lcd0_data24_0", "lcd0_lclk_1", "lcd0_sync";
- renesas,function = "lcd0";
+ groups = "lcd0_data24_0", "lcd0_lclk_1", "lcd0_sync";
+ function = "lcd0";
/* DBGMD/LCDC0/FSIA MUX */
gpio-hog;
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 04/26] ARM: dts: bockw: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (2 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 03/26] ARM: dts: armadillo800eva: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 05/26] ARM: dts: marzen: " Simon Horman
` (22 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the bockw device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7778-bockw.dts | 40 ++++++++++++++++++-------------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts
index 21e3b9dda2da..e0dab1464648 100644
--- a/arch/arm/boot/dts/r8a7778-bockw.dts
+++ b/arch/arm/boot/dts/r8a7778-bockw.dts
@@ -130,53 +130,53 @@
pinctrl-names = "default";
scif0_pins: serial0 {
- renesas,groups = "scif0_data_a", "scif0_ctrl";
- renesas,function = "scif0";
+ groups = "scif0_data_a", "scif0_ctrl";
+ function = "scif0";
};
scif_clk_pins: scif_clk {
- renesas,groups = "scif_clk";
- renesas,function = "scif_clk";
+ groups = "scif_clk";
+ function = "scif_clk";
};
mmc_pins: mmc {
- renesas,groups = "mmc_data8", "mmc_ctrl";
- renesas,function = "mmc";
+ groups = "mmc_data8", "mmc_ctrl";
+ function = "mmc";
};
sdhi0_pins: sd0 {
- renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
- renesas,function = "sdhi0";
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
};
sdhi0_pup_pins: sd0_pup {
- renesas,groups = "sdhi0_cd", "sdhi0_wp";
- renesas,function = "sdhi0";
+ groups = "sdhi0_cd", "sdhi0_wp";
+ function = "sdhi0";
bias-pull-up;
};
hspi0_pins: hspi0 {
- renesas,groups = "hspi0_a";
- renesas,function = "hspi0";
+ groups = "hspi0_a";
+ function = "hspi0";
};
usb0_pins: usb0 {
- renesas,groups = "usb0";
- renesas,function = "usb0";
+ groups = "usb0";
+ function = "usb0";
};
usb1_pins: usb1 {
- renesas,groups = "usb1";
- renesas,function = "usb1";
+ groups = "usb1";
+ function = "usb1";
};
vin0_pins: vin0 {
- renesas,groups = "vin0_data8", "vin0_clk";
- renesas,function = "vin0";
+ groups = "vin0_data8", "vin0_clk";
+ function = "vin0";
};
vin1_pins: vin1 {
- renesas,groups = "vin1_data8", "vin1_clk";
- renesas,function = "vin1";
+ groups = "vin1_data8", "vin1_clk";
+ function = "vin1";
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 05/26] ARM: dts: marzen: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (3 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 04/26] ARM: dts: bockw: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 06/26] ARM: dts: koelsch: " Simon Horman
` (21 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the marzen device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7779-marzen.dts | 36 ++++++++++++++++++------------------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
index e111d35d02ae..b795da6f5503 100644
--- a/arch/arm/boot/dts/r8a7779-marzen.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
@@ -170,49 +170,49 @@
du_pins: du {
du0 {
- renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
- renesas,function = "du0";
+ groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
+ function = "du0";
};
du1 {
- renesas,groups = "du1_rgb666", "du1_sync_1", "du1_clk_out";
- renesas,function = "du1";
+ groups = "du1_rgb666", "du1_sync_1", "du1_clk_out";
+ function = "du1";
};
};
scif_clk_pins: scif_clk {
- renesas,groups = "scif_clk_b";
- renesas,function = "scif_clk";
+ groups = "scif_clk_b";
+ function = "scif_clk";
};
ethernet_pins: ethernet {
intc {
- renesas,groups = "intc_irq1_b";
- renesas,function = "intc";
+ groups = "intc_irq1_b";
+ function = "intc";
};
lbsc {
- renesas,groups = "lbsc_ex_cs0";
- renesas,function = "lbsc";
+ groups = "lbsc_ex_cs0";
+ function = "lbsc";
};
};
scif2_pins: serial2 {
- renesas,groups = "scif2_data_c";
- renesas,function = "scif2";
+ groups = "scif2_data_c";
+ function = "scif2";
};
scif4_pins: serial4 {
- renesas,groups = "scif4_data";
- renesas,function = "scif4";
+ groups = "scif4_data";
+ function = "scif4";
};
sdhi0_pins: sd0 {
- renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
- renesas,function = "sdhi0";
+ groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
+ function = "sdhi0";
};
hspi0_pins: hspi0 {
- renesas,groups = "hspi0";
- renesas,function = "hspi0";
+ groups = "hspi0";
+ function = "hspi0";
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 06/26] ARM: dts: koelsch: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (4 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 05/26] ARM: dts: marzen: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 07/26] ARM: dts: porter: " Simon Horman
` (20 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the koelsch device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 68 +++++++++++++++++------------------
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index 0ad71b81d3a2..c6b43c85a0b1 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -324,89 +324,89 @@
pinctrl-names = "default";
i2c2_pins: i2c2 {
- renesas,groups = "i2c2";
- renesas,function = "i2c2";
+ groups = "i2c2";
+ function = "i2c2";
};
du_pins: du {
- renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
- renesas,function = "du";
+ groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
+ function = "du";
};
scif0_pins: serial0 {
- renesas,groups = "scif0_data_d";
- renesas,function = "scif0";
+ groups = "scif0_data_d";
+ function = "scif0";
};
scif1_pins: serial1 {
- renesas,groups = "scif1_data_d";
- renesas,function = "scif1";
+ groups = "scif1_data_d";
+ function = "scif1";
};
scif_clk_pins: scif_clk {
- renesas,groups = "scif_clk";
- renesas,function = "scif_clk";
+ groups = "scif_clk";
+ function = "scif_clk";
};
ether_pins: ether {
- renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
- renesas,function = "eth";
+ groups = "eth_link", "eth_mdio", "eth_rmii";
+ function = "eth";
};
phy1_pins: phy1 {
- renesas,groups = "intc_irq0";
- renesas,function = "intc";
+ groups = "intc_irq0";
+ function = "intc";
};
sdhi0_pins: sd0 {
- renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
- renesas,function = "sdhi0";
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
};
sdhi1_pins: sd1 {
- renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
- renesas,function = "sdhi1";
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
};
sdhi2_pins: sd2 {
- renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
- renesas,function = "sdhi2";
+ groups = "sdhi2_data4", "sdhi2_ctrl";
+ function = "sdhi2";
};
qspi_pins: spi0 {
- renesas,groups = "qspi_ctrl", "qspi_data4";
- renesas,function = "qspi";
+ groups = "qspi_ctrl", "qspi_data4";
+ function = "qspi";
};
msiof0_pins: spi1 {
- renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
+ groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
"msiof0_tx";
- renesas,function = "msiof0";
+ function = "msiof0";
};
usb0_pins: usb0 {
- renesas,groups = "usb0";
- renesas,function = "usb0";
+ groups = "usb0";
+ function = "usb0";
};
usb1_pins: usb1 {
- renesas,groups = "usb1";
- renesas,function = "usb1";
+ groups = "usb1";
+ function = "usb1";
};
vin1_pins: vin1 {
- renesas,groups = "vin1_data8", "vin1_clk";
- renesas,function = "vin1";
+ groups = "vin1_data8", "vin1_clk";
+ function = "vin1";
};
sound_pins: sound {
- renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
- renesas,function = "ssi";
+ groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
+ function = "ssi";
};
sound_clk_pins: sound_clk {
- renesas,groups = "audio_clk_a";
- renesas,function = "audio_clk";
+ groups = "audio_clk_a";
+ function = "audio_clk";
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 07/26] ARM: dts: porter: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (5 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 06/26] ARM: dts: koelsch: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 08/26] ARM: dts: gose: " Simon Horman
` (19 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the porter device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791-porter.dts | 60 ++++++++++++++++++------------------
1 file changed, 30 insertions(+), 30 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index 6c08314427d6..af3751ff519a 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -147,78 +147,78 @@
pinctrl-names = "default";
scif0_pins: serial0 {
- renesas,groups = "scif0_data_d";
- renesas,function = "scif0";
+ groups = "scif0_data_d";
+ function = "scif0";
};
scif_clk_pins: scif_clk {
- renesas,groups = "scif_clk";
- renesas,function = "scif_clk";
+ groups = "scif_clk";
+ function = "scif_clk";
};
ether_pins: ether {
- renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
- renesas,function = "eth";
+ groups = "eth_link", "eth_mdio", "eth_rmii";
+ function = "eth";
};
phy1_pins: phy1 {
- renesas,groups = "intc_irq0";
- renesas,function = "intc";
+ groups = "intc_irq0";
+ function = "intc";
};
sdhi0_pins: sd0 {
- renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
- renesas,function = "sdhi0";
+ groups = "sdhi0_data4", "sdhi0_ctrl";
+ function = "sdhi0";
};
sdhi2_pins: sd2 {
- renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
- renesas,function = "sdhi2";
+ groups = "sdhi2_data4", "sdhi2_ctrl";
+ function = "sdhi2";
};
qspi_pins: spi0 {
- renesas,groups = "qspi_ctrl", "qspi_data4";
- renesas,function = "qspi";
+ groups = "qspi_ctrl", "qspi_data4";
+ function = "qspi";
};
i2c2_pins: i2c2 {
- renesas,groups = "i2c2";
- renesas,function = "i2c2";
+ groups = "i2c2";
+ function = "i2c2";
};
usb0_pins: usb0 {
- renesas,groups = "usb0";
- renesas,function = "usb0";
+ groups = "usb0";
+ function = "usb0";
};
usb1_pins: usb1 {
- renesas,groups = "usb1";
- renesas,function = "usb1";
+ groups = "usb1";
+ function = "usb1";
};
vin0_pins: vin0 {
- renesas,groups = "vin0_data8", "vin0_clk";
- renesas,function = "vin0";
+ groups = "vin0_data8", "vin0_clk";
+ function = "vin0";
};
can0_pins: can0 {
- renesas,groups = "can0_data";
- renesas,function = "can0";
+ groups = "can0_data";
+ function = "can0";
};
du_pins: du {
- renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
- renesas,function = "du";
+ groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
+ function = "du";
};
ssi_pins: sound {
- renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
- renesas,function = "ssi";
+ groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
+ function = "ssi";
};
audio_clk_pins: audio_clk {
- renesas,groups = "audio_clk_a";
- renesas,function = "audio_clk";
+ groups = "audio_clk_a";
+ function = "audio_clk";
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 08/26] ARM: dts: gose: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (6 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 07/26] ARM: dts: porter: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 09/26] ARM: dts: alt: " Simon Horman
` (18 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the gose device tree to use the generic
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7793-gose.dts | 40 +++++++++++++++++++-------------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index 87e89ec9dd47..c61df8b316ee 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -240,53 +240,53 @@
pinctrl-names = "default";
i2c2_pins: i2c2 {
- renesas,groups = "i2c2";
- renesas,function = "i2c2";
+ groups = "i2c2";
+ function = "i2c2";
};
du_pins: du {
- renesas,groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
- renesas,function = "du";
+ groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
+ function = "du";
};
scif0_pins: serial0 {
- renesas,groups = "scif0_data_d";
- renesas,function = "scif0";
+ groups = "scif0_data_d";
+ function = "scif0";
};
scif1_pins: serial1 {
- renesas,groups = "scif1_data_d";
- renesas,function = "scif1";
+ groups = "scif1_data_d";
+ function = "scif1";
};
scif_clk_pins: scif_clk {
- renesas,groups = "scif_clk";
- renesas,function = "scif_clk";
+ groups = "scif_clk";
+ function = "scif_clk";
};
ether_pins: ether {
- renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
- renesas,function = "eth";
+ groups = "eth_link", "eth_mdio", "eth_rmii";
+ function = "eth";
};
phy1_pins: phy1 {
- renesas,groups = "intc_irq0";
- renesas,function = "intc";
+ groups = "intc_irq0";
+ function = "intc";
};
qspi_pins: spi0 {
- renesas,groups = "qspi_ctrl", "qspi_data4";
- renesas,function = "qspi";
+ groups = "qspi_ctrl", "qspi_data4";
+ function = "qspi";
};
sound_pins: sound {
- renesas,groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
- renesas,function = "ssi";
+ groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
+ function = "ssi";
};
sound_clk_pins: sound_clk {
- renesas,groups = "audio_clk_a";
- renesas,function = "audio_clk";
+ groups = "audio_clk_a";
+ function = "audio_clk";
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 09/26] ARM: dts: alt: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (7 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 08/26] ARM: dts: gose: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 10/26] ARM: dts: silk: " Simon Horman
` (17 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the alt device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7794-alt.dts | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts
index ca9bc4fff287..383ad791f1db 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -107,38 +107,38 @@
pinctrl-names = "default";
du_pins: du {
- renesas,groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
- renesas,function = "du";
+ groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
+ function = "du";
};
scif2_pins: serial2 {
- renesas,groups = "scif2_data";
- renesas,function = "scif2";
+ groups = "scif2_data";
+ function = "scif2";
};
scif_clk_pins: scif_clk {
- renesas,groups = "scif_clk";
- renesas,function = "scif_clk";
+ groups = "scif_clk";
+ function = "scif_clk";
};
ether_pins: ether {
- renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
- renesas,function = "eth";
+ groups = "eth_link", "eth_mdio", "eth_rmii";
+ function = "eth";
};
phy1_pins: phy1 {
- renesas,groups = "intc_irq8";
- renesas,function = "intc";
+ groups = "intc_irq8";
+ function = "intc";
};
i2c1_pins: i2c1 {
- renesas,groups = "i2c1";
- renesas,function = "i2c1";
+ groups = "i2c1";
+ function = "i2c1";
};
vin0_pins: vin0 {
- renesas,groups = "vin0_data8", "vin0_clk";
- renesas,function = "vin0";
+ groups = "vin0_data8", "vin0_clk";
+ function = "vin0";
};
};
@@ -148,8 +148,8 @@
&pfc {
qspi_pins: spi0 {
- renesas,groups = "qspi_ctrl", "qspi_data4";
- renesas,function = "qspi";
+ groups = "qspi_ctrl", "qspi_data4";
+ function = "qspi";
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 10/26] ARM: dts: silk: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (8 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 09/26] ARM: dts: alt: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 11/26] ARM: dts: kzm9g: " Simon Horman
` (16 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the silk device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7794-silk.dts | 44 +++++++++++++++++++-------------------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts
index 66f077a3ca41..56d98d5b2185 100644
--- a/arch/arm/boot/dts/r8a7794-silk.dts
+++ b/arch/arm/boot/dts/r8a7794-silk.dts
@@ -130,58 +130,58 @@
pinctrl-names = "default";
scif2_pins: serial2 {
- renesas,groups = "scif2_data";
- renesas,function = "scif2";
+ groups = "scif2_data";
+ function = "scif2";
};
scif_clk_pins: scif_clk {
- renesas,groups = "scif_clk";
- renesas,function = "scif_clk";
+ groups = "scif_clk";
+ function = "scif_clk";
};
ether_pins: ether {
- renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
- renesas,function = "eth";
+ groups = "eth_link", "eth_mdio", "eth_rmii";
+ function = "eth";
};
phy1_pins: phy1 {
- renesas,groups = "intc_irq8";
- renesas,function = "intc";
+ groups = "intc_irq8";
+ function = "intc";
};
i2c1_pins: i2c1 {
- renesas,groups = "i2c1";
- renesas,function = "i2c1";
+ groups = "i2c1";
+ function = "i2c1";
};
mmcif0_pins: mmcif0 {
- renesas,groups = "mmc_data8", "mmc_ctrl";
- renesas,function = "mmc";
+ groups = "mmc_data8", "mmc_ctrl";
+ function = "mmc";
};
sdhi1_pins: sd1 {
- renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
- renesas,function = "sdhi1";
+ groups = "sdhi1_data4", "sdhi1_ctrl";
+ function = "sdhi1";
};
qspi_pins: spi0 {
- renesas,groups = "qspi_ctrl", "qspi_data4";
- renesas,function = "qspi";
+ groups = "qspi_ctrl", "qspi_data4";
+ function = "qspi";
};
vin0_pins: vin0 {
- renesas,groups = "vin0_data8", "vin0_clk";
- renesas,function = "vin0";
+ groups = "vin0_data8", "vin0_clk";
+ function = "vin0";
};
usb0_pins: usb0 {
- renesas,groups = "usb0";
- renesas,function = "usb0";
+ groups = "usb0";
+ function = "usb0";
};
usb1_pins: usb1 {
- renesas,groups = "usb1";
- renesas,function = "usb1";
+ groups = "usb1";
+ function = "usb1";
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 11/26] ARM: dts: kzm9g: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (9 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 10/26] ARM: dts: silk: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 12/26] ARM: dts: kzm9d: " Simon Horman
` (15 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the kzm9g device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/sh73a0-kzm9g.dts | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts
index aa8bae3b8fcf..e40a2f23b6cd 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts
@@ -329,41 +329,41 @@
&pfc {
i2c3_pins: i2c3 {
- renesas,groups = "i2c3_1";
- renesas,function = "i2c3";
+ groups = "i2c3_1";
+ function = "i2c3";
};
mmcif_pins: mmc {
mux {
- renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
- renesas,function = "mmc0";
+ groups = "mmc0_data8_0", "mmc0_ctrl_0";
+ function = "mmc0";
};
cfg {
- renesas,groups = "mmc0_data8_0";
- renesas,pins = "PORT279";
+ groups = "mmc0_data8_0";
+ pins = "PORT279";
bias-pull-up;
};
};
scifa4_pins: serial4 {
- renesas,groups = "scifa4_data", "scifa4_ctrl";
- renesas,function = "scifa4";
+ groups = "scifa4_data", "scifa4_ctrl";
+ function = "scifa4";
};
sdhi0_pins: sd0 {
- renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
- renesas,function = "sdhi0";
+ groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
+ function = "sdhi0";
};
sdhi2_pins: sd2 {
- renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
- renesas,function = "sdhi2";
+ groups = "sdhi2_data4", "sdhi2_ctrl";
+ function = "sdhi2";
};
fsia_pins: sounda {
- renesas,groups = "fsia_mclk_in", "fsia_sclk_in",
- "fsia_data_in", "fsia_data_out";
- renesas,function = "fsia";
+ groups = "fsia_mclk_in", "fsia_sclk_in",
+ "fsia_data_in", "fsia_data_out";
+ function = "fsia";
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 12/26] ARM: dts: kzm9d: use generic pinctrl properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (10 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 11/26] ARM: dts: kzm9g: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 13/26] ARM: dts: r8a7790: Remove unnecessary clock-output-names properties Simon Horman
` (14 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.
This patch updates the kzm9d device tree to use the generic properties.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/emev2-kzm9d.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
index 8c24975e8f9d..a35b851e1cd7 100644
--- a/arch/arm/boot/dts/emev2-kzm9d.dts
+++ b/arch/arm/boot/dts/emev2-kzm9d.dts
@@ -105,8 +105,8 @@
&pfc {
uart1_pins: serial at e1030000 {
- renesas,groups = "uart1_ctrl", "uart1_data";
- renesas,function = "uart1";
+ groups = "uart1_ctrl", "uart1_data";
+ function = "uart1";
};
};
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 13/26] ARM: dts: r8a7790: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (11 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 12/26] ARM: dts: kzm9d: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 14/26] ARM: dts: r7s72100: " Simon Horman
` (13 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node.
Accordingly, remove the unnecessary clock-output-names properties and
as necessary the nodes.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7790.dtsi | 88 ++++++++++++++----------------------------
1 file changed, 28 insertions(+), 60 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 38b706399a6b..283698fc0fea 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -1003,20 +1003,18 @@
ranges;
/* External root clock */
- extal_clk: extal_clk {
+ extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overriden by the board. */
clock-frequency = <0>;
- clock-output-names = "extal";
};
/* External PCIe clock - can be overridden by the board */
- pcie_bus_clk: pcie_bus_clk {
+ pcie_bus_clk: pcie_bus {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
- clock-output-names = "pcie_bus";
status = "disabled";
};
@@ -1028,19 +1026,16 @@
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_a";
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_b";
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_c";
};
/* External SCIF clock */
@@ -1053,11 +1048,10 @@
};
/* External USB clock - can be overridden by the board */
- usb_extal_clk: usb_extal_clk {
+ usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
- clock-output-names = "usb_extal";
};
/* External CAN clock */
@@ -1066,7 +1060,6 @@
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
- clock-output-names = "can_clk";
status = "disabled";
};
@@ -1084,201 +1077,176 @@
};
/* Variable factor clocks */
- sd2_clk: sd2_clk at e6150078 {
+ sd2_clk: sd2 at e6150078 {
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150078 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "sd2";
};
- sd3_clk: sd3_clk at e615026c {
+ sd3_clk: sd3 at e615026c {
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615026c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "sd3";
};
- mmc0_clk: mmc0_clk at e6150240 {
+ mmc0_clk: mmc0 at e6150240 {
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150240 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "mmc0";
};
- mmc1_clk: mmc1_clk at e6150244 {
+ mmc1_clk: mmc1 at e6150244 {
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150244 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "mmc1";
};
- ssp_clk: ssp_clk at e6150248 {
+ ssp_clk: ssp at e6150248 {
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150248 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "ssp";
};
- ssprs_clk: ssprs_clk at e615024c {
+ ssprs_clk: ssprs at e615024c {
compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615024c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "ssprs";
};
/* Fixed factor clocks */
- pll1_div2_clk: pll1_div2_clk {
+ pll1_div2_clk: pll1_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "pll1_div2";
};
- z2_clk: z2_clk {
+ z2_clk: z2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "z2";
};
- zg_clk: zg_clk {
+ zg_clk: zg {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <3>;
clock-mult = <1>;
- clock-output-names = "zg";
};
- zx_clk: zx_clk {
+ zx_clk: zx {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <3>;
clock-mult = <1>;
- clock-output-names = "zx";
};
- zs_clk: zs_clk {
+ zs_clk: zs {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <6>;
clock-mult = <1>;
- clock-output-names = "zs";
};
- hp_clk: hp_clk {
+ hp_clk: hp {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <12>;
clock-mult = <1>;
- clock-output-names = "hp";
};
- i_clk: i_clk {
+ i_clk: i {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "i";
};
- b_clk: b_clk {
+ b_clk: b {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <12>;
clock-mult = <1>;
- clock-output-names = "b";
};
- p_clk: p_clk {
+ p_clk: p {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <24>;
clock-mult = <1>;
- clock-output-names = "p";
};
- cl_clk: cl_clk {
+ cl_clk: cl {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <48>;
clock-mult = <1>;
- clock-output-names = "cl";
};
- m2_clk: m2_clk {
+ m2_clk: m2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "m2";
};
- imp_clk: imp_clk {
+ imp_clk: imp {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <4>;
clock-mult = <1>;
- clock-output-names = "imp";
};
- rclk_clk: rclk_clk {
+ rclk_clk: rclk {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <(48 * 1024)>;
clock-mult = <1>;
- clock-output-names = "rclk";
};
- oscclk_clk: oscclk_clk {
+ oscclk_clk: oscclk {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <(12 * 1024)>;
clock-mult = <1>;
- clock-output-names = "oscclk";
};
- zb3_clk: zb3_clk {
+ zb3_clk: zb3 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
#clock-cells = <0>;
clock-div = <4>;
clock-mult = <1>;
- clock-output-names = "zb3";
};
- zb3d2_clk: zb3d2_clk {
+ zb3d2_clk: zb3d2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "zb3d2";
};
- ddr_clk: ddr_clk {
+ ddr_clk: ddr {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "ddr";
};
- mp_clk: mp_clk {
+ mp_clk: mp {
compatible = "fixed-factor-clock";
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-div = <15>;
clock-mult = <1>;
- clock-output-names = "mp";
};
- cp_clk: cp_clk {
+ cp_clk: cp {
compatible = "fixed-factor-clock";
clocks = <&extal_clk>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "cp";
};
/* Gate clocks */
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 14/26] ARM: dts: r7s72100: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (12 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 13/26] ARM: dts: r8a7790: Remove unnecessary clock-output-names properties Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 15/26] ARM: dts: r8a7740: " Simon Horman
` (12 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r7s72100.dtsi | 15 +++++----------
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 89e46ebef1bc..e8e2a5d71976 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -37,46 +37,41 @@
#size-cells = <1>;
/* External clocks */
- extal_clk: extal_clk {
+ extal_clk: extal {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
- clock-output-names = "extal";
};
- usb_x1_clk: usb_x1_clk {
+ usb_x1_clk: usb_x1 {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
- clock-output-names = "usb_x1";
};
/* Fixed factor clocks */
- b_clk: b_clk {
+ b_clk: b {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <3>;
- clock-output-names = "b";
};
- p1_clk: p1_clk {
+ p1_clk: p1 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <6>;
- clock-output-names = "p1";
};
- p0_clk: p0_clk {
+ p0_clk: p0 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <12>;
- clock-output-names = "p0";
};
/* Special CPG clocks */
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 15/26] ARM: dts: r8a7740: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (13 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 14/26] ARM: dts: r7s72100: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 16/26] ARM: dts: r8a7778: " Simon Horman
` (11 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7740.dtsi | 57 ++++++++++++++----------------------------
1 file changed, 19 insertions(+), 38 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 995fbda74b7a..39b2f88ad151 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -422,53 +422,45 @@
ranges;
/* External root clock */
- extalr_clk: extalr_clk {
+ extalr_clk: extalr {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
- clock-output-names = "extalr";
};
- extal1_clk: extal1_clk {
+ extal1_clk: extal1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "extal1";
};
- extal2_clk: extal2_clk {
+ extal2_clk: extal2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "extal2";
};
- dv_clk: dv_clk {
+ dv_clk: dv {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
- clock-output-names = "dv";
};
- fmsick_clk: fmsick_clk {
+ fmsick_clk: fmsick {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "fmsick";
};
- fmsock_clk: fmsock_clk {
+ fmsock_clk: fmsock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "fmsock";
};
- fsiack_clk: fsiack_clk {
+ fsiack_clk: fsiack {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "fsiack";
};
- fsibck_clk: fsibck_clk {
+ fsibck_clk: fsibck {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "fsibck";
};
/* Special CPG clocks */
@@ -486,7 +478,7 @@
};
/* Variable factor clocks (DIV6) */
- vclk1_clk: vclk1_clk at e6150008 {
+ vclk1_clk: vclk1 at e6150008 {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150008 4>;
clocks = <&pllc1_div2_clk>, <0>, <&dv_clk>,
@@ -494,9 +486,8 @@
<&extal1_div2_clk>, <&extalr_clk>, <0>,
<0>;
#clock-cells = <0>;
- clock-output-names = "vclk1";
};
- vclk2_clk: vclk2_clk at e615000c {
+ vclk2_clk: vclk2 at e615000c {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe615000c 4>;
clocks = <&pllc1_div2_clk>, <0>, <&dv_clk>,
@@ -504,77 +495,67 @@
<&extal1_div2_clk>, <&extalr_clk>, <0>,
<0>;
#clock-cells = <0>;
- clock-output-names = "vclk2";
};
- fmsi_clk: fmsi_clk at e6150010 {
+ fmsi_clk: fmsi at e6150010 {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150010 4>;
clocks = <&pllc1_div2_clk>, <&fmsick_clk>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "fmsi";
};
- fmso_clk: fmso_clk at e6150014 {
+ fmso_clk: fmso at e6150014 {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150014 4>;
clocks = <&pllc1_div2_clk>, <&fmsock_clk>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "fmso";
};
- fsia_clk: fsia_clk at e6150018 {
+ fsia_clk: fsia at e6150018 {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150018 4>;
clocks = <&pllc1_div2_clk>, <&fsiack_clk>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "fsia";
};
- sub_clk: sub_clk at e6150080 {
+ sub_clk: sub at e6150080 {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150080 4>;
clocks = <&pllc1_div2_clk>,
<&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "sub";
};
- spu_clk: spu_clk at e6150084 {
+ spu_clk: spu at e6150084 {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150084 4>;
clocks = <&pllc1_div2_clk>,
<&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "spu";
};
- vou_clk: vou_clk at e6150088 {
+ vou_clk: vou at e6150088 {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150088 4>;
clocks = <&pllc1_div2_clk>, <&extal1_clk>, <&dv_clk>,
<0>;
#clock-cells = <0>;
- clock-output-names = "vou";
};
- stpro_clk: stpro_clk at e615009c {
+ stpro_clk: stpro at e615009c {
compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe615009c 4>;
clocks = <&cpg_clocks R8A7740_CLK_PLLC0>;
#clock-cells = <0>;
- clock-output-names = "stpro";
};
/* Fixed factor clocks */
- pllc1_div2_clk: pllc1_div2_clk {
+ pllc1_div2_clk: pllc1_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7740_CLK_PLLC1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "pllc1_div2";
};
- extal1_div2_clk: extal1_div2_clk {
+ extal1_div2_clk: extal1_div2 {
compatible = "fixed-factor-clock";
clocks = <&extal1_clk>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "extal1_div2";
};
/* Gate clocks */
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 16/26] ARM: dts: r8a7778: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (14 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 15/26] ARM: dts: r8a7740: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 17/26] ARM: dts: r8a7779: " Simon Horman
` (10 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7778.dtsi | 21 ++++++---------------
1 file changed, 6 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index f83a348fc07a..99c10ebbaca2 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -443,11 +443,10 @@
ranges;
/* External input clock */
- extal_clk: extal_clk {
+ extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "extal";
};
/* External SCIF clock */
@@ -474,59 +473,51 @@
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-output-names = "audio_clk_a";
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-output-names = "audio_clk_b";
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-output-names = "audio_clk_c";
};
/* Fixed ratio clocks */
- g_clk: g_clk {
+ g_clk: g {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7778_CLK_PLLA>;
#clock-cells = <0>;
clock-div = <12>;
clock-mult = <1>;
- clock-output-names = "g";
};
- i_clk: i_clk {
+ i_clk: i {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7778_CLK_PLLA>;
#clock-cells = <0>;
clock-div = <1>;
clock-mult = <1>;
- clock-output-names = "i";
};
- s3_clk: s3_clk {
+ s3_clk: s3 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7778_CLK_PLLA>;
#clock-cells = <0>;
clock-div = <4>;
clock-mult = <1>;
- clock-output-names = "s3";
};
- s4_clk: s4_clk {
+ s4_clk: s4 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7778_CLK_PLLA>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "s4";
};
- z_clk: z_clk {
+ z_clk: z {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7778_CLK_PLLB>;
#clock-cells = <0>;
clock-div = <1>;
clock-mult = <1>;
- clock-output-names = "z";
};
/* Gate clocks */
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 17/26] ARM: dts: r8a7779: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (15 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 16/26] ARM: dts: r8a7778: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 18/26] ARM: dts: r8a7791: " Simon Horman
` (9 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7779.dtsi | 15 +++++----------
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index a0cc08e6295b..60bc1e66bba9 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -445,12 +445,11 @@
ranges;
/* External root clock */
- extal_clk: extal_clk {
+ extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overriden by the board. */
clock-frequency = <0>;
- clock-output-names = "extal";
};
/* External SCIF clock */
@@ -474,37 +473,33 @@
};
/* Fixed factor clocks */
- i_clk: i_clk {
+ i_clk: i {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7779_CLK_PLLA>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "i";
};
- s3_clk: s3_clk {
+ s3_clk: s3 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7779_CLK_PLLA>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "s3";
};
- s4_clk: s4_clk {
+ s4_clk: s4 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7779_CLK_PLLA>;
#clock-cells = <0>;
clock-div = <16>;
clock-mult = <1>;
- clock-output-names = "s4";
};
- g_clk: g_clk {
+ g_clk: g {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7779_CLK_PLLA>;
#clock-cells = <0>;
clock-div = <24>;
clock-mult = <1>;
- clock-output-names = "g";
};
/* Gate clocks */
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 18/26] ARM: dts: r8a7791: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (16 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 17/26] ARM: dts: r8a7779: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 19/26] ARM: dts: r8a7793: " Simon Horman
` (8 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791.dtsi | 79 +++++++++++++-----------------------------
1 file changed, 25 insertions(+), 54 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 6439f0569fe2..8010d935300f 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -1048,12 +1048,11 @@
ranges;
/* External root clock */
- extal_clk: extal_clk {
+ extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overriden by the board. */
clock-frequency = <0>;
- clock-output-names = "extal";
};
/*
@@ -1064,27 +1063,23 @@
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_a";
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_b";
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_c";
};
/* External PCIe clock - can be overridden by the board */
- pcie_bus_clk: pcie_bus_clk {
+ pcie_bus_clk: pcie_bus {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
- clock-output-names = "pcie_bus";
status = "disabled";
};
@@ -1098,11 +1093,10 @@
};
/* External USB clock - can be overridden by the board */
- usb_extal_clk: usb_extal_clk {
+ usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
- clock-output-names = "usb_extal";
};
/* External CAN clock */
@@ -1111,7 +1105,6 @@
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
- clock-output-names = "can_clk";
status = "disabled";
};
@@ -1129,178 +1122,156 @@
};
/* Variable factor clocks */
- sd2_clk: sd2_clk at e6150078 {
+ sd2_clk: sd2 at e6150078 {
compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150078 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "sd2";
};
- sd3_clk: sd3_clk at e615026c {
+ sd3_clk: sd3 at e615026c {
compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615026c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "sd3";
};
- mmc0_clk: mmc0_clk at e6150240 {
+ mmc0_clk: mmc0 at e6150240 {
compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150240 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "mmc0";
};
- ssp_clk: ssp_clk at e6150248 {
+ ssp_clk: ssp at e6150248 {
compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150248 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "ssp";
};
- ssprs_clk: ssprs_clk at e615024c {
+ ssprs_clk: ssprs at e615024c {
compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615024c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "ssprs";
};
/* Fixed factor clocks */
- pll1_div2_clk: pll1_div2_clk {
+ pll1_div2_clk: pll1_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "pll1_div2";
};
- zg_clk: zg_clk {
+ zg_clk: zg {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <3>;
clock-mult = <1>;
- clock-output-names = "zg";
};
- zx_clk: zx_clk {
+ zx_clk: zx {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <3>;
clock-mult = <1>;
- clock-output-names = "zx";
};
- zs_clk: zs_clk {
+ zs_clk: zs {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <6>;
clock-mult = <1>;
- clock-output-names = "zs";
};
- hp_clk: hp_clk {
+ hp_clk: hp {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <12>;
clock-mult = <1>;
- clock-output-names = "hp";
};
- i_clk: i_clk {
+ i_clk: i {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "i";
};
- b_clk: b_clk {
+ b_clk: b {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <12>;
clock-mult = <1>;
- clock-output-names = "b";
};
- p_clk: p_clk {
+ p_clk: p {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <24>;
clock-mult = <1>;
- clock-output-names = "p";
};
- cl_clk: cl_clk {
+ cl_clk: cl {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <48>;
clock-mult = <1>;
- clock-output-names = "cl";
};
- m2_clk: m2_clk {
+ m2_clk: m2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "m2";
};
- rclk_clk: rclk_clk {
+ rclk_clk: rclk {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <(48 * 1024)>;
clock-mult = <1>;
- clock-output-names = "rclk";
};
- oscclk_clk: oscclk_clk {
+ oscclk_clk: oscclk {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <(12 * 1024)>;
clock-mult = <1>;
- clock-output-names = "oscclk";
};
- zb3_clk: zb3_clk {
+ zb3_clk: zb3 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
#clock-cells = <0>;
clock-div = <4>;
clock-mult = <1>;
- clock-output-names = "zb3";
};
- zb3d2_clk: zb3d2_clk {
+ zb3d2_clk: zb3d2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "zb3d2";
};
- ddr_clk: ddr_clk {
+ ddr_clk: ddr {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "ddr";
};
- mp_clk: mp_clk {
+ mp_clk: mp {
compatible = "fixed-factor-clock";
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-div = <15>;
clock-mult = <1>;
- clock-output-names = "mp";
};
- cp_clk: cp_clk {
+ cp_clk: cp {
compatible = "fixed-factor-clock";
clocks = <&extal_clk>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "cp";
};
/* Gate clocks */
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 19/26] ARM: dts: r8a7793: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (17 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 18/26] ARM: dts: r8a7791: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 20/26] ARM: dts: r8a7794: " Simon Horman
` (7 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7793.dtsi | 45 +++++++++++++-----------------------------
1 file changed, 14 insertions(+), 31 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index b48215945241..95bbed95b0c1 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -812,12 +812,11 @@
ranges;
/* External root clock */
- extal_clk: extal_clk {
+ extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
- clock-output-names = "extal";
};
/*
@@ -828,19 +827,16 @@
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_a";
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_b";
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "audio_clk_c";
};
/* External SCIF clock */
@@ -866,111 +862,98 @@
};
/* Variable factor clocks */
- sd2_clk: sd2_clk at e6150078 {
+ sd2_clk: sd2 at e6150078 {
compatible = "renesas,r8a7793-div6-clock",
"renesas,cpg-div6-clock";
reg = <0 0xe6150078 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "sd2";
};
- sd3_clk: sd3_clk at e615026c {
+ sd3_clk: sd3 at e615026c {
compatible = "renesas,r8a7793-div6-clock",
"renesas,cpg-div6-clock";
reg = <0 0xe615026c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "sd3";
};
- mmc0_clk: mmc0_clk at e6150240 {
+ mmc0_clk: mmc0 at e6150240 {
compatible = "renesas,r8a7793-div6-clock",
"renesas,cpg-div6-clock";
reg = <0 0xe6150240 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "mmc0";
};
/* Fixed factor clocks */
- pll1_div2_clk: pll1_div2_clk {
+ pll1_div2_clk: pll1_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "pll1_div2";
};
- zg_clk: zg_clk {
+ zg_clk: zg {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <5>;
clock-mult = <1>;
- clock-output-names = "zg";
};
- zx_clk: zx_clk {
+ zx_clk: zx {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <3>;
clock-mult = <1>;
- clock-output-names = "zx";
};
- zs_clk: zs_clk {
+ zs_clk: zs {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <6>;
clock-mult = <1>;
- clock-output-names = "zs";
};
- hp_clk: hp_clk {
+ hp_clk: hp {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <12>;
clock-mult = <1>;
- clock-output-names = "hp";
};
- p_clk: p_clk {
+ p_clk: p {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <24>;
clock-mult = <1>;
- clock-output-names = "p";
};
- m2_clk: m2_clk {
+ m2_clk: m2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "m2";
};
- rclk_clk: rclk_clk {
+ rclk_clk: rclk {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7793_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <(48 * 1024)>;
clock-mult = <1>;
- clock-output-names = "rclk";
};
- mp_clk: mp_clk {
+ mp_clk: mp {
compatible = "fixed-factor-clock";
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-div = <15>;
clock-mult = <1>;
- clock-output-names = "mp";
};
- cp_clk: cp_clk {
+ cp_clk: cp {
compatible = "fixed-factor-clock";
clocks = <&extal_clk>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "cp";
};
/* Gate clocks */
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 20/26] ARM: dts: r8a7794: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (18 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 19/26] ARM: dts: r8a7793: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 21/26] ARM: dts: gose: " Simon Horman
` (6 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7794.dtsi | 66 ++++++++++++++----------------------------
1 file changed, 22 insertions(+), 44 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index eacb2b291361..7d7d18766540 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -836,12 +836,11 @@
ranges;
/* External root clock */
- extal_clk: extal_clk {
+ extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overriden by the board. */
clock-frequency = <0>;
- clock-output-names = "extal";
};
/* External SCIF clock */
@@ -865,173 +864,152 @@
#power-domain-cells = <0>;
};
/* Variable factor clocks */
- sd2_clk: sd2_clk at e6150078 {
+ sd2_clk: sd2 at e6150078 {
compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150078 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "sd2";
};
- sd3_clk: sd3_clk at e615026c {
+ sd3_clk: sd3 at e615026c {
compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615026c 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "sd3";
};
- mmc0_clk: mmc0_clk at e6150240 {
+ mmc0_clk: mmc0 at e6150240 {
compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150240 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
- clock-output-names = "mmc0";
};
/* Fixed factor clocks */
- pll1_div2_clk: pll1_div2_clk {
+ pll1_div2_clk: pll1_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "pll1_div2";
};
- zg_clk: zg_clk {
+ zg_clk: zg {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <6>;
clock-mult = <1>;
- clock-output-names = "zg";
};
- zx_clk: zx_clk {
+ zx_clk: zx {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <3>;
clock-mult = <1>;
- clock-output-names = "zx";
};
- zs_clk: zs_clk {
+ zs_clk: zs {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <6>;
clock-mult = <1>;
- clock-output-names = "zs";
};
- hp_clk: hp_clk {
+ hp_clk: hp {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <12>;
clock-mult = <1>;
- clock-output-names = "hp";
};
- i_clk: i_clk {
+ i_clk: i {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "i";
};
- b_clk: b_clk {
+ b_clk: b {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <12>;
clock-mult = <1>;
- clock-output-names = "b";
};
- p_clk: p_clk {
+ p_clk: p {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <24>;
clock-mult = <1>;
- clock-output-names = "p";
};
- cl_clk: cl_clk {
+ cl_clk: cl {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <48>;
clock-mult = <1>;
- clock-output-names = "cl";
};
- m2_clk: m2_clk {
+ m2_clk: m2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "m2";
};
- rclk_clk: rclk_clk {
+ rclk_clk: rclk {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <(48 * 1024)>;
clock-mult = <1>;
- clock-output-names = "rclk";
};
- oscclk_clk: oscclk_clk {
+ oscclk_clk: oscclk {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <(12 * 1024)>;
clock-mult = <1>;
- clock-output-names = "oscclk";
};
- zb3_clk: zb3_clk {
+ zb3_clk: zb3 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
#clock-cells = <0>;
clock-div = <4>;
clock-mult = <1>;
- clock-output-names = "zb3";
};
- zb3d2_clk: zb3d2_clk {
+ zb3d2_clk: zb3d2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "zb3d2";
};
- ddr_clk: ddr_clk {
+ ddr_clk: ddr {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL3>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
- clock-output-names = "ddr";
};
- mp_clk: mp_clk {
+ mp_clk: mp {
compatible = "fixed-factor-clock";
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-div = <15>;
clock-mult = <1>;
- clock-output-names = "mp";
};
- cp_clk: cp_clk {
+ cp_clk: cp {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7794_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <48>;
clock-mult = <1>;
- clock-output-names = "cp";
};
- acp_clk: acp_clk {
+ acp_clk: acp {
compatible = "fixed-factor-clock";
clocks = <&extal_clk>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "acp";
};
/* Gate clocks */
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 21/26] ARM: dts: gose: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (19 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 20/26] ARM: dts: r8a7794: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 22/26] ARM: dts: koelsch: " Simon Horman
` (5 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7793-gose.dts | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7793-gose.dts b/arch/arm/boot/dts/r8a7793-gose.dts
index c61df8b316ee..3cd1c804621f 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -158,11 +158,10 @@
};
};
- audio_clock: clock {
+ audio_clock: audio_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
- clock-output-names = "audio_clock";
};
rsnd_ak4643: sound {
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 22/26] ARM: dts: koelsch: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (20 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 21/26] ARM: dts: gose: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 23/26] ARM: dts: porter: " Simon Horman
` (4 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index c6b43c85a0b1..1adf8770db7e 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -242,11 +242,10 @@
1800000 0>;
};
- audio_clock: clock {
+ audio_clock: audio_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
- clock-output-names = "audio_clock";
};
rsnd_ak4643: sound {
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 23/26] ARM: dts: porter: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (21 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 22/26] ARM: dts: koelsch: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 24/26] ARM: dts: lager: " Simon Horman
` (3 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7791-porter.dts | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index af3751ff519a..9554d13362f6 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -113,11 +113,10 @@
clock-frequency = <74250000>;
};
- x14_clk: x14-clock {
+ x14_clk: audio_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
- clock-output-names = "audio_clock";
};
sound {
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 24/26] ARM: dts: lager: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (22 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 23/26] ARM: dts: porter: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 25/26] ARM: dts: r8a73a4: " Simon Horman
` (2 subsequent siblings)
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a7790-lager.dts | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index a5828721ab7c..823a119cb1b4 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -176,11 +176,10 @@
1800000 0>;
};
- audio_clock: clock {
+ audio_clock: audio_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <11289600>;
- clock-output-names = "audio_clock";
};
rsnd_ak4643: sound {
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 25/26] ARM: dts: r8a73a4: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (23 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 24/26] ARM: dts: lager: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-04 1:22 ` [PATCH 26/26] ARM: dts: sh73a0: " Simon Horman
2016-04-13 19:16 ` [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Olof Johansson
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
The clock-output-names property is left in place for the zb_clk which is
thus treated as a special case as the MSTP clock driver (clk-mstp.c)
explicitly looks for a clock with node name zb_clk for the r8a73a4 and
sh73a0 SoCs.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/r8a73a4.dtsi | 75 ++++++++++++++----------------------------
1 file changed, 25 insertions(+), 50 deletions(-)
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 6583a1dfca1f..6954912a3753 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -486,37 +486,32 @@
ranges;
/* External root clocks */
- extalr_clk: extalr_clk {
+ extalr_clk: extalr {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
- clock-output-names = "extalr";
};
- extal1_clk: extal1_clk {
+ extal1_clk: extal1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
- clock-output-names = "extal1";
};
- extal2_clk: extal2_clk {
+ extal2_clk: extal2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
- clock-output-names = "extal2";
};
- fsiack_clk: fsiack_clk {
+ fsiack_clk: fsiack {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
- clock-output-names = "fsiack";
};
- fsibck_clk: fsibck_clk {
+ fsibck_clk: fsibck {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
- clock-output-names = "fsibck";
};
/* Special CPG clocks */
@@ -540,171 +535,151 @@
#clock-cells = <0>;
clock-output-names = "zb";
};
- sdhi0_clk: sdhi0_clk at e6150074 {
+ sdhi0_clk: sdhi0ck at e6150074 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150074 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<0>, <&extal2_clk>;
#clock-cells = <0>;
- clock-output-names = "sdhi0ck";
};
- sdhi1_clk: sdhi1_clk at e6150078 {
+ sdhi1_clk: sdhi1ck at e6150078 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150078 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<0>, <&extal2_clk>;
#clock-cells = <0>;
- clock-output-names = "sdhi1ck";
};
- sdhi2_clk: sdhi2_clk at e615007c {
+ sdhi2_clk: sdhi2ck at e615007c {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615007c 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<0>, <&extal2_clk>;
#clock-cells = <0>;
- clock-output-names = "sdhi2ck";
};
- mmc0_clk: mmc0_clk at e6150240 {
+ mmc0_clk: mmc0 at e6150240 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150240 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<0>, <&extal2_clk>;
#clock-cells = <0>;
- clock-output-names = "mmc0";
};
- mmc1_clk: mmc1_clk at e6150244 {
+ mmc1_clk: mmc1 at e6150244 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150244 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<0>, <&extal2_clk>;
#clock-cells = <0>;
- clock-output-names = "mmc1";
};
- vclk1_clk: vclk1_clk at e6150008 {
+ vclk1_clk: vclk1 at e6150008 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150008 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<0>, <&extal2_clk>, <&main_div2_clk>,
<&extalr_clk>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "vclk1";
};
- vclk2_clk: vclk2_clk at e615000c {
+ vclk2_clk: vclk2 at e615000c {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615000c 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<0>, <&extal2_clk>, <&main_div2_clk>,
<&extalr_clk>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "vclk2";
};
- vclk3_clk: vclk3_clk at e615001c {
+ vclk3_clk: vclk3 at e615001c {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615001c 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<0>, <&extal2_clk>, <&main_div2_clk>,
<&extalr_clk>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "vclk3";
};
- vclk4_clk: vclk4_clk at e6150014 {
+ vclk4_clk: vclk4 at e6150014 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150014 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<0>, <&extal2_clk>, <&main_div2_clk>,
<&extalr_clk>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "vclk4";
};
- vclk5_clk: vclk5_clk at e6150034 {
+ vclk5_clk: vclk5 at e6150034 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150034 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<0>, <&extal2_clk>, <&main_div2_clk>,
<&extalr_clk>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "vclk5";
};
- fsia_clk: fsia_clk at e6150018 {
+ fsia_clk: fsia at e6150018 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150018 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<&fsiack_clk>, <0>;
#clock-cells = <0>;
- clock-output-names = "fsia";
};
- fsib_clk: fsib_clk at e6150090 {
+ fsib_clk: fsib at e6150090 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150090 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<&fsibck_clk>, <0>;
#clock-cells = <0>;
- clock-output-names = "fsib";
};
- mp_clk: mp_clk at e6150080 {
+ mp_clk: mp at e6150080 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150080 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<&extal2_clk>, <&extal2_clk>;
#clock-cells = <0>;
- clock-output-names = "mp";
};
- m4_clk: m4_clk at e6150098 {
+ m4_clk: m4 at e6150098 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150098 0 4>;
clocks = <&cpg_clocks R8A73A4_CLK_PLL2S>;
#clock-cells = <0>;
- clock-output-names = "m4";
};
- hsi_clk: hsi_clk at e615026c {
+ hsi_clk: hsi at e615026c {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe615026c 0 4>;
clocks = <&cpg_clocks R8A73A4_CLK_PLL2H>, <&pll1_div2_clk>,
<&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
#clock-cells = <0>;
- clock-output-names = "hsi";
};
- spuv_clk: spuv_clk at e6150094 {
+ spuv_clk: spuv at e6150094 {
compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150094 0 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
<&extal2_clk>, <&extal2_clk>;
#clock-cells = <0>;
- clock-output-names = "spuv";
};
/* Fixed factor clocks */
- main_div2_clk: main_div2_clk {
+ main_div2_clk: main_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A73A4_CLK_MAIN>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "main_div2";
};
- pll0_div2_clk: pll0_div2_clk {
+ pll0_div2_clk: pll0_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A73A4_CLK_PLL0>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "pll0_div2";
};
- pll1_div2_clk: pll1_div2_clk {
+ pll1_div2_clk: pll1_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A73A4_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "pll1_div2";
};
- extal1_div2_clk: extal1_div2_clk {
+ extal1_div2_clk: extal1_div2 {
compatible = "fixed-factor-clock";
clocks = <&extal1_clk>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "extal1_div2";
};
/* Gate clocks */
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH 26/26] ARM: dts: sh73a0: Remove unnecessary clock-output-names properties
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (24 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 25/26] ARM: dts: r8a73a4: " Simon Horman
@ 2016-04-04 1:22 ` Simon Horman
2016-04-13 19:16 ` [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Olof Johansson
26 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-04 1:22 UTC (permalink / raw)
To: linux-arm-kernel
* Fixed rate and fixed factor clocks do not require an
clock-output-names property.
* Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names
optional") Renesas div6 clocks do not require a clock-output-names
property.
In the above cases there is only one clock output and its name is taken
from that of the clock node. Accordingly, remove the unnecessary
clock-output-names properties and as necessary update the node names.
The clock-output-names property is left in place for the zb_clk which is
thus treated as a special case as the MSTP clock driver (clk-mstp.c)
explicitly looks for a clock with node name zb_clk for the r8a73a4 and
sh73a0 SoCs.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm/boot/dts/sh73a0.dtsi | 87 +++++++++++++++----------------------------
1 file changed, 29 insertions(+), 58 deletions(-)
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index bf825ca4f6f7..639ea2d76970 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -602,39 +602,33 @@
ranges;
/* External root clocks */
- extalr_clk: extalr_clk {
+ extalr_clk: extalr {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
- clock-output-names = "extalr";
};
- extal1_clk: extal1_clk {
+ extal1_clk: extal1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
- clock-output-names = "extal1";
};
- extal2_clk: extal2_clk {
+ extal2_clk: extal2 {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-output-names = "extal2";
};
- extcki_clk: extcki_clk {
+ extcki_clk: extcki {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-output-names = "extcki";
};
- fsiack_clk: fsiack_clk {
+ fsiack_clk: fsiack {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "fsiack";
};
- fsibck_clk: fsibck_clk {
+ fsibck_clk: fsibck {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
- clock-output-names = "fsibck";
};
/* Special CPG clocks */
@@ -650,7 +644,7 @@
};
/* Variable factor clocks (DIV6) */
- vclk1_clk: vclk1_clk at e6150008 {
+ vclk1_clk: vclk1 at e6150008 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150008 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
@@ -658,9 +652,8 @@
<&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
<0>;
#clock-cells = <0>;
- clock-output-names = "vclk1";
};
- vclk2_clk: vclk2_clk at e615000c {
+ vclk2_clk: vclk2 at e615000c {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe615000c 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
@@ -668,9 +661,8 @@
<&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
<0>;
#clock-cells = <0>;
- clock-output-names = "vclk2";
};
- vclk3_clk: vclk3_clk at e615001c {
+ vclk3_clk: vclk3 at e615001c {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe615001c 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
@@ -678,7 +670,6 @@
<&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
<0>;
#clock-cells = <0>;
- clock-output-names = "vclk3";
};
zb_clk: zb_clk at e6150010 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
@@ -688,168 +679,148 @@
#clock-cells = <0>;
clock-output-names = "zb";
};
- flctl_clk: flctl_clk at e6150014 {
+ flctl_clk: flctlck at e6150014 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150014 4>;
clocks = <&pll1_div2_clk>, <0>,
<&cpg_clocks SH73A0_CLK_PLL2>, <0>;
#clock-cells = <0>;
- clock-output-names = "flctlck";
};
- sdhi0_clk: sdhi0_clk at e6150074 {
+ sdhi0_clk: sdhi0ck at e6150074 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150074 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
<&pll1_div13_clk>, <0>;
#clock-cells = <0>;
- clock-output-names = "sdhi0ck";
};
- sdhi1_clk: sdhi1_clk at e6150078 {
+ sdhi1_clk: sdhi1ck at e6150078 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150078 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
<&pll1_div13_clk>, <0>;
#clock-cells = <0>;
- clock-output-names = "sdhi1ck";
};
- sdhi2_clk: sdhi2_clk at e615007c {
+ sdhi2_clk: sdhi2ck at e615007c {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe615007c 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
<&pll1_div13_clk>, <0>;
#clock-cells = <0>;
- clock-output-names = "sdhi2ck";
};
- fsia_clk: fsia_clk at e6150018 {
+ fsia_clk: fsia at e6150018 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150018 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
<&fsiack_clk>, <&fsiack_clk>;
#clock-cells = <0>;
- clock-output-names = "fsia";
};
- fsib_clk: fsib_clk at e6150090 {
+ fsib_clk: fsib at e6150090 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150090 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
<&fsibck_clk>, <&fsibck_clk>;
#clock-cells = <0>;
- clock-output-names = "fsib";
};
- sub_clk: sub_clk at e6150080 {
+ sub_clk: sub at e6150080 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150080 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
<&extal2_clk>, <&extal2_clk>;
#clock-cells = <0>;
- clock-output-names = "sub";
};
- spua_clk: spua_clk at e6150084 {
+ spua_clk: spua at e6150084 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150084 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
<&extal2_clk>, <&extal2_clk>;
#clock-cells = <0>;
- clock-output-names = "spua";
};
- spuv_clk: spuv_clk at e6150094 {
+ spuv_clk: spuv at e6150094 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150094 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
<&extal2_clk>, <&extal2_clk>;
#clock-cells = <0>;
- clock-output-names = "spuv";
};
- msu_clk: msu_clk at e6150088 {
+ msu_clk: msu at e6150088 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150088 4>;
clocks = <&pll1_div2_clk>, <0>,
<&cpg_clocks SH73A0_CLK_PLL2>, <0>;
#clock-cells = <0>;
- clock-output-names = "msu";
};
- hsi_clk: hsi_clk at e615008c {
+ hsi_clk: hsi at e615008c {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe615008c 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
<&pll1_div7_clk>, <0>;
#clock-cells = <0>;
- clock-output-names = "hsi";
};
- mfg1_clk: mfg1_clk at e6150098 {
+ mfg1_clk: mfg1 at e6150098 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150098 4>;
clocks = <&pll1_div2_clk>, <0>,
<&cpg_clocks SH73A0_CLK_PLL2>, <0>;
#clock-cells = <0>;
- clock-output-names = "mfg1";
};
- mfg2_clk: mfg2_clk at e615009c {
+ mfg2_clk: mfg2 at e615009c {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe615009c 4>;
clocks = <&pll1_div2_clk>, <0>,
<&cpg_clocks SH73A0_CLK_PLL2>, <0>;
#clock-cells = <0>;
- clock-output-names = "mfg2";
};
- dsit_clk: dsit_clk at e6150060 {
+ dsit_clk: dsit at e6150060 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150060 4>;
clocks = <&pll1_div2_clk>, <0>,
<&cpg_clocks SH73A0_CLK_PLL2>, <0>;
#clock-cells = <0>;
- clock-output-names = "dsit";
};
- dsi0p_clk: dsi0p_clk at e6150064 {
+ dsi0p_clk: dsi0pck at e6150064 {
compatible = "renesas,sh73a0-div6-clock", "renesas,cpg-div6-clock";
reg = <0xe6150064 4>;
clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
<&cpg_clocks SH73A0_CLK_MAIN>, <&extal2_clk>,
<&extcki_clk>, <0>, <0>, <0>;
#clock-cells = <0>;
- clock-output-names = "dsi0pck";
};
/* Fixed factor clocks */
- main_div2_clk: main_div2_clk {
+ main_div2_clk: main_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks SH73A0_CLK_MAIN>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "main_div2";
};
- pll1_div2_clk: pll1_div2_clk {
+ pll1_div2_clk: pll1_div2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks SH73A0_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <2>;
clock-mult = <1>;
- clock-output-names = "pll1_div2";
};
- pll1_div7_clk: pll1_div7_clk {
+ pll1_div7_clk: pll1_div7 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks SH73A0_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <7>;
clock-mult = <1>;
- clock-output-names = "pll1_div7";
};
- pll1_div13_clk: pll1_div13_clk {
+ pll1_div13_clk: pll1_div13 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks SH73A0_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <13>;
clock-mult = <1>;
- clock-output-names = "pll1_div13";
};
- twd_clk: twd_clk {
+ twd_clk: twd {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks SH73A0_CLK_Z>;
#clock-cells = <0>;
clock-div = <4>;
clock-mult = <1>;
- clock-output-names = "twd";
};
/* Gate clocks */
--
2.1.4
^ permalink raw reply related [flat|nested] 29+ messages in thread* [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7
2016-04-04 1:22 [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Simon Horman
` (25 preceding siblings ...)
2016-04-04 1:22 ` [PATCH 26/26] ARM: dts: sh73a0: " Simon Horman
@ 2016-04-13 19:16 ` Olof Johansson
2016-04-14 0:12 ` Simon Horman
26 siblings, 1 reply; 29+ messages in thread
From: Olof Johansson @ 2016-04-13 19:16 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Apr 04, 2016 at 10:22:33AM +0900, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC cleanup for v4.7.
>
>
> The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
>
> Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-cleanup-for-v4.7
>
> for you to fetch changes up to 000025cfbb9e8bafd0a1fa84d8d83526d24bde42:
>
> ARM: dts: sh73a0: Remove unnecessary clock-output-names properties (2016-03-28 08:56:11 +0900)
>
> ----------------------------------------------------------------
> Renesas ARM Based SoC Cleanup for v4.7
>
> * Remove unnecessary clock-output-names properties from DT
> * Use generic pinctrl properties in DT
Hi,
Ok, so this is the second cleanup-labelled branch from you. I'm OK with these
being split out, but we normally don't merge dt changes in the cleanup branch,
we group them with other DT changes. So I've merged this into next/dt.
If you want to separate out dt cleanups, I'm OK with that. Just don't mix
DT and non-DT cleanups in those branches in the future, so I can still choose
to merge into next/dt.
-Olof
^ permalink raw reply [flat|nested] 29+ messages in thread* [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7
2016-04-13 19:16 ` [GIT PULL] Renesas ARM Based SoC Cleanup for v4.7 Olof Johansson
@ 2016-04-14 0:12 ` Simon Horman
0 siblings, 0 replies; 29+ messages in thread
From: Simon Horman @ 2016-04-14 0:12 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Apr 13, 2016 at 12:16:45PM -0700, Olof Johansson wrote:
> On Mon, Apr 04, 2016 at 10:22:33AM +0900, Simon Horman wrote:
> > Hi Olof, Hi Kevin, Hi Arnd,
> >
> > Please consider these Renesas ARM based SoC cleanup for v4.7.
> >
> >
> > The following changes since commit f55532a0c0b8bb6148f4e07853b876ef73bc69ca:
> >
> > Linux 4.6-rc1 (2016-03-26 16:03:24 -0700)
> >
> > are available in the git repository at:
> >
> > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-cleanup-for-v4.7
> >
> > for you to fetch changes up to 000025cfbb9e8bafd0a1fa84d8d83526d24bde42:
> >
> > ARM: dts: sh73a0: Remove unnecessary clock-output-names properties (2016-03-28 08:56:11 +0900)
> >
> > ----------------------------------------------------------------
> > Renesas ARM Based SoC Cleanup for v4.7
> >
> > * Remove unnecessary clock-output-names properties from DT
> > * Use generic pinctrl properties in DT
>
> Hi,
>
> Ok, so this is the second cleanup-labelled branch from you. I'm OK with these
> being split out, but we normally don't merge dt changes in the cleanup branch,
> we group them with other DT changes. So I've merged this into next/dt.
>
> If you want to separate out dt cleanups, I'm OK with that. Just don't mix
> DT and non-DT cleanups in those branches in the future, so I can still choose
> to merge into next/dt.
Thanks, understood.
^ permalink raw reply [flat|nested] 29+ messages in thread