[PATCH 0/9] thermal: rockchip: Support rk3366/rk3399 SoCS and fixes the driver

[PATCH 0/9] thermal: rockchip: Support rk3366/rk3399 SoCS and fixes the driver

[Caesar Wang]

Hello Eduardo, Heiko
This series pacthes to support the rk3366/rk3399 SoCs thermal, and fixes the driver.

65ae684 thermal: rockchip: disable thermal->clk in err case
31e6d69 thermal: rockchip: fixes the code_to_temp for tsadc driver
6e2d6fb thermal: rockchip: update the tsadc table for rk3399
49f6ccf thermal: rockchip: handle the power sequence for tsadc controller
9f8bd52 thermal: rockchip: Support RK3366 SoCs in the thermal driver
a959e42 thermal: rockchip: add the notes for better reading
e5cbc6a thermal: of: Add support for hardware-tracked trip points
7f613e4 thermal: rockchip: add the set_trips function
94cc571 arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi

Verified on url =
https://github.com/Caesar-github/rockchip/commits/wip/fixes-rockchip-thermal-20160418
Based on linux-next kernel for 20160415

Verified on rk3288/rk3366/rk3399 SoCs with rockchip inside kernel(develop4.4).

The rk3399 dtsi has benn sent on https://patchwork.kernel.org/patch/8462441/.
The dts thermal will be updated in later.

---



Caesar Wang (6):
  thermal: rockchip: fixes the code_to_temp for tsadc driver
  thermal: rockchip: update the tsadc table for rk3399
  thermal: rockchip: handle the power sequence for tsadc controller
  thermal: rockchip: add the notes for better reading
  thermal: rockchip: add the set_trips function
  arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi

Elaine Zhang (1):
  thermal: rockchip: Support RK3366 SoCs in the thermal driver

Mikko Perttunen (1):
  thermal: of: Add support for hardware-tracked trip points

Shawn Lin (1):
  thermal: rockchip: disable thermal->clk in err case

 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi | 112 ---------
 arch/arm64/boot/dts/rockchip/rk3368.dtsi         |  66 ++++-
 drivers/thermal/of-thermal.c                     |  82 +++++-
 drivers/thermal/rockchip_thermal.c               | 302 ++++++++++++++++++-----
 include/linux/thermal.h                          |   2 +
 5 files changed, 388 insertions(+), 176 deletions(-)
 delete mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

-- 
1.9.1

[PATCH 1/9] thermal: rockchip: disable thermal->clk in err case

[Caesar Wang]

From: Shawn Lin <shawn.lin@rock-chips.com>

Disable thermal->clk when enabling pclk fails in
resume routine.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 drivers/thermal/rockchip_thermal.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 1dbd862..f4c4bcd 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -979,8 +979,10 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 		return error;
 
 	error = clk_enable(thermal->pclk);
-	if (error)
+	if (error) {
+		clk_disable(thermal->clk);
 		return error;
+	}
 
 	rockchip_thermal_reset_controller(thermal->reset);
 
-- 
1.9.1

[PATCH 2/9] thermal: rockchip: fixes the code_to_temp for tsadc driver

[Caesar Wang]

We should judge the table.id[mid].code insearch algorithm on matter the
adc value increment or decrement.

Or otherwise, the temperature return the incorrect value in some cases.
[    1.438589] adc_val=402,temp=-40000
[    1.438903] adc_val=403,temp=-39375
[    1.439217] adc_val=404,temp=-38750
...
[    1.441102] adc_val=410,temp=-40000
[    1.441416] adc_val=411,temp=-34445
[    1.441737] adc_val=412,temp=-33889
...

Let's fix it right now.

Fixes commit 020ba95dbbbe ("thermal: rockchip:
Add the sort mode for adc value increment or decrement").

Reported-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
---

 drivers/thermal/rockchip_thermal.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index f4c4bcd..658772f 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -405,8 +405,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 			return -EAGAIN;		/* Incorrect reading */
 
 		while (low <= high) {
-			if (code >= table.id[mid - 1].code &&
-			    code < table.id[mid].code)
+			if (code <= table.id[mid].code &&
+			    code > table.id[mid - 1].code)
 				break;
 			else if (code > table.id[mid].code)
 				low = mid + 1;
-- 
1.9.1

[PATCH 3/9] thermal: rockchip: update the tsadc table for rk3399

[Caesar Wang]

This patch fixes the incorrect conversion table.
The Code to Temperature mapping is updated based on sillcon results.

Fixes commit b0d70338bca22cb14
("thermal: rockchip: Support the RK3399 SoCs in thermal driver").

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
---

 drivers/thermal/rockchip_thermal.c | 68 +++++++++++++++++++-------------------
 1 file changed, 34 insertions(+), 34 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 658772f..e5064d7 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -308,40 +308,40 @@ static const struct tsadc_table rk3368_code_table[] = {
 
 static const struct tsadc_table rk3399_code_table[] = {
 	{0, -40000},
-	{593, -40000},
-	{598, -35000},
-	{603, -30000},
-	{609, -25000},
-	{614, -20000},
-	{619, -15000},
-	{625, -10000},
-	{630, -5000},
-	{635, 0},
-	{641, 5000},
-	{646, 10000},
-	{651, 15000},
-	{657, 20000},
-	{662, 25000},
-	{667, 30000},
-	{673, 35000},
-	{678, 40000},
-	{684, 45000},
-	{689, 50000},
-	{694, 55000},
-	{700, 60000},
-	{705, 65000},
-	{711, 70000},
-	{716, 75000},
-	{722, 80000},
-	{727, 85000},
-	{733, 90000},
-	{738, 95000},
-	{743, 100000},
-	{749, 105000},
-	{754, 110000},
-	{760, 115000},
-	{765, 120000},
-	{771, 125000},
+	{402, -40000},
+	{410, -35000},
+	{419, -30000},
+	{427, -25000},
+	{436, -20000},
+	{444, -15000},
+	{453, -10000},
+	{461, -5000},
+	{470, 0},
+	{478, 5000},
+	{487, 10000},
+	{496, 15000},
+	{504, 20000},
+	{513, 25000},
+	{521, 30000},
+	{530, 35000},
+	{538, 40000},
+	{547, 45000},
+	{555, 50000},
+	{564, 55000},
+	{573, 60000},
+	{581, 65000},
+	{590, 70000},
+	{599, 75000},
+	{607, 80000},
+	{616, 85000},
+	{624, 90000},
+	{633, 95000},
+	{642, 100000},
+	{650, 105000},
+	{659, 110000},
+	{668, 115000},
+	{677, 120000},
+	{685, 125000},
 	{TSADCV3_DATA_MASK, 125000},
 };
 
-- 
1.9.1

[PATCH 4/9] thermal: rockchip: handle the power sequence for tsadc controller

[Caesar Wang]

This adds the grf property to handle the tsadc power sequence on
rockchip some SoCs.

Verified on rk3399 can work with this patch on now.

while true; do grep "" /sys/class/thermal/thermal_zone[0-1]/temp
sleep .5; done
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41666
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
---

 drivers/thermal/rockchip_thermal.c | 87 +++++++++++++++++++++++++++++++++++---
 1 file changed, 82 insertions(+), 5 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index e5064d7..3cb2e94 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -23,8 +23,10 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/platform_device.h>
+#include <linux/regmap.h>
 #include <linux/reset.h>
 #include <linux/thermal.h>
+#include <linux/mfd/syscon.h>
 #include <linux/pinctrl/consumer.h>
 
 /**
@@ -97,7 +99,8 @@ struct rockchip_tsadc_chip {
 	enum tshut_polarity tshut_polarity;
 
 	/* Chip-wide methods */
-	void (*initialize)(void __iomem *reg, enum tshut_polarity p);
+	void (*initialize)(struct regmap *grf,
+			   void __iomem *reg, enum tshut_polarity p);
 	void (*irq_ack)(void __iomem *reg);
 	void (*control)(void __iomem *reg, bool on);
 
@@ -128,6 +131,7 @@ struct rockchip_thermal_data {
 	struct clk *clk;
 	struct clk *pclk;
 
+	struct regmap *grf;
 	void __iomem *regs;
 
 	int tshut_temp;
@@ -142,6 +146,7 @@ struct rockchip_thermal_data {
  * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
  *
  */
+#define TSADCV2_USER_CON			0x00
 #define TSADCV2_AUTO_CON			0x04
 #define TSADCV2_INT_EN				0x08
 #define TSADCV2_INT_PD				0x0c
@@ -177,6 +182,16 @@ struct rockchip_thermal_data {
 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
 #define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
 #define TSADCV2_AUTO_PERIOD_HT_TIME		50  /* msec */
+#define TSADCV2_USER_INTER_PD_SOC		0x340 /* 13 clocks */
+
+#define GRF_SARADC_TESTBIT			0x0e644
+#define GRF_TSADC_TESTBIT_L			0x0e648
+#define GRF_TSADC_TESTBIT_H			0x0e64c
+
+#define GRF_TSADC_TSEN_PD_ON			(0x30003 << 0)
+#define GRF_TSADC_TSEN_PD_OFF			(0x30000 << 0)
+#define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
+#define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
 
 struct tsadc_table {
 	u32 code;
@@ -449,7 +464,7 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
  *     If the temperature is higher than COMP_INT or COMP_SHUT for
  *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
  */
-static void rk_tsadcv2_initialize(void __iomem *regs,
+static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
 				  enum tshut_polarity tshut_polarity)
 {
 	if (tshut_polarity == TSHUT_HIGH_ACTIVE)
@@ -466,6 +481,61 @@ static void rk_tsadcv2_initialize(void __iomem *regs,
 		       regs + TSADCV2_AUTO_PERIOD_HT);
 	writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 		       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
+
+	if (IS_ERR(grf)) {
+		pr_warn("%s: Missing rockchip,grf property\n", __func__);
+		return;
+	}
+}
+
+/**
+ * rk_tsadcv3_initialize - initialize TASDC Controller.
+ * (1) The tsadc control power sequence.
+ *
+ * (2) Set TSADC_V2_AUTO_PERIOD:
+ *     Configure the interleave between every two accessing of
+ *     TSADC in normal operation.
+ *
+ * (2) Set TSADCV2_AUTO_PERIOD_HT:
+ *     Configure the interleave between every two accessing of
+ *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
+ *
+ * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
+ *     If the temperature is higher than COMP_INT or COMP_SHUT for
+ *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
+ */
+static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
+				  enum tshut_polarity tshut_polarity)
+{
+	/* The tsadc control power sequence */
+	if (IS_ERR(grf)) {
+		/* Set interleave value to workround ic time sync issue */
+		writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
+			       TSADCV2_USER_CON);
+	} else {
+		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
+		mdelay(10);
+		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
+		udelay(100); /* The spec note says at least 15 us */
+		regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
+		regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
+		udelay(200); /* The spec note says@least 90 us */
+	}
+
+	if (tshut_polarity == TSHUT_HIGH_ACTIVE)
+		writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
+			       regs + TSADCV2_AUTO_CON);
+	else
+		writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
+			       regs + TSADCV2_AUTO_CON);
+
+	writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
+	writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
+		       regs + TSADCV2_HIGHT_INT_DEBOUNCE);
+	writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
+		       regs + TSADCV2_AUTO_PERIOD_HT);
+	writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
+		       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 }
 
 static void rk_tsadcv2_irq_ack(void __iomem *regs)
@@ -636,7 +706,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
 	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 	.tshut_temp = 95000,
 
-	.initialize = rk_tsadcv2_initialize,
+	.initialize = rk_tsadcv3_initialize,
 	.irq_ack = rk_tsadcv3_irq_ack,
 	.control = rk_tsadcv3_control,
 	.get_temp = rk_tsadcv2_get_temp,
@@ -768,6 +838,11 @@ static int rockchip_configure_from_dt(struct device *dev,
 		return -EINVAL;
 	}
 
+	/* The tsadc wont to handle the error in here since some SoCs didn't
+	 * need this property.
+	 */
+	thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
+
 	return 0;
 }
 
@@ -888,7 +963,8 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 		goto err_disable_pclk;
 	}
 
-	thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
+	thermal->chip->initialize(thermal->grf, thermal->regs,
+				  thermal->tshut_polarity);
 
 	for (i = 0; i < thermal->chip->chn_num; i++) {
 		error = rockchip_thermal_register_sensor(pdev, thermal,
@@ -986,7 +1062,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 
 	rockchip_thermal_reset_controller(thermal->reset);
 
-	thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
+	thermal->chip->initialize(thermal->grf, thermal->regs,
+				  thermal->tshut_polarity);
 
 	for (i = 0; i < thermal->chip->chn_num; i++) {
 		int id = thermal->sensors[i].id;
-- 
1.9.1

[PATCH 5/9] thermal: rockchip: Support RK3366 SoCs in the thermal driver

[Caesar Wang]

From: Elaine Zhang <zhangqing@rock-chips.com>

The RK3366 SoCs have two Temperature Sensors, channel 0 is for CPU
channel 1 is for GPU.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 drivers/thermal/rockchip_thermal.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 3cb2e94..00c12c0 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -673,6 +673,30 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 	},
 };
 
+static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+	.chn_num = 2, /* two channels for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.initialize = rk_tsadcv3_initialize,
+	.irq_ack = rk_tsadcv3_irq_ack,
+	.control = rk_tsadcv3_control,
+	.get_temp = rk_tsadcv2_get_temp,
+	.set_tshut_temp = rk_tsadcv2_tshut_temp,
+	.set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+	.table = {
+		.id = rk3228_code_table,
+		.length = ARRAY_SIZE(rk3228_code_table),
+		.data_mask = TSADCV3_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 	.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
@@ -731,6 +755,10 @@ static const struct of_device_id of_rockchip_thermal_match[] = {
 		.data = (void *)&rk3288_tsadc_data,
 	},
 	{
+		.compatible = "rockchip,rk3366-tsadc",
+		.data = (void *)&rk3366_tsadc_data,
+	},
+	{
 		.compatible = "rockchip,rk3368-tsadc",
 		.data = (void *)&rk3368_tsadc_data,
 	},
-- 
1.9.1

[PATCH 6/9] thermal: rockchip: add the notes for better reading

[Caesar Wang]

To update the notes for keeping in mind that quickly in case
someone re-read this driver in the future.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
---

 drivers/thermal/rockchip_thermal.c | 74 +++++++++++++++++++++++++++-----------
 1 file changed, 53 insertions(+), 21 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 00c12c0..86a1ab0 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -1,7 +1,5 @@
 /*
- * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
- *
- * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
  * Caesar Wang <wxt@rock-chips.com>
  *
  * This program is free software; you can redistribute it and/or modify it
@@ -75,7 +73,7 @@ enum adc_sort_mode {
 #define SOC_MAX_SENSORS	2
 
 /**
- * struct chip_tsadc_table: hold information about chip-specific differences
+ * struct chip_tsadc_table - hold information about chip-specific differences
  * @id: conversion table
  * @length: size of conversion table
  * @data_mask: mask to apply on data inputs
@@ -88,6 +86,20 @@ struct chip_tsadc_table {
 	enum adc_sort_mode mode;
 };
 
+/**
+ * struct rockchip_tsadc_chip - hold the private data of tsadc chip
+ * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
+ * @chn_num: the channel number of tsadc chip
+ * @tshut_temp: the hardware-controlled shutdown temperature value
+ * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
+ * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
+ * @initialize: SoC special initialize tsadc controller method
+ * @irq_ack: clear the interrupt
+ * @get_temp: get the temperature
+ * @set_tshut_temp: set the hardware-controlled shutdown temperature
+ * @set_tshut_mode: set the hardware-controlled shutdown mode
+ * @table: the chip-specific conversion table
+ */
 struct rockchip_tsadc_chip {
 	/* The sensor id of chip correspond to the ADC channel */
 	int chn_id[SOC_MAX_SENSORS];
@@ -115,12 +127,32 @@ struct rockchip_tsadc_chip {
 	struct chip_tsadc_table table;
 };
 
+/**
+ * struct rockchip_thermal_sensor - hold the information of thermal sensor
+ * @thermal:  pointer to the platform/configuration data
+ * @tzd: pointer to a thermal zone
+ * @id: identifier of the thermal sensor
+ */
 struct rockchip_thermal_sensor {
 	struct rockchip_thermal_data *thermal;
 	struct thermal_zone_device *tzd;
 	int id;
 };
 
+/**
+ * struct rockchip_thermal_data - hold the private data of thermal driver
+ * @chip: pointer to the platform/configuration data
+ * @pdev: platform device of thermal
+ * @reset: the reset controller of tsadc
+ * @sensors[SOC_MAX_SENSORS]: the thermal sensor
+ * @clk: the controller clock is divided by the exteral 24MHz
+ * @pclk: the advanced peripherals bus clock
+ * @grf: the general register file will be used to do static set by software
+ * @regs: the base address of tsadc controller
+ * @tshut_temp: the hardware-controlled shutdown temperature value
+ * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
+ * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
+ */
 struct rockchip_thermal_data {
 	const struct rockchip_tsadc_chip *chip;
 	struct platform_device *pdev;
@@ -160,12 +192,7 @@ struct rockchip_thermal_data {
 #define TSADCV2_AUTO_EN				BIT(0)
 #define TSADCV2_AUTO_SRC_EN(chn)		BIT(4 + (chn))
 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH	BIT(8)
-/**
- * TSADCV1_AUTO_Q_SEL_EN:
- * whether select (1024 - tsadc_q) as output
- * 1'b0:use tsadc_q as output(temperature-code is rising sequence)
- * 1'b1:use(1024 - tsadc_q) as output (temperature-code is falling sequence)
- */
+
 #define TSADCV3_AUTO_Q_SEL_EN			BIT(1)
 
 #define TSADCV2_INT_SRC_EN(chn)			BIT(chn)
@@ -193,18 +220,21 @@ struct rockchip_thermal_data {
 #define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
 #define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
 
-struct tsadc_table {
-	u32 code;
-	int temp;
-};
-
 /**
+ * struct tsadc_table - code to temperature conversion table
+ * @code: the value of adc channel
+ * @temp: the temperature
  * Note:
- * Code to Temperature mapping of the Temperature sensor is a piece wise linear
+ * code to temperature mapping of the temperature sensor is a piece wise linear
  * curve.Any temperature, code faling between to 2 give temperatures can be
  * linearly interpolated.
- * Code to Temperature mapping should be updated based on sillcon results.
+ * Code to Temperature mapping should be updated based on manufacturer results.
  */
+struct tsadc_table {
+	u32 code;
+	int temp;
+};
+
 static const struct tsadc_table rk3228_code_table[] = {
 	{0, -40000},
 	{588, -40000},
@@ -490,6 +520,7 @@ static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
 
 /**
  * rk_tsadcv3_initialize - initialize TASDC Controller.
+ *
  * (1) The tsadc control power sequence.
  *
  * (2) Set TSADC_V2_AUTO_PERIOD:
@@ -568,10 +599,11 @@ static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 }
 
 /**
- * @rk_tsadcv3_control:
- * TSADC controller works at auto mode, and some SoCs need set the tsadc_q_sel
- * bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output adc value if
- * setting this bit to enable.
+ * rk_tsadcv3_control - the tsadc controller is enabled or disabled.
+ *
+ * NOTE: TSADC controller works@auto mode, and some SoCs need set the
+ * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
+ * adc value if setting this bit to enable.
  */
 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
 {
-- 
1.9.1

[PATCH 8/9] thermal: rockchip: add the set_trips function

[Caesar Wang]

Whenever the current temperature is updated, the trip points immediately
below and above the current temperature are found. A sensor driver
callback `set_trips' is then called with the temperatures.
Lastly, The sensor will trigger the hardware high temperature interrupts
to increase the sampleing rate and throttle frequency to limit the
temperature rising When performing passive cooling.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
---

 drivers/thermal/rockchip_thermal.c | 39 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 86a1ab0..39e2eec 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -96,6 +96,7 @@ struct chip_tsadc_table {
  * @initialize: SoC special initialize tsadc controller method
  * @irq_ack: clear the interrupt
  * @get_temp: get the temperature
+ * @set_alarm_temp: set the high temperature interrupt
  * @set_tshut_temp: set the hardware-controlled shutdown temperature
  * @set_tshut_mode: set the hardware-controlled shutdown mode
  * @table: the chip-specific conversion table
@@ -119,6 +120,8 @@ struct rockchip_tsadc_chip {
 	/* Per-sensor methods */
 	int (*get_temp)(struct chip_tsadc_table table,
 			int chn, void __iomem *reg, int *temp);
+	void (*set_alarm_temp)(struct chip_tsadc_table table,
+			       int chn, void __iomem *reg, int temp);
 	void (*set_tshut_temp)(struct chip_tsadc_table table,
 			       int chn, void __iomem *reg, int temp);
 	void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
@@ -183,6 +186,7 @@ struct rockchip_thermal_data {
 #define TSADCV2_INT_EN				0x08
 #define TSADCV2_INT_PD				0x0c
 #define TSADCV2_DATA(chn)			(0x20 + (chn) * 0x04)
+#define TSADCV2_COMP_INT(chn)		        (0x30 + (chn) * 0x04)
 #define TSADCV2_COMP_SHUT(chn)		        (0x40 + (chn) * 0x04)
 #define TSADCV2_HIGHT_INT_DEBOUNCE		0x60
 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE		0x64
@@ -628,6 +632,20 @@ static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
 	return rk_tsadcv2_code_to_temp(table, val, temp);
 }
 
+static void rk_tsadcv2_alarm_temp(struct chip_tsadc_table table,
+				  int chn, void __iomem *regs, int temp)
+{
+	u32 alarm_value, int_en;
+
+	alarm_value = rk_tsadcv2_temp_to_code(table, temp);
+	writel_relaxed(alarm_value & table.data_mask,
+		       regs + TSADCV2_COMP_INT(chn));
+
+	int_en = readl_relaxed(regs + TSADCV2_INT_EN);
+	int_en |= TSADCV2_INT_SRC_EN(chn);
+	writel_relaxed(int_en, regs + TSADCV2_INT_EN);
+}
+
 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
 				  int chn, void __iomem *regs, int temp)
 {
@@ -670,6 +688,7 @@ static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
 	.irq_ack = rk_tsadcv3_irq_ack,
 	.control = rk_tsadcv3_control,
 	.get_temp = rk_tsadcv2_get_temp,
+	.set_alarm_temp = rk_tsadcv2_alarm_temp,
 	.set_tshut_temp = rk_tsadcv2_tshut_temp,
 	.set_tshut_mode = rk_tsadcv2_tshut_mode,
 
@@ -694,6 +713,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 	.irq_ack = rk_tsadcv2_irq_ack,
 	.control = rk_tsadcv2_control,
 	.get_temp = rk_tsadcv2_get_temp,
+	.set_alarm_temp = rk_tsadcv2_alarm_temp,
 	.set_tshut_temp = rk_tsadcv2_tshut_temp,
 	.set_tshut_mode = rk_tsadcv2_tshut_mode,
 
@@ -718,6 +738,7 @@ static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
 	.irq_ack = rk_tsadcv3_irq_ack,
 	.control = rk_tsadcv3_control,
 	.get_temp = rk_tsadcv2_get_temp,
+	.set_alarm_temp = rk_tsadcv2_alarm_temp,
 	.set_tshut_temp = rk_tsadcv2_tshut_temp,
 	.set_tshut_mode = rk_tsadcv2_tshut_mode,
 
@@ -742,6 +763,7 @@ static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 	.irq_ack = rk_tsadcv2_irq_ack,
 	.control = rk_tsadcv2_control,
 	.get_temp = rk_tsadcv2_get_temp,
+	.set_alarm_temp = rk_tsadcv2_alarm_temp,
 	.set_tshut_temp = rk_tsadcv2_tshut_temp,
 	.set_tshut_mode = rk_tsadcv2_tshut_mode,
 
@@ -766,6 +788,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
 	.irq_ack = rk_tsadcv3_irq_ack,
 	.control = rk_tsadcv3_control,
 	.get_temp = rk_tsadcv2_get_temp,
+	.set_alarm_temp = rk_tsadcv2_alarm_temp,
 	.set_tshut_temp = rk_tsadcv2_tshut_temp,
 	.set_tshut_mode = rk_tsadcv2_tshut_mode,
 
@@ -826,6 +849,21 @@ static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 	return IRQ_HANDLED;
 }
 
+static int rockchip_thermal_set_trips(void *_sensor, int low, int high)
+{
+	struct rockchip_thermal_sensor *sensor = _sensor;
+	struct rockchip_thermal_data *thermal = sensor->thermal;
+	const struct rockchip_tsadc_chip *tsadc = thermal->chip;
+
+	dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
+		__func__, sensor->id, low, high);
+
+	tsadc->set_alarm_temp(tsadc->table,
+			      sensor->id, thermal->regs, high);
+
+	return 0;
+}
+
 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
 {
 	struct rockchip_thermal_sensor *sensor = _sensor;
@@ -843,6 +881,7 @@ static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
 
 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
 	.get_temp = rockchip_thermal_get_temp,
+	.set_trips = rockchip_thermal_set_trips,
 };
 
 static int rockchip_configure_from_dt(struct device *dev,
-- 
1.9.1

[PATCH 9/9] arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi

[Caesar Wang]

In order to be standard to manage for rockchip SoCs,  move the thermal
data into rk3368 dtsi, we needn't to add a new file for thermal.

Fixes commit f990238f859e
("arm64: dts: rockchip: Add main thermal info to rk3368.dtsi")

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>

---

 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi | 112 -----------------------
 arch/arm64/boot/dts/rockchip/rk3368.dtsi         |  66 ++++++++++++-
 2 files changed, 65 insertions(+), 113 deletions(-)
 delete mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
deleted file mode 100644
index a10010f..0000000
--- a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * Device Tree Source for RK3368 SoC thermal
- *
- * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
- * Caesar Wang <wxt@rock-chips.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <dt-bindings/thermal/thermal.h>
-
-cpu_thermal: cpu_thermal {
-	polling-delay-passive = <100>; /* milliseconds */
-	polling-delay = <5000>; /* milliseconds */
-
-	thermal-sensors = <&tsadc 0>;
-
-	trips {
-		cpu_alert0: cpu_alert0 {
-			temperature = <75000>; /* millicelsius */
-			hysteresis = <2000>; /* millicelsius */
-			type = "passive";
-		};
-		cpu_alert1: cpu_alert1 {
-			temperature = <80000>; /* millicelsius */
-			hysteresis = <2000>; /* millicelsius */
-			type = "passive";
-		};
-		cpu_crit: cpu_crit {
-			temperature = <95000>; /* millicelsius */
-			hysteresis = <2000>; /* millicelsius */
-			type = "critical";
-		};
-	};
-
-	cooling-maps {
-		map0 {
-			trip = <&cpu_alert0>;
-			cooling-device =
-				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-		};
-		map1 {
-			trip = <&cpu_alert1>;
-			cooling-device =
-				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-		};
-	};
-};
-
-gpu_thermal: gpu_thermal {
-	polling-delay-passive = <100>; /* milliseconds */
-	polling-delay = <5000>; /* milliseconds */
-
-	thermal-sensors = <&tsadc 1>;
-
-	trips {
-		gpu_alert0: gpu_alert0 {
-			temperature = <80000>; /* millicelsius */
-			hysteresis = <2000>; /* millicelsius */
-			type = "passive";
-		};
-		gpu_crit: gpu_crit {
-			temperature = <1150000>; /* millicelsius */
-			hysteresis = <2000>; /* millicelsius */
-			type = "critical";
-		};
-	};
-
-	cooling-maps {
-		map0 {
-			trip = <&gpu_alert0>;
-			cooling-device =
-				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-		};
-	};
-};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 7056a0f..8b4a7c9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -413,7 +413,71 @@
 	};
 
 	thermal-zones {
-		#include "rk3368-thermal.dtsi"
+		cpu {
+			polling-delay-passive = <100>; /* milliseconds */
+			polling-delay = <5000>; /* milliseconds */
+
+			thermal-sensors = <&tsadc 0>;
+
+			trips {
+				cpu_alert0: cpu_alert0 {
+					temperature = <75000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "passive";
+				};
+				cpu_alert1: cpu_alert1 {
+					temperature = <80000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "passive";
+				};
+				cpu_crit: cpu_crit {
+					temperature = <95000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&cpu_alert0>;
+					cooling-device =
+					<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+				map1 {
+					trip = <&cpu_alert1>;
+					cooling-device =
+					<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+
+		gpu {
+			polling-delay-passive = <100>; /* milliseconds */
+			polling-delay = <5000>; /* milliseconds */
+
+			thermal-sensors = <&tsadc 1>;
+
+			trips {
+				gpu_alert0: gpu_alert0 {
+					temperature = <80000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "passive";
+				};
+				gpu_crit: gpu_crit {
+					temperature = <115000>; /* millicelsius */
+					hysteresis = <2000>; /* millicelsius */
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&gpu_alert0>;
+					cooling-device =
+					<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
 	};
 
 	tsadc: tsadc at ff280000 {
-- 
1.9.1

[PATCH 9/9] arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi

[Heiko Stübner]

Am Montag, 18. April 2016, 11:36:01 schrieb Caesar Wang:
> In order to be standard to manage for rockchip SoCs,  move the thermal
> data into rk3368 dtsi, we needn't to add a new file for thermal.
> 
> Fixes commit f990238f859e
> ("arm64: dts: rockchip: Add main thermal info to rk3368.dtsi")
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Cc: Zhang Rui <rui.zhang@intel.com>
> Cc: Eduardo Valentin <edubezval@gmail.com>
> Cc: Heiko Stuebner <heiko@sntech.de>

I'm pondering this change for some days now and am still undecided :-) 
On the one hand you're right ... this doesn't need to be its own file on the 
other hand it creates churn, but I'm inclined to pick it up.

Can you at least provide another patch doing the same for rk3288, so that we 
really standardize on one form for Rockchip SoCs?


Thanks
Heiko


> 
> ---
> 
>  arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi | 112
> ----------------------- arch/arm64/boot/dts/rockchip/rk3368.dtsi         | 
> 66 ++++++++++++- 2 files changed, 65 insertions(+), 113 deletions(-)
>  delete mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi deleted file mode 100644
> index a10010f..0000000
> --- a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
> +++ /dev/null
> @@ -1,112 +0,0 @@
> -/*
> - * Device Tree Source for RK3368 SoC thermal
> - *
> - * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> - * Caesar Wang <wxt@rock-chips.com>
> - *
> - * This file is dual-licensed: you can use it either under the terms
> - * of the GPL or the X11 license, at your option. Note that this dual
> - * licensing only applies to this file, and not this project as a
> - * whole.
> - *
> - *  a) This file is free software; you can redistribute it and/or
> - *     modify it under the terms of the GNU General Public License as
> - *     published by the Free Software Foundation; either version 2 of the
> - *     License, or (at your option) any later version.
> - *
> - *     This file is distributed in the hope that it will be useful,
> - *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> - *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> - *     GNU General Public License for more details.
> - *
> - * Or, alternatively,
> - *
> - *  b) Permission is hereby granted, free of charge, to any person
> - *     obtaining a copy of this software and associated documentation
> - *     files (the "Software"), to deal in the Software without
> - *     restriction, including without limitation the rights to use,
> - *     copy, modify, merge, publish, distribute, sublicense, and/or
> - *     sell copies of the Software, and to permit persons to whom the
> - *     Software is furnished to do so, subject to the following
> - *     conditions:
> - *
> - *     The above copyright notice and this permission notice shall be
> - *     included in all copies or substantial portions of the Software.
> - *
> - *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> - *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> - *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> - *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> - *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> - *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - *     OTHER DEALINGS IN THE SOFTWARE.
> - */
> -
> -#include <dt-bindings/thermal/thermal.h>
> -
> -cpu_thermal: cpu_thermal {
> -	polling-delay-passive = <100>; /* milliseconds */
> -	polling-delay = <5000>; /* milliseconds */
> -
> -	thermal-sensors = <&tsadc 0>;
> -
> -	trips {
> -		cpu_alert0: cpu_alert0 {
> -			temperature = <75000>; /* millicelsius */
> -			hysteresis = <2000>; /* millicelsius */
> -			type = "passive";
> -		};
> -		cpu_alert1: cpu_alert1 {
> -			temperature = <80000>; /* millicelsius */
> -			hysteresis = <2000>; /* millicelsius */
> -			type = "passive";
> -		};
> -		cpu_crit: cpu_crit {
> -			temperature = <95000>; /* millicelsius */
> -			hysteresis = <2000>; /* millicelsius */
> -			type = "critical";
> -		};
> -	};
> -
> -	cooling-maps {
> -		map0 {
> -			trip = <&cpu_alert0>;
> -			cooling-device =
> -				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> -		};
> -		map1 {
> -			trip = <&cpu_alert1>;
> -			cooling-device =
> -				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> -		};
> -	};
> -};
> -
> -gpu_thermal: gpu_thermal {
> -	polling-delay-passive = <100>; /* milliseconds */
> -	polling-delay = <5000>; /* milliseconds */
> -
> -	thermal-sensors = <&tsadc 1>;
> -
> -	trips {
> -		gpu_alert0: gpu_alert0 {
> -			temperature = <80000>; /* millicelsius */
> -			hysteresis = <2000>; /* millicelsius */
> -			type = "passive";
> -		};
> -		gpu_crit: gpu_crit {
> -			temperature = <1150000>; /* millicelsius */
> -			hysteresis = <2000>; /* millicelsius */
> -			type = "critical";
> -		};
> -	};
> -
> -	cooling-maps {
> -		map0 {
> -			trip = <&gpu_alert0>;
> -			cooling-device =
> -				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> -		};
> -	};
> -};
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 7056a0f..8b4a7c9 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -413,7 +413,71 @@
>  	};
> 
>  	thermal-zones {
> -		#include "rk3368-thermal.dtsi"
> +		cpu {
> +			polling-delay-passive = <100>; /* milliseconds */
> +			polling-delay = <5000>; /* milliseconds */
> +
> +			thermal-sensors = <&tsadc 0>;
> +
> +			trips {
> +				cpu_alert0: cpu_alert0 {
> +					temperature = <75000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */
> +					type = "passive";
> +				};
> +				cpu_alert1: cpu_alert1 {
> +					temperature = <80000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */
> +					type = "passive";
> +				};
> +				cpu_crit: cpu_crit {
> +					temperature = <95000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */
> +					type = "critical";
> +				};
> +			};
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&cpu_alert0>;
> +					cooling-device =
> +					<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +				map1 {
> +					trip = <&cpu_alert1>;
> +					cooling-device =
> +					<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
> +
> +		gpu {
> +			polling-delay-passive = <100>; /* milliseconds */
> +			polling-delay = <5000>; /* milliseconds */
> +
> +			thermal-sensors = <&tsadc 1>;
> +
> +			trips {
> +				gpu_alert0: gpu_alert0 {
> +					temperature = <80000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */
> +					type = "passive";
> +				};
> +				gpu_crit: gpu_crit {
> +					temperature = <115000>; /* millicelsius */
> +					hysteresis = <2000>; /* millicelsius */
> +					type = "critical";
> +				};
> +			};
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&gpu_alert0>;
> +					cooling-device =
> +					<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
>  	};
> 
>  	tsadc: tsadc at ff280000 {

[PATCH 4/9] thermal: rockchip: handle the power sequence for tsadc controller

[Eduardo Valentin]

On Mon, Apr 18, 2016 at 11:35:56AM +0800, Caesar Wang wrote:
> This adds the grf property to handle the tsadc power sequence on
> rockchip some SoCs.
> 
> Verified on rk3399 can work with this patch on now.
> 
> while true; do grep "" /sys/class/thermal/thermal_zone[0-1]/temp
> sleep .5; done
> /sys/class/thermal/thermal_zone0/temp:40555
> /sys/class/thermal/thermal_zone1/temp:41111
> /sys/class/thermal/thermal_zone0/temp:40555
> /sys/class/thermal/thermal_zone1/temp:41111
> /sys/class/thermal/thermal_zone0/temp:40555
> /sys/class/thermal/thermal_zone1/temp:41666
> /sys/class/thermal/thermal_zone0/temp:40555
> /sys/class/thermal/thermal_zone1/temp:41111
> /sys/class/thermal/thermal_zone0/temp:40555
> /sys/class/thermal/thermal_zone1/temp:41111
> /sys/class/thermal/thermal_zone0/temp:40555
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Cc: Zhang Rui <rui.zhang@intel.com>
> Cc: Eduardo Valentin <edubezval@gmail.com>
> Cc: Heiko Stuebner <heiko@sntech.de>
> ---
> 
>  drivers/thermal/rockchip_thermal.c | 87 +++++++++++++++++++++++++++++++++++---
>  1 file changed, 82 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index e5064d7..3cb2e94 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -23,8 +23,10 @@
>  #include <linux/of_address.h>
>  #include <linux/of_irq.h>
>  #include <linux/platform_device.h>
> +#include <linux/regmap.h>
>  #include <linux/reset.h>
>  #include <linux/thermal.h>
> +#include <linux/mfd/syscon.h>
>  #include <linux/pinctrl/consumer.h>
>  
>  /**
> @@ -97,7 +99,8 @@ struct rockchip_tsadc_chip {
>  	enum tshut_polarity tshut_polarity;
>  
>  	/* Chip-wide methods */
> -	void (*initialize)(void __iomem *reg, enum tshut_polarity p);
> +	void (*initialize)(struct regmap *grf,
> +			   void __iomem *reg, enum tshut_polarity p);
>  	void (*irq_ack)(void __iomem *reg);
>  	void (*control)(void __iomem *reg, bool on);
>  
> @@ -128,6 +131,7 @@ struct rockchip_thermal_data {
>  	struct clk *clk;
>  	struct clk *pclk;
>  
> +	struct regmap *grf;
>  	void __iomem *regs;
>  
>  	int tshut_temp;
> @@ -142,6 +146,7 @@ struct rockchip_thermal_data {
>   * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
>   *
>   */
> +#define TSADCV2_USER_CON			0x00
>  #define TSADCV2_AUTO_CON			0x04
>  #define TSADCV2_INT_EN				0x08
>  #define TSADCV2_INT_PD				0x0c
> @@ -177,6 +182,16 @@ struct rockchip_thermal_data {
>  #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
>  #define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
>  #define TSADCV2_AUTO_PERIOD_HT_TIME		50  /* msec */
> +#define TSADCV2_USER_INTER_PD_SOC		0x340 /* 13 clocks */
> +
> +#define GRF_SARADC_TESTBIT			0x0e644
> +#define GRF_TSADC_TESTBIT_L			0x0e648
> +#define GRF_TSADC_TESTBIT_H			0x0e64c
> +
> +#define GRF_TSADC_TSEN_PD_ON			(0x30003 << 0)
> +#define GRF_TSADC_TSEN_PD_OFF			(0x30000 << 0)
> +#define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
> +#define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
>  
>  struct tsadc_table {
>  	u32 code;
> @@ -449,7 +464,7 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
>   *     If the temperature is higher than COMP_INT or COMP_SHUT for
>   *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
>   */
> -static void rk_tsadcv2_initialize(void __iomem *regs,
> +static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
>  				  enum tshut_polarity tshut_polarity)
>  {
>  	if (tshut_polarity == TSHUT_HIGH_ACTIVE)
> @@ -466,6 +481,61 @@ static void rk_tsadcv2_initialize(void __iomem *regs,
>  		       regs + TSADCV2_AUTO_PERIOD_HT);
>  	writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
>  		       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
> +
> +	if (IS_ERR(grf)) {
> +		pr_warn("%s: Missing rockchip,grf property\n", __func__);
> +		return;
> +	}
> +}
> +
> +/**
> + * rk_tsadcv3_initialize - initialize TASDC Controller.
> + * (1) The tsadc control power sequence.
> + *
> + * (2) Set TSADC_V2_AUTO_PERIOD:
> + *     Configure the interleave between every two accessing of
> + *     TSADC in normal operation.
> + *
> + * (2) Set TSADCV2_AUTO_PERIOD_HT:
> + *     Configure the interleave between every two accessing of
> + *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
> + *
> + * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
> + *     If the temperature is higher than COMP_INT or COMP_SHUT for
> + *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
> + */
> +static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
> +				  enum tshut_polarity tshut_polarity)
> +{
> +	/* The tsadc control power sequence */
> +	if (IS_ERR(grf)) {
> +		/* Set interleave value to workround ic time sync issue */
> +		writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
> +			       TSADCV2_USER_CON);
> +	} else {
> +		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
> +		mdelay(10);
> +		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
> +		udelay(100); /* The spec note says at least 15 us */
> +		regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
> +		regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
> +		udelay(200); /* The spec note says at least 90 us */

Does it make sense to use usleep_range() instead?

> +	}
> +
> +	if (tshut_polarity == TSHUT_HIGH_ACTIVE)
> +		writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
> +			       regs + TSADCV2_AUTO_CON);
> +	else
> +		writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
> +			       regs + TSADCV2_AUTO_CON);
> +
> +	writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
> +	writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
> +		       regs + TSADCV2_HIGHT_INT_DEBOUNCE);
> +	writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
> +		       regs + TSADCV2_AUTO_PERIOD_HT);
> +	writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
> +		       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
>  }
>  
>  static void rk_tsadcv2_irq_ack(void __iomem *regs)
> @@ -636,7 +706,7 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
>  	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
>  	.tshut_temp = 95000,
>  
> -	.initialize = rk_tsadcv2_initialize,
> +	.initialize = rk_tsadcv3_initialize,
>  	.irq_ack = rk_tsadcv3_irq_ack,
>  	.control = rk_tsadcv3_control,
>  	.get_temp = rk_tsadcv2_get_temp,
> @@ -768,6 +838,11 @@ static int rockchip_configure_from_dt(struct device *dev,
>  		return -EINVAL;
>  	}
>  
> +	/* The tsadc wont to handle the error in here since some SoCs didn't
> +	 * need this property.
> +	 */
> +	thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
> +
>  	return 0;
>  }
>  
> @@ -888,7 +963,8 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
>  		goto err_disable_pclk;
>  	}
>  
> -	thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
> +	thermal->chip->initialize(thermal->grf, thermal->regs,
> +				  thermal->tshut_polarity);
>  
>  	for (i = 0; i < thermal->chip->chn_num; i++) {
>  		error = rockchip_thermal_register_sensor(pdev, thermal,
> @@ -986,7 +1062,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
>  
>  	rockchip_thermal_reset_controller(thermal->reset);
>  
> -	thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
> +	thermal->chip->initialize(thermal->grf, thermal->regs,
> +				  thermal->tshut_polarity);
>  
>  	for (i = 0; i < thermal->chip->chn_num; i++) {
>  		int id = thermal->sensors[i].id;
> -- 
> 1.9.1
> 

[PATCH 0/9] thermal: rockchip: Support rk3366/rk3399 SoCS and fixes the driver

[Eduardo Valentin]

On Mon, Apr 18, 2016 at 11:35:52AM +0800, Caesar Wang wrote:
> Hello Eduardo, Heiko
> This series pacthes to support the rk3366/rk3399 SoCs thermal, and fixes the driver.
> 
> 65ae684 thermal: rockchip: disable thermal->clk in err case
> 31e6d69 thermal: rockchip: fixes the code_to_temp for tsadc driver
> 6e2d6fb thermal: rockchip: update the tsadc table for rk3399
> 49f6ccf thermal: rockchip: handle the power sequence for tsadc controller
> 9f8bd52 thermal: rockchip: Support RK3366 SoCs in the thermal driver
> a959e42 thermal: rockchip: add the notes for better reading

Applied patches 1-6. But please, consider sending a patch to use
usleep_range.

> e5cbc6a thermal: of: Add support for hardware-tracked trip points
> 7f613e4 thermal: rockchip: add the set_trips function
> 94cc571 arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi
> 

These patches, though, will need further discussion. I believe you would
probaly refresh them once we agree on Sascha's patchset.

[PATCH 4/9] thermal: rockchip: handle the power sequence for tsadc controller

[Eduardo Valentin]

On Thu, Apr 28, 2016 at 09:50:29AM +0800, Caesar Wang wrote:
> 
> 
> ? 2016?04?28? 07:48, Eduardo Valentin ??:
> >On Mon, Apr 18, 2016 at 11:35:56AM +0800, Caesar Wang wrote:
> >>+		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
> >>+		mdelay(10);
> >>+		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
> >>+		udelay(100); /* The spec note says at least 15 us */
> >>+		regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
> >>+		regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
> >>+		udelay(200); /* The spec note says at least 90 us */
> >Does it make sense to use usleep_range() instead?
> 
> I think so in the past, but I'm digging into the the udelay/usleep for
> kernel.

What do you mean by in the past? timekeeping doc still recommends the
range 10us to 20ms for usleep_range()

> 
> In general,
> 
> udelay < 10us ~100us
> mdelay > 1m, <1000ms/HZ
> usleep_range(min,max) > 100us, <20ms

even here, your udelays could be replaced by usleep_range().

Any particular reason you believe spining is better than sleeping in
your case?

> msleep > 20ms,  < 1000ms
> 
> So the udelay is suit for tsadc power sequence.
> ---
> 
> 
> Also,  we have used the mdelay(10), so it doesn't matter if use the udelay.
> After all the udelay is stable than the usleep_range.

What do you mean udelay is stable than usleep_range? usleep_range will
give the opportunity to the scheduler to coalesce wakeups. udelay is a
busyloop spin. Besides, I am not sure the current situation, but
busylooping may be affected by cpu frequency.

> 
> -Caesar
> 
> >1.9.1
> >
> >
> >
> >
> >-- 
> >Thanks,
> >Caesar

[PATCH 4/9] thermal: rockchip: handle the power sequence for tsadc controller

[Caesar Wang]

? 2016?04?28? 23:04, Eduardo Valentin ??:
> On Thu, Apr 28, 2016 at 09:50:29AM +0800, Caesar Wang wrote:
>>
>> ? 2016?04?28? 07:48, Eduardo Valentin ??:
>>> On Mon, Apr 18, 2016 at 11:35:56AM +0800, Caesar Wang wrote:
>>>> +		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
>>>> +		mdelay(10);
>>>> +		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
>>>> +		udelay(100); /* The spec note says at least 15 us */
>>>> +		regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
>>>> +		regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
>>>> +		udelay(200); /* The spec note says at least 90 us */
>>> Does it make sense to use usleep_range() instead?
>> I think so in the past, but I'm digging into the the udelay/usleep for
>> kernel.
> What do you mean by in the past? timekeeping doc still recommends the
> range 10us to 20ms for usleep_range()
>
>> In general,
>>
>> udelay < 10us ~100us
>> mdelay > 1m, <1000ms/HZ
>> usleep_range(min,max) > 100us, <20ms
> even here, your udelays could be replaced by usleep_range().
>
> Any particular reason you believe spining is better than sleeping in
> your case?
>
>> msleep > 20ms,  < 1000ms
>>
>> So the udelay is suit for tsadc power sequence.
>> ---
>>
>>
>> Also,  we have used the mdelay(10), so it doesn't matter if use the udelay.
>> After all the udelay is stable than the usleep_range.
> What do you mean udelay is stable than usleep_range? usleep_range will
> give the opportunity to the scheduler to coalesce wakeups. udelay is a
> busyloop spin. Besides, I am not sure the current situation, but
> busylooping may be affected by cpu frequency.

Okay, thanks for pointing out.

Send the fixes patch on https://patchwork.kernel.org/patch/8999971/

Thank you!


-Caesar
>
>> -Caesar
>>
>>> 1.9.1
>>>
>>>
>>>
>>>
>>> -- 
>>> Thanks,
>>> Caesar
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip


-- 
Thanks,
Caesar