[PATCH 1/2] ARM64: dts: rockchip: add sdhci/emmc for rk3399

[PATCH 1/2] ARM64: dts: rockchip: add sdhci/emmc for rk3399

[Brian Norris]

The bindings for rk3399's SDHCI + eMMC PHY have been accepted, so let's
support eMMC now.

Note that 'rockchip,rk3399-sdhci-5.1' is not documented, but per Heiko's
previous suggestion, we don't want to clutter the arasan doc, and it's
just a precautionary measure to have it.

Signed-off-by: Brian Norris <briannorris@chromium.org>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 46f325a143b0..947d1221592d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -215,6 +215,17 @@
 		status = "disabled";
 	};
 
+	sdhci: sdhci at fe330000 {
+		compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
+		reg = <0x0 0xfe330000 0x0 0x10000>;
+		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
+		clock-names = "clk_xin", "clk_ahb";
+		phys = <&emmc_phy>;
+		phy-names = "phy_arasan";
+		status = "disabled";
+	};
+
 	usb_host0_ehci: usb at fe380000 {
 		compatible = "generic-ehci";
 		reg = <0x0 0xfe380000 0x0 0x20000>;
@@ -481,8 +492,18 @@
 	};
 
 	grf: syscon at ff770000 {
-		compatible = "rockchip,rk3399-grf", "syscon";
+		compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
 		reg = <0x0 0xff770000 0x0 0x10000>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		emmc_phy: phy at f780 {
+			compatible = "rockchip,rk3399-emmc-phy";
+			reg = <0xf780 0x20>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
 	};
 
 	watchdog at ff840000 {
-- 
2.8.0.rc3.226.g39d4020

[PATCH 2/2] ARM64: dts: rockchip: enable eMMC for rk3399 EVB

[Brian Norris]

The 'mmc-hs400-enhanced-strobe' property has been acked by Rob Herring,
though it's still not merged.

Signed-off-by: Brian Norris <briannorris@chromium.org>
---
 arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
index 1a3eb1482050..ccfd2bcf02e1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
@@ -89,6 +89,18 @@
 	status = "okay";
 };
 
+&emmc_phy {
+	status = "okay";
+};
+
+&sdhci {
+	bus-width = <8>;
+	mmc-hs400-1_8v;
+	non-removable;
+	mmc-hs400-enhanced-strobe;
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
-- 
2.8.0.rc3.226.g39d4020

[PATCH 2/2] ARM64: dts: rockchip: enable eMMC for rk3399 EVB

[Shawn Lin]

On 2016/5/11 8:02, Brian Norris wrote:
> The 'mmc-hs400-enhanced-strobe' property has been acked by Rob Herring,
> though it's still not merged.
>

Hi Brain,

I'm not sure whether it's acceptable to upstream new property which
isn't merged yet. My major concern is that as the patchset supporting
h400es will go through mmc tree, so if Ulf should want to shorten the
name (e.g mmc-hs400-es), you would respin this patch.


Thanks.

> Signed-off-by: Brian Norris <briannorris@chromium.org>
> ---
>  arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> index 1a3eb1482050..ccfd2bcf02e1 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> @@ -89,6 +89,18 @@
>  	status = "okay";
>  };
>
> +&emmc_phy {
> +	status = "okay";
> +};
> +
> +&sdhci {
> +	bus-width = <8>;
> +	mmc-hs400-1_8v;
> +	non-removable;
> +	mmc-hs400-enhanced-strobe;
> +	status = "okay";
> +};
> +
>  &uart2 {
>  	status = "okay";
>  };
>


-- 
Best Regards
Shawn Lin

[PATCH 2/2] ARM64: dts: rockchip: enable eMMC for rk3399 EVB

[Brian Norris]

Hi,

On Wed, May 11, 2016 at 08:59:24AM +0800, Shawn Lin wrote:
> On 2016/5/11 8:02, Brian Norris wrote:
> >The 'mmc-hs400-enhanced-strobe' property has been acked by Rob Herring,
> >though it's still not merged.
> >
> 
> Hi Brain,
> 
> I'm not sure whether it's acceptable to upstream new property which
> isn't merged yet. My major concern is that as the patchset supporting
> h400es will go through mmc tree, so if Ulf should want to shorten the
> name (e.g mmc-hs400-es), you would respin this patch.


Well, Heiko can determine when to accept this. I wanted to post it to
get things moving, but I can drop that property for now if it's going to
cause difficulty.

> Thanks.
> 
> >Signed-off-by: Brian Norris <briannorris@chromium.org>
> >---

BTW, I meant to note here that I haven't personally tested this EVB. I
have tested other boards. This patch mostly serves the purpose of an
example user, for my purposes.

Brian

> > arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> >diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> >index 1a3eb1482050..ccfd2bcf02e1 100644
> >--- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> >+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> >@@ -89,6 +89,18 @@
> > 	status = "okay";
> > };
> >
> >+&emmc_phy {
> >+	status = "okay";
> >+};
> >+
> >+&sdhci {
> >+	bus-width = <8>;
> >+	mmc-hs400-1_8v;
> >+	non-removable;
> >+	mmc-hs400-enhanced-strobe;
> >+	status = "okay";
> >+};
> >+
> > &uart2 {
> > 	status = "okay";
> > };
> >
> 
> 
> -- 
> Best Regards
> Shawn Lin
> 

[PATCH 2/2] ARM64: dts: rockchip: enable eMMC for rk3399 EVB

[Heiko Stuebner]

Hi Brian,

Am Dienstag, 10. Mai 2016, 17:02:55 schrieb Brian Norris:
> The 'mmc-hs400-enhanced-strobe' property has been acked by Rob Herring,
> though it's still not merged.

The commit message should describe the actual change not the volatile 
environment surrounding it :-) .

When I apply this patch the property-binding will have made it into a 
maintainer-tree so is not valid anymore then. That is more material for the 
"comment-section" below the "---"

> Signed-off-by: Brian Norris <briannorris@chromium.org>
> ---
>  arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts index
> 1a3eb1482050..ccfd2bcf02e1 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> @@ -89,6 +89,18 @@
>  	status = "okay";
>  };
> 
> +&emmc_phy {
> +	status = "okay";
> +};
> +
> +&sdhci {
> +	bus-width = <8>;
> +	mmc-hs400-1_8v;
> +	non-removable;
> +	mmc-hs400-enhanced-strobe;

alphabetic ordering of properties please

> +	status = "okay";
> +};
> +
>  &uart2 {
>  	status = "okay";
>  };

[PATCH 2/2] ARM64: dts: rockchip: enable eMMC for rk3399 EVB

[Brian Norris]

On Wed, May 11, 2016 at 04:51:58PM +0200, Heiko Stuebner wrote:
> Hi Brian,
> 
> Am Dienstag, 10. Mai 2016, 17:02:55 schrieb Brian Norris:
> > The 'mmc-hs400-enhanced-strobe' property has been acked by Rob Herring,
> > though it's still not merged.
> 
> The commit message should describe the actual change not the volatile 
> environment surrounding it :-) .
> 
> When I apply this patch the property-binding will have made it into a 
> maintainer-tree so is not valid anymore then. That is more material for the 
> "comment-section" below the "---"

Of course. I think I just felt guilty without a commit message :)

> > Signed-off-by: Brian Norris <briannorris@chromium.org>
> > ---
> >  arch/arm64/boot/dts/rockchip/rk3399-evb.dts | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> > b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts index
> > 1a3eb1482050..ccfd2bcf02e1 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> > +++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dts
> > @@ -89,6 +89,18 @@
> >  	status = "okay";
> >  };
> > 
> > +&emmc_phy {
> > +	status = "okay";
> > +};
> > +
> > +&sdhci {
> > +	bus-width = <8>;
> > +	mmc-hs400-1_8v;
> > +	non-removable;
> > +	mmc-hs400-enhanced-strobe;
> 
> alphabetic ordering of properties please

Will fix.

Thanks,
Brian

> > +	status = "okay";
> > +};
> > +
> >  &uart2 {
> >  	status = "okay";
> >  };
> 

[PATCH 2/2] ARM64: dts: rockchip: enable eMMC for rk3399 EVB

[Heiko Stuebner]

Am Mittwoch, 11. Mai 2016, 15:32:33 schrieb Brian Norris:
> On Wed, May 11, 2016 at 04:51:58PM +0200, Heiko Stuebner wrote:
> > Hi Brian,
> > 
> > Am Dienstag, 10. Mai 2016, 17:02:55 schrieb Brian Norris:
> > > The 'mmc-hs400-enhanced-strobe' property has been acked by Rob
> > > Herring,
> > > though it's still not merged.
> > 
> > The commit message should describe the actual change not the volatile
> > environment surrounding it :-) .
> > 
> > When I apply this patch the property-binding will have made it into a
> > maintainer-tree so is not valid anymore then. That is more material for
> > the "comment-section" below the "---"
> 
> Of course. I think I just felt guilty without a commit message :)

I really prefer a (even simple) message being there - although I'm not as 
strict as Greg and Felipe ;-) , and in cases like this I think something 
like "enable the newly added emmc node on the rk3399 evaluation board" 
should be sufficient.


Heiko

[PATCH 1/2] ARM64: dts: rockchip: add sdhci/emmc for rk3399

[Shawn Lin]

+ Huang Lin

On 2016/5/11 8:02, Brian Norris wrote:
> The bindings for rk3399's SDHCI + eMMC PHY have been accepted, so let's
> support eMMC now.
>
> Note that 'rockchip,rk3399-sdhci-5.1' is not documented, but per Heiko's
> previous suggestion, we don't want to clutter the arasan doc, and it's
> just a precautionary measure to have it.
>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> ---
>  arch/arm64/boot/dts/rockchip/rk3399.dtsi | 23 ++++++++++++++++++++++-
>  1 file changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index 46f325a143b0..947d1221592d 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -215,6 +215,17 @@
>  		status = "disabled";
>  	};
>
> +	sdhci: sdhci at fe330000 {
> +		compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
> +		reg = <0x0 0xfe330000 0x0 0x10000>;
> +		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;

sdhci doesn't call clk_set_rate to explicitly assign clk_xin to 200MHz
as it always assumes sdhci controller should meet the highest speed of
each timing mode. And the internal divider will be used. So IMHO,
clk-rockchip for 3399 *haven't* made clk_xin to be 200MHz. Let's assign
the clk stuff to make sure it's 200MHz.

Another problem is that emmc_phy contains a configuration which should
be consistent with clk_out(namely clk_xin/internal dividor). Now I don't
submit unpstream patchset to expose these configurarion, but in
prevention of some misleading, I think it's better to to it.

How about adding these?

assigned-clocks = <&cru SCLK_EMMC>;
assigned-clock-parents = <&cru PLL_CPLL>; //may not need
assigned-clock-rates = <200000000>;

Still you limit your clk_out by adding max-frequency in dts for
specific requirment.

We here manually assigne the clk_xin to be 200MHz, so defaultly
when it's runing in HS200/HS400(ES) mode, internal divider won't
be used(by-pass mode). So the clk jitter is better when by-passing the
clock.

Thanks.

> +		clock-names = "clk_xin", "clk_ahb";
> +		phys = <&emmc_phy>;
> +		phy-names = "phy_arasan";
> +		status = "disabled";
> +	};
> +
>  	usb_host0_ehci: usb at fe380000 {
>  		compatible = "generic-ehci";
>  		reg = <0x0 0xfe380000 0x0 0x20000>;
> @@ -481,8 +492,18 @@
>  	};
>
>  	grf: syscon at ff770000 {
> -		compatible = "rockchip,rk3399-grf", "syscon";
> +		compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
>  		reg = <0x0 0xff770000 0x0 0x10000>;
> +
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		emmc_phy: phy at f780 {
> +			compatible = "rockchip,rk3399-emmc-phy";
> +			reg = <0xf780 0x20>;
> +			#phy-cells = <0>;
> +			status = "disabled";
> +		};
>  	};
>
>  	watchdog at ff840000 {
>


-- 
Best Regards
Shawn Lin

[PATCH 1/2] ARM64: dts: rockchip: add sdhci/emmc for rk3399

[Brian Norris]

On Wed, May 11, 2016 at 09:17:38AM +0800, Shawn Lin wrote:
> + Huang Lin
> 
> On 2016/5/11 8:02, Brian Norris wrote:
> >The bindings for rk3399's SDHCI + eMMC PHY have been accepted, so let's
> >support eMMC now.
> >
> >Note that 'rockchip,rk3399-sdhci-5.1' is not documented, but per Heiko's
> >previous suggestion, we don't want to clutter the arasan doc, and it's
> >just a precautionary measure to have it.
> >
> >Signed-off-by: Brian Norris <briannorris@chromium.org>
> >---
> > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 23 ++++++++++++++++++++++-
> > 1 file changed, 22 insertions(+), 1 deletion(-)
> >
> >diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> >index 46f325a143b0..947d1221592d 100644
> >--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> >+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> >@@ -215,6 +215,17 @@
> > 		status = "disabled";
> > 	};
> >
> >+	sdhci: sdhci at fe330000 {
> >+		compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
> >+		reg = <0x0 0xfe330000 0x0 0x10000>;
> >+		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> >+		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
> 
> sdhci doesn't call clk_set_rate to explicitly assign clk_xin to 200MHz
> as it always assumes sdhci controller should meet the highest speed of
> each timing mode. And the internal divider will be used. So IMHO,
> clk-rockchip for 3399 *haven't* made clk_xin to be 200MHz. Let's assign
> the clk stuff to make sure it's 200MHz.
> 
> Another problem is that emmc_phy contains a configuration which should
> be consistent with clk_out(namely clk_xin/internal dividor). Now I don't
> submit unpstream patchset to expose these configurarion, but in
> prevention of some misleading, I think it's better to to it.
> 
> How about adding these?
> 
> assigned-clocks = <&cru SCLK_EMMC>;
> assigned-clock-parents = <&cru PLL_CPLL>; //may not need
> assigned-clock-rates = <200000000>;

Makes sense. Will add these.

> Still you limit your clk_out by adding max-frequency in dts for
> specific requirment.
> 
> We here manually assigne the clk_xin to be 200MHz, so defaultly
> when it's runing in HS200/HS400(ES) mode, internal divider won't
> be used(by-pass mode). So the clk jitter is better when by-passing the
> clock.
> 
> Thanks.

Brian

[PATCH 1/2] ARM64: dts: rockchip: add sdhci/emmc for rk3399

[Brian Norris]

On Wed, May 11, 2016 at 09:17:38AM +0800, Shawn Lin wrote:
> How about adding these?
> 
> assigned-clocks = <&cru SCLK_EMMC>;
> assigned-clock-parents = <&cru PLL_CPLL>; //may not need

BTW, even if I assign the parent here, it's not actually taking effect
on my system. Presumably the common clock framework is finding a
"better" way to satisfy 200 MHz through GPLL instead. So I'm dropping
the assigned-clock-parents for v2.

> assigned-clock-rates = <200000000>;

Brian