* [PATCH v2 1/6] power: Introduce Broadcom kona reset driver
2016-05-11 21:36 [PATCH v2 0/6] Support BCM23550 SoC Chris Brand
@ 2016-05-11 21:36 ` Chris Brand
2016-05-21 17:09 ` Florian Fainelli
2016-05-11 21:36 ` [PATCH v2 2/6] arm: bcm21664: Remove reset code Chris Brand
` (5 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Chris Brand @ 2016-05-11 21:36 UTC (permalink / raw)
To: linux-arm-kernel
This driver supports reset on both BCM21664 and BCM23550.
Code is being moved from arch/arm/mach-bcm/board_bcm21664.c
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
---
drivers/power/reset/Kconfig | 10 +++++
drivers/power/reset/Makefile | 1 +
drivers/power/reset/brcm-kona-reset.c | 75 +++++++++++++++++++++++++++++++++++
3 files changed, 86 insertions(+)
create mode 100644 drivers/power/reset/brcm-kona-reset.c
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 0a6408a39c66..1a7c49f3650a 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -38,6 +38,16 @@ config POWER_RESET_AXXIA
Say Y if you have an Axxia family SoC.
+config POWER_RESET_BRCMKONA
+ bool "Broadcom Kona reset driver"
+ depends on ARM || COMPILE_TEST
+ default ARCH_BCM_MOBILE
+ help
+ This driver provides restart support for Broadcom Kona chips.
+
+ Say Y here if you have a Broadcom Kona-based board and you wish
+ to have restart support.
+
config POWER_RESET_BRCMSTB
bool "Broadcom STB reset driver"
depends on ARM || MIPS || COMPILE_TEST
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 096fa67047f6..ddb9a5b35480 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -2,6 +2,7 @@ obj-$(CONFIG_POWER_RESET_AS3722) += as3722-poweroff.o
obj-$(CONFIG_POWER_RESET_AT91_POWEROFF) += at91-poweroff.o
obj-$(CONFIG_POWER_RESET_AT91_RESET) += at91-reset.o
obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o
+obj-$(CONFIG_POWER_RESET_BRCMKONA) += brcm-kona-reset.o
obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o
diff --git a/drivers/power/reset/brcm-kona-reset.c b/drivers/power/reset/brcm-kona-reset.c
new file mode 100644
index 000000000000..d6f2070be89c
--- /dev/null
+++ b/drivers/power/reset/brcm-kona-reset.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/io.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/reboot.h>
+
+#include <asm/mach/arch.h>
+
+#define RSTMGR_REG_WR_ACCESS_OFFSET 0
+#define RSTMGR_REG_CHIP_SOFT_RST_OFFSET 4
+
+#define RSTMGR_WR_PASSWORD 0xa5a5
+#define RSTMGR_WR_PASSWORD_SHIFT 8
+#define RSTMGR_WR_ACCESS_ENABLE 1
+
+static void __iomem *kona_reset_base;
+
+static int kona_reset_handler(struct notifier_block *this,
+ unsigned long mode, void *cmd)
+{
+ /*
+ * A soft reset is triggered by writing a 0 to bit 0 of the soft reset
+ * register. To write to that register we must first write the password
+ * and the enable bit in the write access enable register.
+ */
+ writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
+ RSTMGR_WR_ACCESS_ENABLE,
+ kona_reset_base + RSTMGR_REG_WR_ACCESS_OFFSET);
+ writel(0, kona_reset_base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
+
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block kona_reset_nb = {
+ .notifier_call = kona_reset_handler,
+ .priority = 128,
+};
+
+static int kona_reset_probe(struct platform_device *pdev)
+{
+ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+ kona_reset_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(kona_reset_base))
+ return PTR_ERR(kona_reset_base);
+
+ return register_restart_handler(&kona_reset_nb);
+}
+
+static const struct of_device_id of_match[] = {
+ { .compatible = "brcm,bcm21664-resetmgr" },
+ {},
+};
+
+static struct platform_driver bcm_kona_reset_driver = {
+ .probe = kona_reset_probe,
+ .driver = {
+ .name = "brcm-kona-reset",
+ .of_match_table = of_match,
+ },
+};
+
+builtin_platform_driver(bcm_kona_reset_driver);
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 1/6] power: Introduce Broadcom kona reset driver
2016-05-11 21:36 ` [PATCH v2 1/6] power: Introduce Broadcom kona reset driver Chris Brand
@ 2016-05-21 17:09 ` Florian Fainelli
2016-06-03 2:38 ` Sebastian Reichel
0 siblings, 1 reply; 15+ messages in thread
From: Florian Fainelli @ 2016-05-21 17:09 UTC (permalink / raw)
To: linux-arm-kernel
Le 11/05/2016 14:36, Chris Brand a ?crit :
> This driver supports reset on both BCM21664 and BCM23550.
> Code is being moved from arch/arm/mach-bcm/board_bcm21664.c
>
> Signed-off-by: Chris Brand <chris.brand@broadcom.com>
Sebastian, Dmitry, I know we are in the merge window, let me know if you
would want me to take this patch and the 5 others in the next arm-soc
pull request, or if you prefer to take this one in your own tree.
Thanks!
--
Florian
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/6] power: Introduce Broadcom kona reset driver
2016-05-21 17:09 ` Florian Fainelli
@ 2016-06-03 2:38 ` Sebastian Reichel
2016-06-06 16:42 ` Chris Brand
0 siblings, 1 reply; 15+ messages in thread
From: Sebastian Reichel @ 2016-06-03 2:38 UTC (permalink / raw)
To: linux-arm-kernel
Hi Florian,
On Sat, May 21, 2016 at 10:09:07AM -0700, Florian Fainelli wrote:
> Le 11/05/2016 14:36, Chris Brand a ?crit :
> > This driver supports reset on both BCM21664 and BCM23550.
> > Code is being moved from arch/arm/mach-bcm/board_bcm21664.c
> >
> > Signed-off-by: Chris Brand <chris.brand@broadcom.com>
> Sebastian, Dmitry, I know we are in the merge window, let me know if you
> would want me to take this patch and the 5 others in the next arm-soc
> pull request, or if you prefer to take this one in your own tree.
Feel free to queue it via arm-soc with
Acked-By: Sebastian Reichel <sre@kernel.org>
If I didn't overlook it, it's missing DT documentation, though.
-- Sebastian
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/6] power: Introduce Broadcom kona reset driver
2016-06-03 2:38 ` Sebastian Reichel
@ 2016-06-06 16:42 ` Chris Brand
2016-06-07 1:50 ` Sebastian Reichel
0 siblings, 1 reply; 15+ messages in thread
From: Chris Brand @ 2016-06-06 16:42 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jun 2, 2016 at 7:38 PM, Sebastian Reichel <sre@kernel.org> wrote:
> Feel free to queue it via arm-soc with
>
> Acked-By: Sebastian Reichel <sre@kernel.org>
>
> If I didn't overlook it, it's missing DT documentation, though.
Thanks, Sebastian. Because this is effectively a move of code from
arch/arm rather than new code, there's already dt documentation in
Documentation/devicetree/bindings/reset/brcm,bcm21664-resetmgr.txt
Chris
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/6] power: Introduce Broadcom kona reset driver
2016-06-06 16:42 ` Chris Brand
@ 2016-06-07 1:50 ` Sebastian Reichel
2016-06-07 19:40 ` Chris Brand
0 siblings, 1 reply; 15+ messages in thread
From: Sebastian Reichel @ 2016-06-07 1:50 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Mon, Jun 06, 2016 at 09:42:03AM -0700, Chris Brand wrote:
> On Thu, Jun 2, 2016 at 7:38 PM, Sebastian Reichel <sre@kernel.org> wrote:
> > Feel free to queue it via arm-soc with
> >
> > Acked-By: Sebastian Reichel <sre@kernel.org>
> >
> > If I didn't overlook it, it's missing DT documentation, though.
>
> Thanks, Sebastian. Because this is effectively a move of code from
> arch/arm rather than new code, there's already dt documentation in
> Documentation/devicetree/bindings/reset/brcm,bcm21664-resetmgr.txt
Ok. That directory is usually used for periphal reset controller.
Board/System reset controllers are usually documented in
.../bindings/power/reset (following kernel strucuture
[drivers/reset and drivers/power/reset]).
-- Sebastian
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/6] power: Introduce Broadcom kona reset driver
2016-06-07 1:50 ` Sebastian Reichel
@ 2016-06-07 19:40 ` Chris Brand
2016-06-08 4:59 ` Sebastian Reichel
0 siblings, 1 reply; 15+ messages in thread
From: Chris Brand @ 2016-06-07 19:40 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jun 6, 2016 at 6:50 PM, Sebastian Reichel <sre@kernel.org> wrote:
> Hi,
>
> On Mon, Jun 06, 2016 at 09:42:03AM -0700, Chris Brand wrote:
>> On Thu, Jun 2, 2016 at 7:38 PM, Sebastian Reichel <sre@kernel.org> wrote:
>> > Feel free to queue it via arm-soc with
>> >
>> > Acked-By: Sebastian Reichel <sre@kernel.org>
>> >
>> > If I didn't overlook it, it's missing DT documentation, though.
>>
>> Thanks, Sebastian. Because this is effectively a move of code from
>> arch/arm rather than new code, there's already dt documentation in
>> Documentation/devicetree/bindings/reset/brcm,bcm21664-resetmgr.txt
>
> Ok. That directory is usually used for periphal reset controller.
> Board/System reset controllers are usually documented in
> .../bindings/power/reset (following kernel strucuture
> [drivers/reset and drivers/power/reset]).
>
> -- Sebastian
Would you like me to send a separate patch to move that file ?
Chris
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/6] power: Introduce Broadcom kona reset driver
2016-06-07 19:40 ` Chris Brand
@ 2016-06-08 4:59 ` Sebastian Reichel
0 siblings, 0 replies; 15+ messages in thread
From: Sebastian Reichel @ 2016-06-08 4:59 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Tue, Jun 07, 2016 at 12:40:41PM -0700, Chris Brand wrote:
> On Mon, Jun 6, 2016 at 6:50 PM, Sebastian Reichel <sre@kernel.org> wrote:
> > Hi,
> >
> > On Mon, Jun 06, 2016 at 09:42:03AM -0700, Chris Brand wrote:
> >> On Thu, Jun 2, 2016 at 7:38 PM, Sebastian Reichel <sre@kernel.org> wrote:
> >> > Feel free to queue it via arm-soc with
> >> >
> >> > Acked-By: Sebastian Reichel <sre@kernel.org>
> >> >
> >> > If I didn't overlook it, it's missing DT documentation, though.
> >>
> >> Thanks, Sebastian. Because this is effectively a move of code from
> >> arch/arm rather than new code, there's already dt documentation in
> >> Documentation/devicetree/bindings/reset/brcm,bcm21664-resetmgr.txt
> >
> > Ok. That directory is usually used for periphal reset controller.
> > Board/System reset controllers are usually documented in
> > .../bindings/power/reset (following kernel strucuture
> > [drivers/reset and drivers/power/reset]).
> >
> > -- Sebastian
>
> Would you like me to send a separate patch to move that file ?
That would nice, thanks!
-- Sebastian
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 2/6] arm: bcm21664: Remove reset code
2016-05-11 21:36 [PATCH v2 0/6] Support BCM23550 SoC Chris Brand
2016-05-11 21:36 ` [PATCH v2 1/6] power: Introduce Broadcom kona reset driver Chris Brand
@ 2016-05-11 21:36 ` Chris Brand
2016-05-11 21:36 ` [PATCH v2 3/6] docs: Document BCM23550 bindings Chris Brand
` (4 subsequent siblings)
6 siblings, 0 replies; 15+ messages in thread
From: Chris Brand @ 2016-05-11 21:36 UTC (permalink / raw)
To: linux-arm-kernel
The kona reset driver now provides this functionality.
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
---
arch/arm/mach-bcm/board_bcm21664.c | 42 --------------------------------------
1 file changed, 42 deletions(-)
diff --git a/arch/arm/mach-bcm/board_bcm21664.c b/arch/arm/mach-bcm/board_bcm21664.c
index 82ad5687771f..65b3db06e57a 100644
--- a/arch/arm/mach-bcm/board_bcm21664.c
+++ b/arch/arm/mach-bcm/board_bcm21664.c
@@ -11,53 +11,12 @@
* GNU General Public License for more details.
*/
-#include <linux/of_address.h>
#include <linux/of_platform.h>
-#include <linux/io.h>
#include <asm/mach/arch.h>
#include "kona_l2_cache.h"
-#define RSTMGR_DT_STRING "brcm,bcm21664-resetmgr"
-
-#define RSTMGR_REG_WR_ACCESS_OFFSET 0
-#define RSTMGR_REG_CHIP_SOFT_RST_OFFSET 4
-
-#define RSTMGR_WR_PASSWORD 0xa5a5
-#define RSTMGR_WR_PASSWORD_SHIFT 8
-#define RSTMGR_WR_ACCESS_ENABLE 1
-
-static void bcm21664_restart(enum reboot_mode mode, const char *cmd)
-{
- void __iomem *base;
- struct device_node *resetmgr;
-
- resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING);
- if (!resetmgr) {
- pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n");
- return;
- }
- base = of_iomap(resetmgr, 0);
- if (!base) {
- pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n");
- return;
- }
-
- /*
- * A soft reset is triggered by writing a 0 to bit 0 of the soft reset
- * register. To write to that register we must first write the password
- * and the enable bit in the write access enable register.
- */
- writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
- RSTMGR_WR_ACCESS_ENABLE,
- base + RSTMGR_REG_WR_ACCESS_OFFSET);
- writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
-
- /* Wait for reset */
- while (1);
-}
-
static void __init bcm21664_init(void)
{
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
@@ -71,6 +30,5 @@ static const char * const bcm21664_dt_compat[] = {
DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor")
.init_machine = bcm21664_init,
- .restart = bcm21664_restart,
.dt_compat = bcm21664_dt_compat,
MACHINE_END
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 3/6] docs: Document BCM23550 bindings
2016-05-11 21:36 [PATCH v2 0/6] Support BCM23550 SoC Chris Brand
2016-05-11 21:36 ` [PATCH v2 1/6] power: Introduce Broadcom kona reset driver Chris Brand
2016-05-11 21:36 ` [PATCH v2 2/6] arm: bcm21664: Remove reset code Chris Brand
@ 2016-05-11 21:36 ` Chris Brand
2016-05-16 15:16 ` Rob Herring
2016-05-11 21:36 ` [PATCH v2 4/6] arm: Add support for Broadcom BCM23550 SoC Chris Brand
` (3 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Chris Brand @ 2016-05-11 21:36 UTC (permalink / raw)
To: linux-arm-kernel
Add binding document for Broadcom BCM23550 SoC.
BCM23550 has a Cluster Dormant Control IP block that holds cores
in an idle state. Introduce a new CPU enable method in which the CDC is
accessed to bring the core online.
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
---
.../bindings/arm/bcm/brcm,bcm23550-cpu-method.txt | 36 ++++++++++++++++++++++
.../devicetree/bindings/arm/bcm/brcm,bcm23550.txt | 15 +++++++++
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
3 files changed, 52 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt
create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt
new file mode 100644
index 000000000000..a3af54c0e404
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt
@@ -0,0 +1,36 @@
+Broadcom Kona Family CPU Enable Method
+--------------------------------------
+This binding defines the enable method used for starting secondary
+CPUs in the following Broadcom SoCs:
+ BCM23550
+
+The enable method is specified by defining the following required
+properties in the "cpu" device tree node:
+ - enable-method = "brcm,bcm23550";
+ - secondary-boot-reg = <...>;
+
+The secondary-boot-reg property is a u32 value that specifies the
+physical address of the register used to request the ROM holding pen
+code release a secondary CPU. The value written to the register is
+formed by encoding the target CPU id into the low bits of the
+physical start address it should jump to.
+
+Example:
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0>;
+ };
+
+ cpu1: cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <1>;
+ enable-method = "brcm,bcm23550";
+ secondary-boot-reg = <0x3500417c>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt
new file mode 100644
index 000000000000..080baad923d6
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt
@@ -0,0 +1,15 @@
+Broadcom BCM23550 device tree bindings
+--------------------------------------
+
+This document describes the device tree bindings for boards with the BCM23550
+SoC.
+
+Required root node property:
+ - compatible: brcm,bcm23550
+
+Example:
+ / {
+ model = "BCM23550 SoC";
+ compatible = "brcm,bcm23550";
+ [...]
+ }
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index ccc62f145306..37765e76db71 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -194,6 +194,7 @@ nodes to be present and contain the properties described below.
"allwinner,sun8i-a23"
"arm,psci"
"arm,realview-smp"
+ "brcm,bcm23550"
"brcm,bcm-nsp-smp"
"brcm,brahma-b15"
"marvell,armada-375-smp"
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 3/6] docs: Document BCM23550 bindings
2016-05-11 21:36 ` [PATCH v2 3/6] docs: Document BCM23550 bindings Chris Brand
@ 2016-05-16 15:16 ` Rob Herring
0 siblings, 0 replies; 15+ messages in thread
From: Rob Herring @ 2016-05-16 15:16 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, May 11, 2016 at 02:36:19PM -0700, Chris Brand wrote:
> Add binding document for Broadcom BCM23550 SoC.
>
> BCM23550 has a Cluster Dormant Control IP block that holds cores
> in an idle state. Introduce a new CPU enable method in which the CDC is
> accessed to bring the core online.
>
> Signed-off-by: Chris Brand <chris.brand@broadcom.com>
> ---
> .../bindings/arm/bcm/brcm,bcm23550-cpu-method.txt | 36 ++++++++++++++++++++++
> .../devicetree/bindings/arm/bcm/brcm,bcm23550.txt | 15 +++++++++
> Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> 3 files changed, 52 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt
> create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.txt
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 4/6] arm: Add support for Broadcom BCM23550 SoC
2016-05-11 21:36 [PATCH v2 0/6] Support BCM23550 SoC Chris Brand
` (2 preceding siblings ...)
2016-05-11 21:36 ` [PATCH v2 3/6] docs: Document BCM23550 bindings Chris Brand
@ 2016-05-11 21:36 ` Chris Brand
2016-05-11 21:36 ` [PATCH v2 5/6] arm: BCM23550 SMP support Chris Brand
` (2 subsequent siblings)
6 siblings, 0 replies; 15+ messages in thread
From: Chris Brand @ 2016-05-11 21:36 UTC (permalink / raw)
To: linux-arm-kernel
BCM23550 is a quad-A7 SoC used on the Broadcom "Sparrow" board.
It shares many IP blocks with other Broadcom Kona chips.
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
---
arch/arm/mach-bcm/Kconfig | 12 ++++++++++--
arch/arm/mach-bcm/Makefile | 5 ++++-
arch/arm/mach-bcm/board_bcm23550.c | 25 +++++++++++++++++++++++++
3 files changed, 39 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/mach-bcm/board_bcm23550.c
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 7ef121472cdd..cb1281f115a9 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -111,9 +111,17 @@ config ARCH_BCM_21664
Enable support for the BCM21664 family, which includes
BCM21663 and BCM21664 variants.
+config ARCH_BCM_23550
+ bool "Broadcom BCM23550 SoC"
+ depends on ARCH_MULTI_V7
+ select ARCH_BCM_MOBILE
+ select HAVE_SMP
+ help
+ Enable support for the BCM23550.
+
config ARCH_BCM_MOBILE_L2_CACHE
bool "Broadcom mobile SoC level 2 cache support"
- depends on ARCH_BCM_MOBILE
+ depends on ARCH_BCM_281XX || ARCH_BCM_21664
default y
select CACHE_L2X0
select ARCH_BCM_MOBILE_SMC
@@ -128,7 +136,7 @@ config ARCH_BCM_MOBILE_SMP
select HAVE_ARM_SCU
select ARM_ERRATA_764369
help
- SMP support for the BCM281XX and BCM21664 SoC families.
+ SMP support for the BCM281XX, BCM21664 and BCM23550 SoC families.
Provided as an option so SMP support for SoCs of this type
can be disabled for an SMP-enabled kernel.
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index 7d665151c772..980f5850097c 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -26,7 +26,10 @@ obj-$(CONFIG_ARCH_BCM_281XX) += board_bcm281xx.o
# BCM21664
obj-$(CONFIG_ARCH_BCM_21664) += board_bcm21664.o
-# BCM281XX and BCM21664 SMP support
+# BCM23550
+obj-$(CONFIG_ARCH_BCM_23550) += board_bcm23550.o
+
+# BCM281XX, BCM21664 and BCM23550 SMP support
obj-$(CONFIG_ARCH_BCM_MOBILE_SMP) += platsmp.o
# BCM281XX and BCM21664 L2 cache control
diff --git a/arch/arm/mach-bcm/board_bcm23550.c b/arch/arm/mach-bcm/board_bcm23550.c
new file mode 100644
index 000000000000..0ac01debd077
--- /dev/null
+++ b/arch/arm/mach-bcm/board_bcm23550.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/of_platform.h>
+
+#include <asm/mach/arch.h>
+
+static const char * const bcm23550_dt_compat[] = {
+ "brcm,bcm23550",
+ NULL,
+};
+
+DT_MACHINE_START(BCM23550_DT, "BCM23550 Broadcom Application Processor")
+ .dt_compat = bcm23550_dt_compat,
+MACHINE_END
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 5/6] arm: BCM23550 SMP support
2016-05-11 21:36 [PATCH v2 0/6] Support BCM23550 SoC Chris Brand
` (3 preceding siblings ...)
2016-05-11 21:36 ` [PATCH v2 4/6] arm: Add support for Broadcom BCM23550 SoC Chris Brand
@ 2016-05-11 21:36 ` Chris Brand
2016-05-11 21:36 ` [PATCH v2 6/6] arm: dt: bcm23550: Add device tree files Chris Brand
2016-06-06 18:53 ` [PATCH v2 0/6] Support BCM23550 SoC Florian Fainelli
6 siblings, 0 replies; 15+ messages in thread
From: Chris Brand @ 2016-05-11 21:36 UTC (permalink / raw)
To: linux-arm-kernel
BCM23550 has a Cluster Dormant Control IP block that holds cores
in an idle state. Support a new CPU enable method in which the CDC is
accessed to bring the core online.
Signed-off-by: Raymond Ngun <raymond.ngun@broadcom.com>
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
---
arch/arm/mach-bcm/platsmp.c | 58 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/arm/mach-bcm/platsmp.c b/arch/arm/mach-bcm/platsmp.c
index cfae9c71fb74..33c4d8349f95 100644
--- a/arch/arm/mach-bcm/platsmp.c
+++ b/arch/arm/mach-bcm/platsmp.c
@@ -19,6 +19,7 @@
#include <linux/io.h>
#include <linux/jiffies.h>
#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/sched.h>
#include <linux/smp.h>
@@ -255,6 +256,57 @@ static int kona_boot_secondary(unsigned int cpu, struct task_struct *idle)
return -ENXIO;
}
+/* Cluster Dormant Control command to bring CPU into a running state */
+#define CDC_CMD 6
+#define CDC_CMD_OFFSET 0
+#define CDC_CMD_REG(cpu) (CDC_CMD_OFFSET + 4*(cpu))
+
+/*
+ * BCM23550 has a Cluster Dormant Control block that keeps the core in
+ * idle state. A command needs to be sent to the block to bring the CPU
+ * into running state.
+ */
+static int bcm23550_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+ void __iomem *cdc_base;
+ struct device_node *dn;
+ char *name;
+ int ret;
+
+ /* Make sure a CDC node exists before booting the
+ * secondary core.
+ */
+ name = "brcm,bcm23550-cdc";
+ dn = of_find_compatible_node(NULL, NULL, name);
+ if (!dn) {
+ pr_err("unable to find cdc node\n");
+ return -ENODEV;
+ }
+
+ cdc_base = of_iomap(dn, 0);
+ of_node_put(dn);
+
+ if (!cdc_base) {
+ pr_err("unable to remap cdc base register\n");
+ return -ENOMEM;
+ }
+
+ /* Boot the secondary core */
+ ret = kona_boot_secondary(cpu, idle);
+ if (ret)
+ goto out;
+
+ /* Bring this CPU to RUN state so that nIRQ nFIQ
+ * signals are unblocked.
+ */
+ writel_relaxed(CDC_CMD, cdc_base + CDC_CMD_REG(cpu));
+
+out:
+ iounmap(cdc_base);
+
+ return ret;
+}
+
static int nsp_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int ret;
@@ -283,6 +335,12 @@ static const struct smp_operations bcm_smp_ops __initconst = {
CPU_METHOD_OF_DECLARE(bcm_smp_bcm281xx, "brcm,bcm11351-cpu-method",
&bcm_smp_ops);
+static const struct smp_operations bcm23550_smp_ops __initconst = {
+ .smp_boot_secondary = bcm23550_boot_secondary,
+};
+CPU_METHOD_OF_DECLARE(bcm_smp_bcm23550, "brcm,bcm23550",
+ &bcm23550_smp_ops);
+
static const struct smp_operations nsp_smp_ops __initconst = {
.smp_prepare_cpus = bcm_smp_prepare_cpus,
.smp_boot_secondary = nsp_boot_secondary,
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 6/6] arm: dt: bcm23550: Add device tree files
2016-05-11 21:36 [PATCH v2 0/6] Support BCM23550 SoC Chris Brand
` (4 preceding siblings ...)
2016-05-11 21:36 ` [PATCH v2 5/6] arm: BCM23550 SMP support Chris Brand
@ 2016-05-11 21:36 ` Chris Brand
2016-06-06 18:53 ` [PATCH v2 0/6] Support BCM23550 SoC Florian Fainelli
6 siblings, 0 replies; 15+ messages in thread
From: Chris Brand @ 2016-05-11 21:36 UTC (permalink / raw)
To: linux-arm-kernel
Add device tree files for the Broadcom BCM23550 SoC and the
Broadcom Sparrow board.
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/bcm23550-sparrow.dts | 80 +++++++
arch/arm/boot/dts/bcm23550.dtsi | 415 +++++++++++++++++++++++++++++++++
3 files changed, 497 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/bcm23550-sparrow.dts
create mode 100644 arch/arm/boot/dts/bcm23550.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 95c1923ce6fa..72ab80fa9079 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -95,7 +95,8 @@ dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \
bcm958305k.dtb
dtb-$(CONFIG_ARCH_BCM_MOBILE) += \
bcm28155-ap.dtb \
- bcm21664-garnet.dtb
+ bcm21664-garnet.dtb \
+ bcm23550-sparrow.dtb
dtb-$(CONFIG_ARCH_BCM_NSP) += \
bcm958625k.dtb
dtb-$(CONFIG_ARCH_BERLIN) += \
diff --git a/arch/arm/boot/dts/bcm23550-sparrow.dts b/arch/arm/boot/dts/bcm23550-sparrow.dts
new file mode 100644
index 000000000000..4d525ccb48c8
--- /dev/null
+++ b/arch/arm/boot/dts/bcm23550-sparrow.dts
@@ -0,0 +1,80 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2016 Broadcom. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Broadcom Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+#include "bcm23550.dtsi"
+
+/ {
+ model = "BCM23550 Sparrow board";
+ compatible = "brcm,bcm23550-sparrow", "brcm,bcm23550";
+
+ chosen {
+ stdout-path = "/slaves at 3e000000/serial at 0:115200n8";
+ bootargs = "console=ttyS0,115200n8";
+ };
+
+ memory {
+ reg = <0x80000000 0x20000000>; /* 512 MB */
+ };
+};
+
+&uartb {
+ status = "okay";
+};
+
+&usbotg {
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
+&sdio1 {
+ max-frequency = <48000000>;
+ status = "okay";
+};
+
+&sdio2 {
+ non-removable;
+ max-frequency = <48000000>;
+ status = "okay";
+};
+
+&sdio4 {
+ max-frequency = <48000000>;
+ cd-gpios = <&gpio 91 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm23550.dtsi b/arch/arm/boot/dts/bcm23550.dtsi
new file mode 100644
index 000000000000..a7a643f38385
--- /dev/null
+++ b/arch/arm/boot/dts/bcm23550.dtsi
@@ -0,0 +1,415 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2016 Broadcom. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Broadcom Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/* BCM23550 and BCM21664 have almost identical clocks */
+#include "dt-bindings/clock/bcm21664.h"
+
+#include "skeleton.dtsi"
+
+/ {
+ model = "BCM23550 SoC";
+ compatible = "brcm,bcm23550";
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu at 0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0>;
+ clock-frequency = <1000000000>;
+ };
+
+ cpu1: cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ enable-method = "brcm,bcm23550";
+ secondary-boot-reg = <0x35004178>;
+ reg = <1>;
+ clock-frequency = <1000000000>;
+ };
+
+ cpu2: cpu at 2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ enable-method = "brcm,bcm23550";
+ secondary-boot-reg = <0x35004178>;
+ reg = <2>;
+ clock-frequency = <1000000000>;
+ };
+
+ cpu3: cpu at 3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ enable-method = "brcm,bcm23550";
+ secondary-boot-reg = <0x35004178>;
+ reg = <3>;
+ clock-frequency = <1000000000>;
+ };
+ };
+
+ /* Hub bus */
+ hub at 34000000 {
+ compatible = "simple-bus";
+ ranges = <0 0x34000000 0x102f83ac>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ smc at 4e000 {
+ compatible = "brcm,bcm23550-smc", "brcm,kona-smc";
+ reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
+ };
+
+ resetmgr: reset-controller at 1001f00 {
+ compatible = "brcm,bcm21664-resetmgr";
+ reg = <0x01001f00 0x24>;
+ };
+
+ gpio: gpio at 1003000 {
+ compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio";
+ reg = <0x01003000 0x524>;
+ interrupts =
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ };
+
+ timer at 1006000 {
+ compatible = "brcm,kona-timer";
+ reg = <0x01006000 0x1c>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
+ };
+ };
+
+ /* Slaves bus */
+ slaves at 3e000000 {
+ compatible = "simple-bus";
+ ranges = <0 0x3e000000 0x0001c070>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ uartb: serial at 0 {
+ compatible = "snps,dw-apb-uart";
+ status = "disabled";
+ reg = <0x00000000 0x118>;
+ clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ };
+
+ uartb2: serial at 1000 {
+ compatible = "snps,dw-apb-uart";
+ status = "disabled";
+ reg = <0x00001000 0x118>;
+ clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ };
+
+ uartb3: serial at 2000 {
+ compatible = "snps,dw-apb-uart";
+ status = "disabled";
+ reg = <0x00002000 0x118>;
+ clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ };
+
+ bsc1: i2c at 16000 {
+ compatible = "brcm,kona-i2c";
+ reg = <0x00016000 0x70>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
+ status = "disabled";
+ };
+
+ bsc2: i2c at 17000 {
+ compatible = "brcm,kona-i2c";
+ reg = <0x00017000 0x70>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
+ status = "disabled";
+ };
+
+ bsc3: i2c at 18000 {
+ compatible = "brcm,kona-i2c";
+ reg = <0x00018000 0x70>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
+ status = "disabled";
+ };
+
+ bsc4: i2c at 1c000 {
+ compatible = "brcm,kona-i2c";
+ reg = <0x0001c000 0x70>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
+ status = "disabled";
+ };
+ };
+
+ /* Apps bus */
+ apps at 3e300000 {
+ compatible = "simple-bus";
+ ranges = <0 0x3e300000 0x01b77000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ usbotg: usb at e20000 {
+ compatible = "snps,dwc2";
+ reg = <0x00e20000 0x10000>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&usb_otg_ahb_clk>;
+ clock-names = "otg";
+ phys = <&usbphy>;
+ phy-names = "usb2-phy";
+ status = "disabled";
+ };
+
+ usbphy: usb-phy at e30000 {
+ compatible = "brcm,kona-usb2-phy";
+ reg = <0x00e30000 0x28>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ sdio1: sdio at e80000 {
+ compatible = "brcm,kona-sdhci";
+ reg = <0x00e80000 0x801c>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
+ status = "disabled";
+ };
+
+ sdio2: sdio at e90000 {
+ compatible = "brcm,kona-sdhci";
+ reg = <0x00e90000 0x801c>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
+ status = "disabled";
+ };
+
+ sdio3: sdio at ea0000 {
+ compatible = "brcm,kona-sdhci";
+ reg = <0x00ea0000 0x801c>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
+ status = "disabled";
+ };
+
+ sdio4: sdio at eb0000 {
+ compatible = "brcm,kona-sdhci";
+ reg = <0x00eb0000 0x801c>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
+ status = "disabled";
+ };
+
+ cdc: cdc at 1b0e000 {
+ compatible = "brcm,bcm23550-cdc";
+ reg = <0x01b0e000 0x78>;
+ };
+
+ gic: interrupt-controller at 1b21000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x01b21000 0x1000>,
+ <0x01b22000 0x1000>;
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ /*
+ * Fixed clocks are defined before CCUs whose
+ * clocks may depend on them.
+ */
+
+ ref_32k_clk: ref_32k {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ };
+
+ bbl_32k_clk: bbl_32k {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ };
+
+ ref_13m_clk: ref_13m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <13000000>;
+ };
+
+ var_13m_clk: var_13m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <13000000>;
+ };
+
+ dft_19_5m_clk: dft_19_5m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <19500000>;
+ };
+
+ ref_crystal_clk: ref_crystal {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <26000000>;
+ };
+
+ ref_52m_clk: ref_52m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <52000000>;
+ };
+
+ var_52m_clk: var_52m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <52000000>;
+ };
+
+ usb_otg_ahb_clk: usb_otg_ahb {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <52000000>;
+ };
+
+ ref_96m_clk: ref_96m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <96000000>;
+ };
+
+ var_96m_clk: var_96m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <96000000>;
+ };
+
+ ref_104m_clk: ref_104m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <104000000>;
+ };
+
+ var_104m_clk: var_104m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <104000000>;
+ };
+
+ ref_156m_clk: ref_156m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <156000000>;
+ };
+
+ var_156m_clk: var_156m {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <156000000>;
+ };
+
+ root_ccu: root_ccu {
+ compatible = BCM21664_DT_ROOT_CCU_COMPAT;
+ reg = <0x35001000 0x0f00>;
+ #clock-cells = <1>;
+ clock-output-names = "frac_1m";
+ };
+
+ aon_ccu: aon_ccu {
+ compatible = BCM21664_DT_AON_CCU_COMPAT;
+ reg = <0x35002000 0x0f00>;
+ #clock-cells = <1>;
+ clock-output-names = "hub_timer";
+ };
+
+ slave_ccu: slave_ccu {
+ compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
+ reg = <0x3e011000 0x0f00>;
+ #clock-cells = <1>;
+ clock-output-names = "uartb",
+ "uartb2",
+ "uartb3",
+ "bsc1",
+ "bsc2",
+ "bsc3",
+ "bsc4";
+ };
+
+ master_ccu: master_ccu {
+ compatible = BCM21664_DT_MASTER_CCU_COMPAT;
+ reg = <0x3f001000 0x0f00>;
+ #clock-cells = <1>;
+ clock-output-names = "sdio1",
+ "sdio2",
+ "sdio3",
+ "sdio4",
+ "sdio1_sleep",
+ "sdio2_sleep",
+ "sdio3_sleep",
+ "sdio4_sleep";
+ };
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v2 0/6] Support BCM23550 SoC
2016-05-11 21:36 [PATCH v2 0/6] Support BCM23550 SoC Chris Brand
` (5 preceding siblings ...)
2016-05-11 21:36 ` [PATCH v2 6/6] arm: dt: bcm23550: Add device tree files Chris Brand
@ 2016-06-06 18:53 ` Florian Fainelli
6 siblings, 0 replies; 15+ messages in thread
From: Florian Fainelli @ 2016-06-06 18:53 UTC (permalink / raw)
To: linux-arm-kernel
On 05/11/2016 02:36 PM, Chris Brand wrote:
> This patchset introduces support for the BCM23550 SoC and the Broadcom
> Sparrow development board.
>
> It modifies the BCM21664 support slightly to share code between the two.
>
> With this patchset, a multi-v7 kernel brings up all 4 CPUs on a Sparrow
> board, and gets to a shell prompt. Many of the IP blocks that are shared
> with BCM28155 and BCM21664 are also functional, although not all have
> been thoroughly tested.
>
> Changes since v1
> - Moved chosen node from dtsi to dts file
> - Added stdout-path property to chosen node in dts
> - Removed "-cpu-method" from CPU enable method name
Series applied, patch 1 applied to drivers/next, patches 2, 4 and 5
applied to soc/next, and patches 2 and 6 applied to devicetree/next,
thanks everyone!
--
Florian
^ permalink raw reply [flat|nested] 15+ messages in thread