* [PATCH] arm64: dts: Update address-cells and reg properties of cpu nodes
@ 2016-05-09 9:06 Alison Wang
2016-06-09 2:42 ` Shawn Guo
0 siblings, 1 reply; 2+ messages in thread
From: Alison Wang @ 2016-05-09 9:06 UTC (permalink / raw)
To: linux-arm-kernel
MPIDR_EL1[63:32] value is equal to 0 for the CPUs of the LS1043A and
LS2080A SoCs. The ARM CPU binding allows #address-cells to be set to 1,
since MPIDR_EL1[63:32] bits are not used for CPUs identification. Update
the #address-cells and reg properties accordingly.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 10 +++++-----
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 18 +++++++++---------
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index de0323b..37614b5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -51,7 +51,7 @@
#size-cells = <2>;
cpus {
- #address-cells = <2>;
+ #address-cells = <1>;
#size-cells = <0>;
/*
@@ -63,28 +63,28 @@
cpu0: cpu at 0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
+ reg = <0x0>;
clocks = <&clockgen 1 0>;
};
cpu1: cpu at 1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
+ reg = <0x1>;
clocks = <&clockgen 1 0>;
};
cpu2: cpu at 2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
- reg = <0x0 0x2>;
+ reg = <0x2>;
clocks = <&clockgen 1 0>;
};
cpu3: cpu at 3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
- reg = <0x0 0x3>;
+ reg = <0x3>;
clocks = <&clockgen 1 0>;
};
};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 3187c82..25ff4a8 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -51,7 +51,7 @@
#size-cells = <2>;
cpus {
- #address-cells = <2>;
+ #address-cells = <1>;
#size-cells = <0>;
/*
@@ -65,56 +65,56 @@
cpu at 0 {
device_type = "cpu";
compatible = "arm,cortex-a57";
- reg = <0x0 0x0>;
+ reg = <0x0>;
clocks = <&clockgen 1 0>;
};
cpu at 1 {
device_type = "cpu";
compatible = "arm,cortex-a57";
- reg = <0x0 0x1>;
+ reg = <0x1>;
clocks = <&clockgen 1 0>;
};
cpu at 100 {
device_type = "cpu";
compatible = "arm,cortex-a57";
- reg = <0x0 0x100>;
+ reg = <0x100>;
clocks = <&clockgen 1 1>;
};
cpu at 101 {
device_type = "cpu";
compatible = "arm,cortex-a57";
- reg = <0x0 0x101>;
+ reg = <0x101>;
clocks = <&clockgen 1 1>;
};
cpu at 200 {
device_type = "cpu";
compatible = "arm,cortex-a57";
- reg = <0x0 0x200>;
+ reg = <0x200>;
clocks = <&clockgen 1 2>;
};
cpu at 201 {
device_type = "cpu";
compatible = "arm,cortex-a57";
- reg = <0x0 0x201>;
+ reg = <0x201>;
clocks = <&clockgen 1 2>;
};
cpu at 300 {
device_type = "cpu";
compatible = "arm,cortex-a57";
- reg = <0x0 0x300>;
+ reg = <0x300>;
clocks = <&clockgen 1 3>;
};
cpu at 301 {
device_type = "cpu";
compatible = "arm,cortex-a57";
- reg = <0x0 0x301>;
+ reg = <0x301>;
clocks = <&clockgen 1 3>;
};
};
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH] arm64: dts: Update address-cells and reg properties of cpu nodes
2016-05-09 9:06 [PATCH] arm64: dts: Update address-cells and reg properties of cpu nodes Alison Wang
@ 2016-06-09 2:42 ` Shawn Guo
0 siblings, 0 replies; 2+ messages in thread
From: Shawn Guo @ 2016-06-09 2:42 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, May 09, 2016 at 05:06:15PM +0800, Alison Wang wrote:
> MPIDR_EL1[63:32] value is equal to 0 for the CPUs of the LS1043A and
> LS2080A SoCs. The ARM CPU binding allows #address-cells to be set to 1,
> since MPIDR_EL1[63:32] bits are not used for CPUs identification. Update
> the #address-cells and reg properties accordingly.
>
> Signed-off-by: Alison Wang <alison.wang@nxp.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 2+ messages in thread
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