From: boris.brezillon@free-electrons.com (Boris Brezillon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/7] crypto: marvell: Check engine is not already running when enabling a req
Date: Wed, 15 Jun 2016 21:37:09 +0200 [thread overview]
Message-ID: <20160615213709.3a060ff4@bbrezillon> (raw)
In-Reply-To: <1466018134-10779-3-git-send-email-romain.perier@free-electrons.com>
On Wed, 15 Jun 2016 21:15:29 +0200
Romain Perier <romain.perier@free-electrons.com> wrote:
> Adding BUG_ON() macro to be sure that the step operation is not about
> to activate a request on the engine if the corresponding engine is
> already processing a crypto request. This is helpful when the support
> for chaining crypto requests will be added. Instead of hanging the
> system when the engine is in an incoherent state, we add this macro
You don't add the macro, you use it.
> which throws an understandable error.
How about rewording the commit message this way:
"
Add a BUG_ON() call when the driver tries to launch a crypto request
while the engine is still processing the previous one. This replaces
a silent system hang by a verbose kernel panic with the associated
backtrace to let the user know that something went wrong in the CESA
driver.
"
>
> Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Apart from the coding style issue mentioned below,
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> ---
> drivers/crypto/marvell/cipher.c | 2 ++
> drivers/crypto/marvell/hash.c | 2 ++
> drivers/crypto/marvell/tdma.c | 2 ++
> 3 files changed, 6 insertions(+)
>
> diff --git a/drivers/crypto/marvell/cipher.c b/drivers/crypto/marvell/cipher.c
> index dcf1fce..8d0fabb 100644
> --- a/drivers/crypto/marvell/cipher.c
> +++ b/drivers/crypto/marvell/cipher.c
> @@ -106,6 +106,8 @@ static void mv_cesa_ablkcipher_std_step(struct ablkcipher_request *req)
>
> mv_cesa_set_int_mask(engine, CESA_SA_INT_ACCEL0_DONE);
> writel_relaxed(CESA_SA_CFG_PARA_DIS, engine->regs + CESA_SA_CFG);
> + BUG_ON(readl(engine->regs + CESA_SA_CMD)
> + & CESA_SA_CMD_EN_CESA_SA_ACCL0);
Nit: please put the '&' operator at the end of the first line and
align CESA_SA_CMD_EN_CESA_SA_ACCL0 on the open parenthesis.
BUG_ON(readl(engine->regs + CESA_SA_CMD) &
CESA_SA_CMD_EN_CESA_SA_ACCL0);
> writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
> }
>
> diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
> index 7ca2e0f..0fae351 100644
> --- a/drivers/crypto/marvell/hash.c
> +++ b/drivers/crypto/marvell/hash.c
> @@ -237,6 +237,8 @@ static void mv_cesa_ahash_std_step(struct ahash_request *req)
>
> mv_cesa_set_int_mask(engine, CESA_SA_INT_ACCEL0_DONE);
> writel_relaxed(CESA_SA_CFG_PARA_DIS, engine->regs + CESA_SA_CFG);
> + BUG_ON(readl(engine->regs + CESA_SA_CMD)
> + & CESA_SA_CMD_EN_CESA_SA_ACCL0);
Ditto.
> writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
> }
>
> diff --git a/drivers/crypto/marvell/tdma.c b/drivers/crypto/marvell/tdma.c
> index 7642798..d493714 100644
> --- a/drivers/crypto/marvell/tdma.c
> +++ b/drivers/crypto/marvell/tdma.c
> @@ -53,6 +53,8 @@ void mv_cesa_dma_step(struct mv_cesa_tdma_req *dreq)
> engine->regs + CESA_SA_CFG);
> writel_relaxed(dreq->chain.first->cur_dma,
> engine->regs + CESA_TDMA_NEXT_ADDR);
> + BUG_ON(readl(engine->regs + CESA_SA_CMD)
> + & CESA_SA_CMD_EN_CESA_SA_ACCL0);
Ditto.
> writel(CESA_SA_CMD_EN_CESA_SA_ACCL0, engine->regs + CESA_SA_CMD);
> }
>
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2016-06-15 19:37 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-15 19:15 [PATCH 0/7] Chain crypto requests together at the DMA level Romain Perier
2016-06-15 19:15 ` [PATCH 1/7] crypto: marvell: Add a macro constant for the size of the crypto queue Romain Perier
2016-06-15 19:20 ` Boris Brezillon
2016-06-15 19:15 ` [PATCH 2/7] crypto: marvell: Check engine is not already running when enabling a req Romain Perier
2016-06-15 19:37 ` Boris Brezillon [this message]
2016-06-16 8:18 ` Romain Perier
2016-06-15 19:15 ` [PATCH 3/7] crypto: marvell: Copy IV vectors by DMA transfers for acipher requests Romain Perier
2016-06-15 20:07 ` Boris Brezillon
2016-06-16 8:29 ` Romain Perier
2016-06-16 8:32 ` Gregory CLEMENT
2016-06-15 20:48 ` Boris Brezillon
2016-06-15 19:15 ` [PATCH 4/7] crypto: marvell: Moving the tdma chain out of mv_cesa_tdma_req Romain Perier
2016-06-15 20:42 ` Boris Brezillon
2016-06-16 12:02 ` Romain Perier
2016-06-16 12:45 ` Boris Brezillon
2016-06-16 12:57 ` Boris Brezillon
2016-06-15 19:15 ` [PATCH 5/7] crypto: marvell: Adding a complete operation for async requests Romain Perier
2016-06-15 20:55 ` Boris Brezillon
2016-06-16 13:41 ` Romain Perier
2016-06-15 19:15 ` [PATCH 6/7] crypto: marvell: Adding load balancing between engines Romain Perier
2016-06-15 21:13 ` Boris Brezillon
2016-06-16 13:44 ` Romain Perier
2016-06-15 19:15 ` [PATCH 7/7] crypto: marvell: Add support for chaining crypto requests in TDMA mode Romain Perier
2016-06-15 21:43 ` Boris Brezillon
2016-06-17 9:54 ` Romain Perier
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