From: robh@kernel.org (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv3 4/7] Documentation: dt: socfpga: Add Arria10 Ethernet binding
Date: Thu, 16 Jun 2016 13:39:53 -0500 [thread overview]
Message-ID: <20160616183953.GA6667@rob-hp-laptop> (raw)
In-Reply-To: <1465852752-11018-5-git-send-email-tthayer@opensource.altera.com>
On Mon, Jun 13, 2016 at 04:19:09PM -0500, tthayer at opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
>
> Add the device tree bindings needed to support the Altera Ethernet
> FIFO buffers on the Arria10 chip.
>
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2 No Change
> v3 Change to common compatible string based on maintainer comments
> Add local IRQ values.
> ---
> .../bindings/arm/altera/socfpga-eccmgr.txt | 24 ++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
> index 15eb0df..e9febbb 100644
> --- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
> @@ -82,6 +82,14 @@ Required Properties:
> - interrupts : Should be single bit error interrupt, then double bit error
> interrupt, in this order.
>
> +Ethernet FIFO ECC
> +Required Properties:
> +- compatible : Should be "altr,socfpga-eth-mac-ecc"
> +- reg : Address and size for ECC block registers.
> +- parent : phandle to parent Ethernet node.
parent is too vague. How about altr,ethernet-mac.
> +- interrupts : Should be single bit error interrupt, then double bit error
> + interrupt, in this order.
> +
> Example:
>
> eccmgr: eccmgr at ffd06000 {
> @@ -108,4 +116,20 @@ Example:
> interrupts = <1 IRQ_TYPE_LEVEL_HIGH>,
> <33 IRQ_TYPE_LEVEL_HIGH> ;
> };
> +
> + emac0-rx-ecc at ff8c0800 {
> + compatible = "altr,socfpga-eth-mac-ecc";
> + reg = <0xff8c0800 0x400>;
> + parent = <&gmac0>;
> + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>,
> + <36 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + emac0-tx-ecc at ff8c0c00 {
> + compatible = "altr,socfpga-eth-mac-ecc";
> + reg = <0xff8c0c00 0x400>;
> + parent = <&gmac0>;
> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>,
> + <37 IRQ_TYPE_LEVEL_HIGH>;
> + };
> };
> --
> 1.7.9.5
>
next prev parent reply other threads:[~2016-06-16 18:39 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-13 21:19 [PATCHv3 0/7] Add Ethernet EDAC & peripheral init functions tthayer at opensource.altera.com
2016-06-13 21:19 ` [PATCHv3 1/7] EDAC, altera: Check parent status for Arria10 EDAC block tthayer at opensource.altera.com
2016-06-17 16:46 ` Borislav Petkov
2016-06-17 16:54 ` Thor Thayer
2016-06-17 16:54 ` Borislav Petkov
2016-06-13 21:19 ` [PATCHv3 2/7] EDAC, altera: Add panic flag check to A10 IRQ tthayer at opensource.altera.com
2016-06-17 16:51 ` Borislav Petkov
2016-06-17 17:05 ` Thor Thayer
2016-06-17 17:02 ` Borislav Petkov
2016-06-17 17:11 ` Thor Thayer
2016-06-13 21:19 ` [PATCHv3 3/7] EDAC, altera: Share Arria10 check_deps & IRQ functions tthayer at opensource.altera.com
2016-06-17 17:00 ` Borislav Petkov
2016-06-17 17:09 ` Thor Thayer
2016-06-17 17:11 ` Borislav Petkov
2016-06-17 17:37 ` Thor Thayer
2016-06-13 21:19 ` [PATCHv3 4/7] Documentation: dt: socfpga: Add Arria10 Ethernet binding tthayer at opensource.altera.com
2016-06-16 18:39 ` Rob Herring [this message]
2016-06-16 19:12 ` Thor Thayer
2016-06-13 21:19 ` [PATCHv3 5/7] EDAC, altera: Add Arria10 ECC memory init functions tthayer at opensource.altera.com
2016-06-17 17:21 ` Borislav Petkov
2016-06-17 17:42 ` Thor Thayer
2016-06-13 21:19 ` [PATCHv3 6/7] EDAC, altera: Add Arria10 Ethernet EDAC support tthayer at opensource.altera.com
2016-06-17 17:29 ` Borislav Petkov
2016-06-17 17:43 ` Thor Thayer
2016-06-13 21:19 ` [PATCHv3 7/7] ARM: dts: Add Arria10 Ethernet EDAC devicetree entry tthayer at opensource.altera.com
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